KR0132023B1 - Voltage generator using pump circuit - Google Patents

Abstract

disclosed is a voltage generator using a multi-stage pump circuit including a plurality of pump circuits and a plurality of ring oscillators. The plurality of pump circuits are parallel connected one another. The plurality of ring oscillators have different periods one another. The voltage generator is pumping in response to the signal output from the plurality of ring oscillators. Thus, latch-up and noise of power line can be reduced.

Description

Voltage Generator Using Multistage Pump Circuit

1 is a block diagram of a voltage generator.

2 is a circuit diagram of a conventional oscillator.

3 is a circuit diagram of a conventional Vbb generation pump using an n-MOS transistor.

4 is a circuit diagram of a conventional Vbb generation pump using a P-MOS transistor.

5 is a timing diagram for explaining the operation of FIG. 3 and FIG.

6 is a circuit diagram of a conventional pump for generating Vpp.

7 is a timing diagram for explaining the operation of FIG.

8 is a circuit diagram of an oscillator used in the present invention.

9 is a circuit diagram of a pump for generating Vbb using the oscillator of FIG.

10 is a timing diagram for explaining the ninth figure.

11 is a circuit diagram of a pump for generating Vpp using the oscillator of FIG.

12 is a timing diagram for explaining the operation of FIG.

13 is a circuit diagram of another oscillator used in the present invention.

14 is a circuit diagram of a Vbb generation pump using the oscillator of FIG.

* Explanation of symbols for main parts of the drawings

G: inversion gate, n and p: transistor,

C: precharge capacitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a front generator using a multi-stage pump circuit. In particular, a plurality of oscillator output signals coupled to a plurality of pump circuits for generating voltage by at least two oscillator signals and output from the oscillator and having different phases are provided. The present invention relates to a voltage generator using a multi-stage pump circuit that can reduce the latch-up and power line noise by causing a plurality of pump circuits to pump at different periods.

In general, voltage generators used in semiconductor devices include a Vbb generator for generating a voltage below ground voltage and a Vpp generator for generating a voltage above a power supply voltage. As shown in FIG. (2) and the pump circuit 3.

In the oscillator 1, an oscillator signal having a continuous period is supplied to the pump circuit 2, and the pump circuit 2 continues pumping operation with the set voltage level according to the input oscillator signal, and reaches the set voltage level. When the voltage level detection circuit 1 detects this, the operation of the oscillator 2 is stopped and the operation of the oscillator 2 is restarted again to generate the set voltage when the voltage level is lower than the reverse level.

2 is a circuit diagram of a conventional oscillator, in which a frequency fb having a phase opposite to a frequency fa having a specific period T by a delay time passing through the inverting gates G1 to G5 is inverted. And inv2).

3 is a circuit diagram of a conventional Vbb generation pump using an n-MOS transistor, which will be described below with reference to FIG.

When the frequencies fa and fb are respectively input to the frequency input terminals fa and fb from the oscillator (Fig. 2), the frequency fa changes from VSS to VCC as shown in Fig. 5, and the frequency fb is VCC. At the time point at which VSS changes from VS, the node S1 changes from -V1 to VSS, so that the transistor n2 is turned on and the transistor P2 is turned off, so that electrons are stored in the precharge capacitor C2 of the node S2. (Vbb), that is, supplied to the substrate (Substrate), the node (S2) is changed from VSS to -V1 transistor P1 is turned on, transistor n1 is turned on, so the capacitor (C1) is transistor P1. Precharge to ground potential (Vss) through) to prepare for the next pumping operation.

In addition, when the frequency fa changes from VCC to VSS and the frequency fb changes from VSS to VCC, the node S2 changes from -V1 to VSS, so the transistor n1 is turned on and the transistor P1 is turned on. Since it is turned off, electrons are supplied to the substrate from the precharge capacitor C1 of the node S1, and the transistor P2 is turned on and the transistor n2 is turned off because the transistor S2 turns from -V1 to the node S1. Capacitor C2 is precharged to ground potential VSS through transistor P2.

The above two operations are performed according to the frequencies fa and fb to generate the low potential power Vbb in the pump for generating Vbb.

4 is a circuit diagram of a conventional Vbb generation pump using a P-MOS transistor, which will be described below with reference to FIG.

When the frequencies fa and fb are input from the oscillator (Fig. 2) to the frequency input terminals fa and fb, respectively, the frequency fa changes from VSS to VCC as shown in Fig. 5, and the frequency fb is VCC. At the time point at which VSS changes from VSS, since the node S2 changes from VSS to -V1, the transistors P1 and P4 are turned on and the transistors P2 and P3 are turned off, so the precharge capacitor C2 of the node S2 is turned off. The electrons are supplied to the node Vbb, that is, the substrate, and the node S1 changes from -V1 to VSS, and thus the precharge capacitor C1 is precharged to the ground potential V through the transistor P1.

At this time, since the P-MOS transistors P3 and P4 operate as diodes, a voltage drop occurs as much as the threshold voltage VT of the transistor. Therefore, in the pumping operation at a low voltage, the use of the P-MOS transistors has low efficiency. do.

Therefore, in the current trend of lowering the power supply voltage, an n-MOS pumping circuit shown in FIG. 3 is more advantageous.

However, in the case of supplying electrons to a substrate, in a memory cell composed of one transistor, one transistor, and one capacitor, when the electrons injected into the substrate flow into the storage node of the memory cell, the state of data is changed. N-MOS pumping circuits are not reliable because they can be changed or destroyed.

FIG. 6 is a circuit diagram of a conventional VPP generating pump. Referring to FIG.

When the frequencies fa and fb are respectively input from the oscillator (Fig. 2) to the frequency input terminals fa and fb, the frequency fa changes from VSS to VCC as shown in Fig. 7, and the frequency f is VCC. At the point of transition from Vs to Vss, the node S2 changes from + V1 to VCC to turn on the transistor P1 so that the charge of the precharge capacitor C1 passes through the transistor P1 to the node VPP, i. The node S1 changes from VCC to + V1 to turn off the transistor P2, and thus the precharge capacitor C2 is precharged through the transistor n2.

In addition, when the frequency fa changes from VCC to VSS and the frequency fb changes from VSS to VCC, the node S1 changes from + V1 to VCC to turn on the transistor P2, so that the charge of the precharge capacitor C2 It is output to the high potential terminal through the transistor P2, and the node S2 changes from VCC to + V1 to turn off the transistor P1, so that the precharge capacitor C1 has a power supply potential VCC through the transistor n1. Is precharged. The above two operations are performed according to the frequencies fa and fb to generate a high potential power VPP in the pump for generating VPP. However, in the pumping operation, since the nodes S1 and S2 must be voltages of VPP or higher, a PN junction formed between the P-active region and the N-well region of the nodes S1 and S2 is formed. Latch-up may occur at turn-on, and the inverting gates inv1 and inv2 of the oscillator shown in FIG. 2 may have capacitances for driving the large-capacity precharge capacitors C1 and C2. Since the size must be large, noise is generated in the power line during the pumping operation, and current flows to the substrate.

Therefore, in the present invention, a plurality of pump circuits generating voltage by two or more oscillator signals are coupled, and a plurality of pump circuits are pumped with different periods by a plurality of oscillator output signals output from the oscillator and having different phases. It is an object of the present invention to provide a voltage generator using a multi-stage pump circuit that can be operated to solve the above disadvantages.

The present invention for achieving the above object is a voltage generator using a pump circuit, characterized in that configured to be pumped in accordance with a plurality of ring oscillator output signals having a parallel connection and a plurality of pump circuits in parallel.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention. 8 is a circuit diagram of an oscillator used in the present invention, which is a frequency fb having a phase opposite to that of a frequency fa having a period T equal to a delay time via the inverting gates G6 to G10, and A frequency fa having a period 1 / 2T for a delay time (for example, 1 / 2T) via the inversion gates G6 and G7 is generated via the inversion gates inv1 to inv2, respectively.

FIG. 9 is a circuit diagram of a pump for generating Vbb using the oscillator of FIG. 8, which will be described with reference to FIG.

When the frequencies fa, fb, fc, and fd are respectively input from the oscillator (Fig. 8) to the frequency input terminals fa, fb, fc, and fd, the frequency fa is as shown in Fig. 10. At the time when Vss changes from Vcc, frequency fb changes from VCC to VSS, frequency fc is in VSS state and frequency fd is in VCC state, node S11 changes from -V1 to VSS to transistor n21. Since the electrons of the precharge capacitor C21 are supplied to the node Vbb, that is, the low potential terminal through the transistor n21, the node S21 changes from VSS to -V1 to turn on the transistor P11. The ground potential VSS is precharged in the precharge capacitor C11 through the transistor P11. In addition, since the transistor P22 is turned on with the node S12 in the -V1 state, the precharge capacitor C22 is in the precharge of the ground potential VSS through the transistor P22, and the node S22 is in the VSS state. Since the transistor n12 is turned on, the electrons of the precharge capacitor C12 are in a state where supply to the node Vbb is in progress through the transistor n12.

On the other hand, at a time when the frequency fa changes from VCC to VSS, the frequency fb changes from VSS to VCC, the frequency fc is in the VCC state and the frequency fd is in the VSS state, the node S11 is-in VSS. Since the transistor P21 is turned on by turning to V1, the ground potential is precharged through the transistor P21 in the precharge capacitor C21, and the node S21 changes from -V1 to VSS to turn on the transistor n11 to precharge. Electrons of the capacitor C11 are supplied to the node Vbb through the transistor n11. In addition, since the node S12 is in the VSS state and the transistor n22 is turned on, the electrons of the precharge capacitor C22 are being supplied to the node Vbb through the transistor n22, and the node S22 is in the -V1 state. Since the low transistor P12 is turned on, the precharge capacitor C12 is in a state where precharge of the ground potential VSS is in progress through the transistor P12. Comparing the precharge capacitors C11, C12, C21 and C22 with the precharge capacitors C1 and C2 of FIG. 3, C11 + C12 = C1, C21 + C22 = C2, in which case C11 = C12 = Ideally, 1 / 2C1, C21 = C22 = 1 / 2C2. Therefore, the distance from which electrons are diffused is reduced by supplying a small amount of electrons into the substrate twice without supplying a large amount of electrons to the substrate at once.

FIG. 11 is a circuit diagram of a pump for generating VPP using the oscillator of FIG. 8 and described with reference to FIG.

The frequencies fa, fb, fc and fd are inputted from the oscillator (Fig. 8) to the frequency input terminals fa, fb, fc and fd, respectively, where the frequencies fa and fb determine the period T. For example, the frequencies fc and fd have a period of, for example, 1 / 2T, and the operation description is that the frequencies fa and fb are input and the frequencies fc and fd are input, respectively. And the same as the contents of Figure 7 will be omitted. In addition, when the precharge capacitors C11, C12, C21, C22, C31, C32, C41 and C42 are compared with the precharge capacitors C1 to C4 of FIG. 6, C11 + C12 = C1, C21 + C22 = C2, C31 + C32 = C3 and C41 + C42 = C4, in which case the size of transistors (n11, n12, p11, p12, n21, n22, p21 and p22) also equals P11 + P12 = P1, P21 + P22 = P2. do. That is, the voltages of the nodes S11, S12, S21 and S22 are the same as the voltages of the nodes S1 and S2 in FIG. 6, but only about half of the electric charge is supplied.

FIG. 13 is a circuit diagram of another oscillator used in the present invention, in which frequency fc having a phase opposite to frequency fd having a period T equal to a delay time via inverting gates G11 to G15, And a frequency having a phase opposite to a frequency fa having a period (2 / 3T) for a delay time (for example, 2 / 3T) passing through the inversion gates G11 to G15 and the inversion gates G16 and G17. (fb) is generated through the inversion gates inv1 to inv4, respectively.

FIG. 14 is a circuit diagram of a pump for generating Vbb using the oscillator of FIG. 13, which will be described below with reference to FIG.

The frequencies fa, fb, fc and fd are input to the frequency input terminals fa, fb, fc and fd, respectively, from the oscillator (Fig. 13), where the frequencies fc and fd have a period T. In this case, the frequencies fa and fb have a 2 / 3T period, for example, and descriptions of the operations are the same as those of FIGS. 9 and 10, and thus the description thereof will be omitted.

As described above, the pumping circuit operated by the oscillator generating the frequency of the constant period T has a large capacity of the precharge capacitor, but the constant periods T and (1) like the oscillators of FIGS. / NT) with different phases and input to N pumping circuits, the size of transistors and precharge capacitors in the pumping circuit is also reduced to 1 / N and latch-up. In addition to solving problems such as up and destruction of memory cell data due to the injection of electrons, the size of the inverting gates inv1 and inv2 for operating a large precharge capacitor is also reduced, and the cycles are different. In operation, the power supply VCC and VSS are stabilized and there is no current flowing to the substrate.

Claims (2)

In a voltage generator for pumping a voltage set by a voltage level sensing circuit, an oscillator means for outputting a plurality of frequencies having different phases, and a plurality of phases connected in parallel with each other and having a different phase output from the oscillator means. A voltage generator using a multistage pump circuit, characterized in that it comprises a plurality of pump circuits for performing a pumping operation having a different period according to the frequency. 2. The apparatus of claim 1, wherein the oscillator means comprises a plurality of inverted gates connected in series, the final output being fed back to an input, first inverting means for inverting the final output to generate a first frequency, and the first inversion. Second inverting means for inverting the output signal of the means again to generate a second frequency, third inverting means for inverting any output of the plurality of inverting gates to generate a third frequency, and the third inverting And a fourth inversion means for inverting the output of the means again to generate a fourth frequency.