KR0142827B1 - Resonant inverter with zero voltage switching control circuit - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resonant inverter, wherein a high-efficiency high frequency switching method is provided for a resonant inverter by using a resonant voltage sensing method that senses voltage across a capacitor connected in parallel with a MOSFET of the resonant inverter to ensure zero voltage switching of the main switching element. In order to provide a zero voltage switching control circuit capable of realizing a power supply, when a power is applied to a resonant inverter, the voltage between the rectified voltage of the power supply and the voltage of the main switching element is sensed. The system unit performs zero voltage switching only when a square wave controlling the device is input, and the system unit determines whether a zero voltage switching operation is required by detecting a voltage between both ends of the main switching element and a rectified voltage of a power supply in the system unit. A zero voltage switching controller for controlling to perform a zero voltage A resonant inverter having a zero voltage switching control circuit of a resonant inverter, characterized in that it is composed of a control unit for receiving a control signal of a switching control unit and providing a square wave to turn on the main switching element in the system unit. Thing about

Description

Resonant Inverter with Zero Voltage Switching Control Circuit

(A) of FIG. 1 is a conventional resonant inverter circuit, and (b) is a waveform diagram of a conventional resonant inverter.

2 is a detailed circuit diagram of a resonant inverter having a zero voltage switching control circuit according to an embodiment of the present invention.

3 is a waveform diagram of main signals before operation of a zero voltage switching controller of a resonant inverter having a zero voltage switching control circuit according to an exemplary embodiment of the present invention.

4 is a waveform diagram of main signals of a resonant inverter having a zero voltage switching control circuit according to an embodiment of the present invention.

5 is an input / output waveform diagram of a controller in a resonant inverter including a zero voltage switching control circuit according to an exemplary embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

V0, V1, V2, V3, V4, V5, V6, V7, V8: Output signal in each main step

M1, M2: main switching elements P1, P2, P3, P4: comparators

F1, F2: D flip flop V _DD : Constant voltage rectified input power

The present invention relates to a resonant inverter having a zero voltage switching control circuit. More specifically, the zero voltage switching operation, which is very important in a resonant inverter system, can be completely performed even if the input voltage fluctuates and the load varies widely. A resonant inverter having a zero voltage switching control circuit.

In general, the inverter device is widely used for the speed control of an induction motor, and there are a pulse width adjustment method and a resonance type control method. In this case, the resonant control method controls the inverter to switch on and off to approximate sine wave by turning on or off the inverter at a point where the high frequency alternating current or DC pulsation voltage becomes zero in resonant voltage or current. By controlling the induction motor to control the speed and torque of the motor.

The resonant inverter has the advantage that the power switch is turned on and off at the moment when the resonant voltage or current becomes zero, so that the switching loss is reduced and the high speed response can be realized by increasing the on / off frequency of the switch more than 10 times. . Therefore, a resonant inverter is mainly used.

Hereinafter, a conventional resonant inverter will be described with reference to the accompanying drawings.

(A) of FIG. 1 is a conventional resonant inverter circuit, and (b) is a waveform diagram of a conventional resonant inverter.

As shown in FIG. 1A, a conventional resonant inverter is parasitic on two metal oxide semiconductor field effect transistors (MOSFETs) (M1 and M2) and the MOSFETs (M1 and M2). The resonant current i0 flowing through the circuit in which the diodes D1 and D2, the two capacitors C1 and C2 and the resonant inductor L5 and the resonant inductor L5 which are charged and discharged in series are connected in series, and R7 is a resonant capacitor as a load. It is connected in parallel to C5) and consists of two capacitors C3 and C4 and two diodes D3 and D4 connected in parallel for voltage distribution.

As shown in (b) of FIG. 1, the resonant inverter circuit receives an input signal using a commercial power source and performs an inverter function when a corresponding system control signal is inputted with a desired voltage level. After sensing the magnitude of the resonant current i0 and before the resonant current becomes zero, the MOSFETs M1 and M2 are turned on to perform a zero voltage switching operation. That is, when the pulse of the system control signal falls, the resonant voltage is charged and discharged in the capacities C1 and C2, and immediately after this period, the switching of the MOSFETs M1 and M2 is turned on.

However, in the conventional zero voltage switching method, when the load is changed or the input power is changed, the falling slope of the resonant current is different, and thus the voltage charging time at both ends of the main switching elements M1 and M2 is changed, so the zero voltage switching operation is not guaranteed. . Therefore, it is difficult to realize a high efficiency high frequency switching operation which is an advantage of the resonant inverter.

Therefore, an object of the present invention is to solve the disadvantages of the prior art, by using a resonant voltage sensing method for detecting the voltage across the capacitor connected in parallel with the MOSFET of the resonant inverter to ensure the zero voltage switching of the main switching element It is an object of the present invention to provide a resonant inverter having a zero voltage switching control circuit capable of realizing high efficiency high frequency switching.

The configuration of the present invention to achieve the above object, when the power is applied to the resonant inverter, detects the voltage between the rectified voltage of the power supply and the main switching device, if the value is matched with the preset value, A system unit for performing zero voltage switching by receiving a square wave to be controlled, and sensing the voltage between both ends of the main switching element and the rectified voltage of the power supply in the system unit to determine whether zero voltage switching operation is required, and thus the system unit performs zero voltage switching. A zero voltage switching control unit for controlling to perform, and a control unit for providing a square wave to receive the control signal of the zero voltage switching control unit to turn on the main switching element in the system unit.

When described with reference to the accompanying drawings the most preferred embodiment which can easily implement this invention by the above configuration as follows.

2 is a detailed circuit diagram of a resonant inverter having a zero voltage switching control circuit according to an embodiment of the present invention.

As shown in FIG. 2, the configuration of the resonant inverter including the zero voltage switching control circuit according to the embodiment of the present invention is a charge / discharge capacitor C1, in parallel to two MOSFETs M1 and M2 as a main switching element. C2) is connected to the switching circuit unit, the resonance inverter (L5) and the resonant capacitor (C5) is connected in order to obtain the resonance of the current and the load resistor (R7) in parallel to the resonant capacitor (C5) In a conventional resonant inverter circuit composed of an output circuit, a voltage divider circuit equipped with voltage divider capacitors C3 and C4, and diodes D3 and D4, each of the two MOSFETs M1 and M2 has a respective bias ( By connecting R1, R2, R'1, R'2, it is possible to detect the voltage between the rectified voltage (V _DD ) and the two MOSFETs (M1, M2) of the input power at the same level. The system unit 10 directly receiving the inverter function and the MOSFET (M1, Two comparators (P1, P2) for sensing the voltage between M2) and the rectified voltage (V _DD ) of the input power source and comparing and determining the section in which the voltage is changed above or below a predetermined potential (V _m1 , V _m2 ); The output signals from the comparators P1 and P2 secure some delay time, and the charge / discharge capacitors C1 and C2 connected in parallel to the MOSFETs M1 and M2 of the system unit 10, respectively. ) Is completely charged and charged, the zero voltage switching control unit 20 consisting of a comparator (P3) to enable the switching of the MOSFET (M1, M2) and the sawtooth wave generated in the sawtooth generator is a comparator (P4) In the case where the voltage is greater than or equal to a predetermined potential V _r2 , when the signal V7 indicating zero voltage switching is output from the zero voltage switching controller 20, two MOSFETs M1 and M2 in the system unit 10 are output. The control unit 30 drives the D flip-flops F1 and F2 which alternately provide square waves to the device.

The operation of the resonant inverter equipped with the zero voltage switching control circuit according to the embodiment of the present invention by the above configuration is as follows.

3 is a waveform diagram of main signals before operation of a zero voltage switching controller in a resonant inverter including a zero voltage switching control circuit according to an exemplary embodiment of the present invention.

As shown in FIG. 3, the waveform diagram of the voltage V0 and the resonant current i0 between the MOSFETs M1 and M2 in the system unit 10, and the sawtooth wave V1 generated by the sawtooth generator of the control unit 30. And a waveform of the clock signal V2 provided to the D flip flops F1 and F2 in order to generate a square wave which is an output signal of the control unit 30.

3 illustrates a case in which the control operation is performed only in the controller 30, and there are a section (a) in which zero voltage switching is normally performed and a section (b) in which zero voltage switching is abnormally performed. The period (a) in which zero voltage switching is performed is such that the switching operations are performed by turning on the MOSFETs M1 and M2 before passing the point where the resonance current i0 is zero, and section (b) is the resonance current. Since (i0) is already zero, the MOSFETs M1 and M2 are turned on, so that the voltage V0 between the MOSFETs M1 and M2 brings voltage organic and causes switching power loss.

In order to ensure the zero voltage switching operation by detecting the movement of the current as shown in the section (b) of FIG. 3 in advance, the zero voltage switching controller 20 is operated to operate between the drain sources of the MOSFETs M1 and M2 as main switching elements. The switching operation should be performed by detecting the point where the voltage is zero.

4 is a waveform diagram of main signals of a resonant inverter having a zero voltage switching control circuit according to an exemplary embodiment of the present invention.

In the section (b) in which the zero voltage switching operation is abnormally performed, when the resonance current (i0) falls after passing the section (e), the point (t3) at which the sawtooth falls is zero at the point where the resonance current (i0) is zero. If it appears after the point (i), the square waves V3 and V4, which are output signals of the control unit 30 for turning on the MOSFETs M1 and M2, are generated late, causing zero voltage switching to be broken.

As shown in FIG. 4, the zero voltage switching controller 20 detects that the voltage V0 between the MOSFETs M1 and M2, which are the main switching elements, has fallen to ground at a time t2, and outputs the output signal of the controller 30. And this output signal instructs the operation of the MOSFET M2 in advance. Then, the MOSFET M2 is turned on when the voltage between the drain sources of the MOSFET M2 becomes zero under the condition that the voltage V0 between the MOSFETs M1 and M2 as the main switching element is ground. Therefore, the switching operation is performed without switching power loss of the switching element.

In FIG. 4, the V6 waveform diagram between the waveform diagrams of V1 and V2 is a signal for setting the operation period of the zero voltage switching controller 20, and this signal is the output signal V8 of the comparator P4. The delay time is a small delay time, which is useful for preventing a malfunction of the zero voltage switching controller 20. If there is no delay time, V0 is detected as zero in section (c), and then V0 is detected as signal in section (d) so that capacitors C1 and C2 are fully charged and discharged. Without this, the main switching elements MOSFETs M1 and M2 are turned on and the zero voltage switching operation is destroyed.

Therefore, in order to obtain this delay time, which is the time for the capacitors C1 and C2 to charge and discharge, the voltages V _R1 and V _R2 input to the comparator 3 (P3) and the comparator 4 (P4) as comparison reference signals are required. The condition is that both V _R1 V _R2 and V _R1 and V _R2 must be less than the sawtooth maximum.

Referring to the operation of the zero voltage switching controller 20, when the sawtooth wave exceeds V _R2 , V8 goes high to a logical level, the sawtooth wave is smaller than V _R1 , and V6 goes low to a logical level. In order to output the square wave from the controller 30 to the system unit 10, the V8 must always be kept at a logical level high. In addition, V6 is a signal for the above delay time to be operated at a logical level high. This means that a section in which the sawtooth wave is larger than the reference signal V _R1 input to the comparator 3 P3 can be secured as the delay time. Therefore, the logical level of V5, which is the output of negative logic gate (G22) with V6 as one input and V7 as the other input, becomes V7 high when V6 is high and V7 high when V7 is high. Has the reversal result. At this time, the clock signal V2 of the D flip-flops F1 and F2 goes low to a logical level, so that the controller 30 does not generate an output signal.

The voltages V _m1 and V _m2 input to the non-inverting terminals of comparator 1 (P1) and comparator 2 (P2) are voltages set in the range of tens to hundreds of mV to sense V _DD and ground, and this voltage is V0. Since V changes between V _DD and ground, the comparator 1 (P1) and comparator 2 (P2) are set voltages because there is a need to make the comparison potential above a certain level.

As described above, the square wave output for zero voltage switching is made in the controller 30 under the condition that V8 is logically high.

Looking at the logical state of the voltage at each major point for zero voltage switching, first of all, the basic condition is that V8 is logically high level and V6 is also logically high level to secure the delay time, so that V5 is logical level state of V7. The logical level is inverted at. Under the above conditions, if V7 is logically low level and V5 is logically high level, V2 continues to be logically low, so that the clock pulses cannot be provided to the D flip flops F1 and F2, so that the controller 30 The square wave cannot be output to the system section.

Again indicates that the in the logical state of the V8 and V6 V7 is a logically high MOSFET (M1, M2) the voltage V _DD and the ground between, V5 is logically goes low thus V2 is a logically high in the Provides clock pulses to the D flip flops F1 and F2. The D flip-flops F1 and F2 are output so that the pulse signal of V2 can turn on across the MOSFETs M1 and M2.

5 is an input / output waveform diagram of a controller in the zero voltage switching control circuit of the resonant inverter according to the embodiment of the present invention.

FIG. 5 shows that the controller 30 receives the sawtooth wave from the sawtooth generator and determines that it is equal to or greater than a predetermined reference voltage V _R2 . The output V2 of the negative logic gate G31 using the square wave signal V8 determined as the one side input signal as the input signal V5 being the predetermined reference voltage or higher (V _R2 ) as the other side input signal. Doing.

The output signal V2 of the negative logic gate G31 is inputted by crossing each pulse with a transformer between the control unit 30 and the system unit 10 to alternately turn on the two MOSFETs M1 and M2. do. The D flip flops F1 and F2 are used to generate these crossover signals V3 and V4.

As described above, in the embodiment of the present invention, as the most important control function in the high frequency resonant inverter system, the main switching power device (MOSFET) of the main switching power device (MOSFET) is controlled by ensuring the zero voltage switching operation even under the input voltage variation and the wide load variation. Switching operation by sensing the voltage between the main switching elements to minimize the switching loss and maintain the constant load current even when the load impedance is changed, so that the zero voltage switching action of the resonant inverter can control power consumption arbitrarily. It is possible to provide a resonant inverter control circuit having an effect of ensuring the reliability.

Claims (4)

A resonant circuit that receives an external input power source to generate a resonant current, a switching circuit for charging / discharging capacitors connected in parallel to a switching element to receive a first control signal from the outside, and to switch zero voltage, and a bias resistor circuit connected to the switching circuit. A zero voltage switching determination unit configured to generate a determination signal for determining whether a voltage switching operation is performed by sensing a voltage between both ends of the switching circuit and a rectified voltage of the input power source; And a zero voltage switching control circuit including a zero voltage switching controller configured to receive the determination signal from a switching determination unit and generate a square wave for controlling the switching circuit of the system unit and apply the square wave to the system unit. 3. The zero voltage switching determination unit generates the determination signal only when the sawtooth signal is greater than the first reference voltage by receiving a sawtooth signal from an external source for a predetermined time delay. The zero voltage switching controller receives the sawtooth signal and compares it with a second reference voltage to generate the square wave signal only when the sawtooth signal is greater than the second reference voltage. And a reference voltage greater than two reference voltages, wherein the first and second reference voltages are smaller than a maximum value of the sawtooth wave signal. The zero voltage switching determination unit of claim 2, wherein the zero voltage switching determination unit includes a time delay circuit for delaying generation of the determination signal to operate the switching circuit after the charging / discharging capacitor of the system unit is fully charged and discharged. A resonant inverter having a voltage switching control circuit. The zero voltage switching control unit of claim 2, wherein the zero voltage switching determining unit compares two voltages above a predetermined potential and below a predetermined potential by receiving a rectified voltage of the input power of the system unit and a voltage between both ends of the switching hero. Resonant inverter with a circuit.