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JPWO2019167460A1 - Adhesives for semiconductors and methods for manufacturing semiconductor devices using them - Google Patents

Adhesives for semiconductors and methods for manufacturing semiconductor devices using them Download PDF

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JPWO2019167460A1
JPWO2019167460A1 JP2020502852A JP2020502852A JPWO2019167460A1 JP WO2019167460 A1 JPWO2019167460 A1 JP WO2019167460A1 JP 2020502852 A JP2020502852 A JP 2020502852A JP 2020502852 A JP2020502852 A JP 2020502852A JP WO2019167460 A1 JPWO2019167460 A1 JP WO2019167460A1
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semiconductor
adhesive
chip
resin
semiconductor adhesive
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JP7248007B2 (en
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徹弥 谷口
徹弥 谷口
慎 佐藤
慎 佐藤
幸一 茶花
幸一 茶花
恵子 上野
恵子 上野
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Resonac Corp
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Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
Resonac Corp
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    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02Non-macromolecular additives
    • C09J11/04Non-macromolecular additives inorganic
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/02Non-macromolecular additives
    • C09J11/06Non-macromolecular additives organic
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J11/00Features of adhesives not provided for in group C09J9/00, e.g. additives
    • C09J11/08Macromolecular additives
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/30Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/35Heat-activated
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/18Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/30Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
    • C09J2301/312Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier parameters being the characterizing feature
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Organic Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Inorganic Chemistry (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Wire Bonding (AREA)
  • Adhesive Tapes (AREA)
  • Die Bonding (AREA)

Abstract

半導体チップ及び配線回路基板のそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置、又は、複数の半導体チップのそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置において、接続部の少なくとも一部の封止に用いられる半導体用接着剤であって、半導体用接着剤のチキソトロピー値が、1.0以上、3.1以下であり、チキソトロピー値は、半導体用接着剤を厚さ400μmまで積層したサンプルについて、ずり粘度測定装置で温度120℃の一定条件にて周波数を1Hzから70Hzまで連続的に変化させた際の粘度を測定し、7Hz時の粘度値を70Hz時の粘度値で割った値である、半導体用接着剤。In a semiconductor device in which the electrodes of the connection portions of the semiconductor chip and the wiring circuit board are electrically connected to each other, or in a semiconductor device in which the electrodes of the connection portions of a plurality of semiconductor chips are electrically connected to each other. , A semiconductor adhesive used for encapsulating at least a part of a connection portion, wherein the semiconductor adhesive has a thixotropy value of 1.0 or more and 3.1 or less, and the thixotropy value is a semiconductor adhesive. The viscosity of a sample laminated to a thickness of 400 μm was measured with a shear viscosity measuring device when the frequency was continuously changed from 1 Hz to 70 Hz under constant conditions of a temperature of 120 ° C., and the viscosity value at 7 Hz was set to 70 Hz. Adhesive for semiconductors, which is the value divided by the viscosity value of.

Description

本開示は、半導体用接着剤及びそれを用いた半導体装置の製造方法に関する。 The present disclosure relates to an adhesive for semiconductors and a method for manufacturing a semiconductor device using the adhesive.

従来、半導体チップと基板を接続するには金ワイヤ等の金属細線を用いるワイヤーボンディング方式が広く適用されている。一方、半導体装置に対する高機能化、高集積化、高速化等の要求に対応するため、半導体チップ又は基板にバンプと呼ばれる導電性突起を形成して、半導体チップと基板間で直接接続するフリップチップ接続方式(FC接続方式)が広まりつつある。 Conventionally, a wire bonding method using a fine metal wire such as a gold wire has been widely applied to connect a semiconductor chip and a substrate. On the other hand, in order to meet the demands for high functionality, high integration, high speed, etc. for semiconductor devices, a flip chip in which conductive protrusions called bumps are formed on the semiconductor chip or substrate and directly connected between the semiconductor chip and the substrate. The connection method (FC connection method) is becoming widespread.

フリップチップ接続方式としては、はんだ、スズ、金、銀、銅等を用いて金属接合させる方法、超音波振動を印加して金属接合させる方法、樹脂の収縮力によって機械的接触を保持する方法などが知られているが、接続部の信頼性の観点から、はんだ、スズ、金、銀、銅等を用いて金属接合させる方法が一般的である。 Flip-chip connection methods include a method of metal bonding using solder, tin, gold, silver, copper, etc., a method of applying ultrasonic vibration to metal bonding, a method of maintaining mechanical contact by the shrinkage force of resin, etc. However, from the viewpoint of reliability of the connecting portion, a method of metal bonding using solder, tin, gold, silver, copper or the like is common.

例えば、半導体チップと基板間の接続においては、BGA(Ball Grid Array)、CSP(Chip Size Package)等に盛んに用いられているCOB(Chip On Board)型の接続方式もフリップチップ接続方式である。また、フリップチップ接続方式は、半導体チップ上に接続部(バンプ又は配線)を形成して、半導体チップ間で接続するCOC(Chip On Chip)型の接続方式にも広く用いられている(例えば、下記特許文献1参照)。 For example, in the connection between a semiconductor chip and a substrate, a COB (Chip On Board) type connection method, which is widely used in BGA (Ball Grid Array), CSP (Chip Size Package), etc., is also a flip chip connection method. .. The flip-chip connection method is also widely used in a COC (Chip On Chip) type connection method in which a connection portion (bump or wiring) is formed on a semiconductor chip and the semiconductor chips are connected to each other (for example,). See Patent Document 1 below).

さらなる小型化、薄型化、高機能化が強く要求されるパッケージでは、上述した接続方式を積層・多段化したチップスタック型パッケージ、POP(Package On Package)、TSV(Through−Silicon Via)等も広く普及し始めている。平面状でなく立体状に配置することでパッケージを小さくできることから、これらの技術は多用され、半導体の性能向上、ノイズ低減、実装面積の削減、省電力化にも有効であり、次世代の半導体配線技術として注目されている。 Chip stack type packages, POP (Package On Package), TSV (Through-Silicon Via), etc., in which the above-mentioned connection methods are stacked and multi-staged, are widely used in packages that are strongly required to be further miniaturized, thinned, and highly functional. It is beginning to spread. Since the package can be made smaller by arranging it in a three-dimensional shape instead of a flat shape, these technologies are widely used, and are effective for improving semiconductor performance, reducing noise, reducing mounting area, and saving power, and are effective for next-generation semiconductors. It is attracting attention as a wiring technology.

特開2016−102165号公報Japanese Unexamined Patent Publication No. 2016-102165

高機能化、高集積化、低コスト化が進んでいるフリップチップパッケージにおいて、高生産性のためにチップ搭載時の樹脂はみ出し幅を抑制し、チップを高密度に搭載することが求められる。そのため圧着の荷重を軽くすると樹脂はみ出し幅は抑制されるが、チップの角の部分が樹脂不足となり、チップ剥離等に繋がる懸念がある。 In flip-chip packages, which are becoming more sophisticated, highly integrated, and cost-effective, it is required to suppress the resin protrusion width when the chip is mounted and to mount the chip at a high density for high productivity. Therefore, if the crimping load is lightened, the resin protrusion width is suppressed, but there is a concern that the corners of the chip will be short of resin, leading to chip peeling and the like.

本開示は、チップ実装時にはみ出す樹脂形状を制御し、チップ側面に沿った形状で樹脂がはみ出ることで実装時に樹脂不足のない半導体装置を得ることのできる、半導体用接着剤とそれを用いた半導体装置の製造方法を提供することを主な目的とする。 In the present disclosure, a semiconductor adhesive and a semiconductor using the same can be obtained by controlling the shape of the resin that protrudes when the chip is mounted and by causing the resin to protrude along the side surface of the chip so that a semiconductor device without resin shortage can be obtained at the time of mounting. The main purpose is to provide a method for manufacturing the device.

本開示の一側面は、[1]半導体チップ及び配線回路基板のそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置、又は、複数の半導体チップのそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置において、上記接続部の少なくとも一部の封止に用いられる半導体用接着剤であって、上記半導体用接着剤のチキソトロピー値が、1.0以上、3.1以下であり、上記チキソトロピー値は、上記半導体用接着剤を厚さ400μmまで積層したサンプルについて、ずり粘度測定装置で温度120℃の一定条件にて周波数を1Hzから70Hzまで連続的に変化させた際の粘度を測定し、7Hz時の粘度値を70Hz時の粘度値で割った値である、半導体用接着剤である。 One aspect of the present disclosure is that [1] a semiconductor device in which the electrodes of the connection portions of the semiconductor chip and the wiring circuit board are electrically connected to each other, or the electrodes of the connection portions of a plurality of semiconductor chips are connected to each other. In semiconductor devices electrically connected to each other, a semiconductor adhesive used for sealing at least a part of the connection portion, and the thixotropy value of the semiconductor adhesive is 1.0 or more and 3.1. The above thixotropy value is obtained when the frequency of a sample in which the above semiconductor adhesive is laminated to a thickness of 400 μm is continuously changed from 1 Hz to 70 Hz under a constant condition of a temperature of 120 ° C. by a shear viscosity measuring device. Is a semiconductor adhesive, which is a value obtained by measuring the viscosity of the semiconductor and dividing the viscosity value at 7 Hz by the viscosity value at 70 Hz.

また、本開示の他の側面は、[2](a)エポキシ樹脂、(b)硬化剤、及び、(c)重量平均分子量10000以上の高分子量成分を含有する、上記[1]に記載の半導体用接着剤である。 The other aspect of the present disclosure is described in the above [1], which contains [2] (a) an epoxy resin, (b) a curing agent, and (c) a high molecular weight component having a weight average molecular weight of 10,000 or more. It is an adhesive for semiconductors.

また、本開示の他の側面は、[3]さらに(d)フィラーを含有する、上記[2]に記載の半導体用接着剤である。 Further, another aspect of the present disclosure is the semiconductor adhesive according to the above [2], which further contains [3] and (d) a filler.

また、本開示の他の側面は、[4]さらに(e)フラックス剤を含有する、上記[2]又は[3]に記載の半導体用接着剤である。 Further, another aspect of the present disclosure is the semiconductor adhesive according to the above [2] or [3], which further contains [4] and (e) a flux agent.

また、本開示の他の側面は、[5]上記(c)重量平均分子量10000以上の高分子量成分の多分散度Mw/Mnが3以下である、上記[2]〜[4]のいずれかに記載の半導体用接着剤である。 In addition, another aspect of the present disclosure is any of the above [2] to [4], wherein the polydispersity Mw / Mn of the high molecular weight component having a weight average molecular weight of 10,000 or more is 3 or less. The semiconductor adhesive according to the above.

また、本開示の他の側面は、[6]上記半導体用接着剤に含有される材料の一部もしくは全てが、シクロヘキサノンに可溶である、上記[2]〜[5]のいずれかに記載の半導体用接着剤である。 Further, another aspect of the present disclosure is described in any one of the above [2] to [5], wherein a part or all of the material contained in the above-mentioned semiconductor adhesive is soluble in cyclohexanone. Adhesive for semiconductors.

また、本開示の他の側面は、[7]フィルム状である、上記[1]〜[6]のいずれかに記載の半導体用接着剤である。 Further, another aspect of the present disclosure is the semiconductor adhesive according to any one of the above [1] to [6], which is in the form of a film [7].

さらに、本開示の他の側面は、[8]上記[1]〜[7]のいずれかに記載の半導体用接着剤を用い、接続装置により上記半導体用接着剤を介して半導体チップ及び配線回路基板の位置合わせを行い、互いに接続すると共に半導体チップ及び配線回路基板のそれぞれの接続部の電極同士を互いに電気的に接続し、上記接続部の少なくとも一部を上記半導体用接着剤で封止する工程、又は、接続装置により上記半導体用接着剤を介して複数の半導体チップの位置合わせを行い、互いに接続すると共に複数の半導体チップのそれぞれの接続部の電極同士を互いに電気的に接続し、上記接続部の少なくとも一部を上記半導体用接着剤で封止する工程を備える、半導体装置の製造方法である。 Further, another aspect of the present disclosure is to use the semiconductor adhesive according to any one of [8] above [1] to [7], and to use a connecting device via the semiconductor adhesive to make a semiconductor chip and a wiring circuit. Align the substrates, connect them to each other, electrically connect the electrodes of the respective connection portions of the semiconductor chip and the wiring circuit substrate to each other, and seal at least a part of the connection portions with the semiconductor adhesive. A process or a connecting device aligns a plurality of semiconductor chips via the semiconductor adhesive, connects the semiconductor chips to each other, and electrically connects the electrodes of the connecting portions of the plurality of semiconductor chips to each other. This is a method for manufacturing a semiconductor device, comprising a step of sealing at least a part of a connecting portion with the above-mentioned semiconductor adhesive.

本開示によれば、半導体用接着剤のチキソトロピー値を制御することで半導体装置実装時のチップ外周部への樹脂はみ出し形状を制御し、チップ側面に沿った形状で樹脂がはみ出ることで樹脂不足を抑制することができる。また、本開示によれば、このような半導体用接着剤を用いた半導体装置及びその製造方法を提供することができる。 According to the present disclosure, by controlling the thixotropy value of the semiconductor adhesive, the shape of the resin protruding to the outer periphery of the chip at the time of mounting the semiconductor device is controlled, and the resin protrudes along the side surface of the chip to prevent the resin shortage. It can be suppressed. Further, according to the present disclosure, it is possible to provide a semiconductor device using such an adhesive for semiconductors and a method for manufacturing the same.

本開示に係る半導体装置の一実施形態を示す模式断面図である。It is a schematic cross-sectional view which shows one Embodiment of the semiconductor device which concerns on this disclosure. 本開示に係る半導体装置の他の一実施形態を示す模式断面図である。It is a schematic cross-sectional view which shows the other embodiment of the semiconductor device which concerns on this disclosure. 本開示に係る半導体装置の他の一実施形態を示す模式断面図である。It is a schematic cross-sectional view which shows the other embodiment of the semiconductor device which concerns on this disclosure. 本開示に係る半導体装置の他の一実施形態を示す模式断面図である。It is a schematic cross-sectional view which shows the other embodiment of the semiconductor device which concerns on this disclosure.

以下、場合により図面を参照しつつ本開示の好適な実施形態について詳細に説明する。なお、図面中、同一又は相当部分には同一符号を付し、重複する説明は省略する。また、上下左右等の位置関係は、特に断らない限り、図面に示す位置関係に基づくものとする。さらに、図面の寸法比率は図示の比率に限られるものではない。 Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the drawings in some cases. In the drawings, the same or corresponding parts are designated by the same reference numerals, and duplicate description will be omitted. Further, unless otherwise specified, the positional relationship such as up, down, left, and right shall be based on the positional relationship shown in the drawings. Furthermore, the dimensional ratios in the drawings are not limited to the ratios shown.

本明細書において、「〜」を用いて示された数値範囲は、「〜」の前後に記載される数値をそれぞれ最小値及び最大値として含む範囲を示す。本明細書に段階的に記載されている数値範囲において、ある段階の数値範囲の上限値又は下限値は、他の段階の数値範囲の上限値又は下限値と任意に組み合わせることができる。本明細書に記載されている数値範囲において、その数値範囲の上限値又は下限値は、実施例に示されている値に置き換えてもよい。「A又はB」とは、A及びBのどちらか一方を含んでいればよく、両方とも含んでいてもよい。本明細書に例¥示する材料は、特に断らない限り、1種を単独で又は2種以上を組み合わせて用いることができる。本明細書において、「(メタ)アクリル」とは、アクリル又はそれに対応するメタクリルを意味する。 In the present specification, the numerical range indicated by using "~" indicates a range including the numerical values before and after "~" as the minimum value and the maximum value, respectively. In the numerical range described stepwise in the present specification, the upper limit value or the lower limit value of the numerical range of one step can be arbitrarily combined with the upper limit value or the lower limit value of the numerical range of another step. In the numerical range described in the present specification, the upper limit value or the lower limit value of the numerical range may be replaced with the value shown in the examples. “A or B” may include either A or B, or both. Unless otherwise specified, the materials shown in the examples of the present specification may be used alone or in combination of two or more. As used herein, the term "(meth) acrylic" means acrylic or the corresponding methacrylic.

<半導体用接着剤>
本実施形態に係る半導体用接着剤は、半導体チップ及び配線回路基板のそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置、又は、複数の半導体チップのそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置において、上記接続部の少なくとも一部の封止に用いられる。
<Adhesive for semiconductors>
The semiconductor adhesive according to the present embodiment is a semiconductor device in which the electrodes of the connection portions of the semiconductor chip and the wiring circuit board are electrically connected to each other, or the electrodes of the connection portions of a plurality of semiconductor chips. Are used to seal at least a portion of the connection in semiconductor devices that are electrically connected to each other.

本実施形態に係る半導体用接着剤は、チキソトロピー値が1.0以上3.1以下である。チキソトロピー値は、上記半導体用接着剤を厚さ400μmまで積層したサンプルについて、ずり粘度測定装置で温度120℃の一定条件にて周波数を1Hzから70Hzまで連続的に変化させた際の粘度を測定し、7Hz時の粘度値を70Hz時の粘度値で割った値である。チキソトロピー値が3.1以下であると、チップ実装時に加わる剪断が最も小さくなるチップの角であっても半導体用接着剤が十分に流動することができ、チップ側面に沿った形状で樹脂がはみ出ることとなる。なお、チキソトロピー値は、1.5以上、2.0以上、又は、2.5以上であってもよい。 The semiconductor adhesive according to this embodiment has a thixotropy value of 1.0 or more and 3.1 or less. The thixotropy value is measured by measuring the viscosity of a sample in which the above-mentioned semiconductor adhesive is laminated to a thickness of 400 μm when the frequency is continuously changed from 1 Hz to 70 Hz under a constant temperature of 120 ° C. with a shear viscosity measuring device. , The value obtained by dividing the viscosity value at 7 Hz by the viscosity value at 70 Hz. When the thixotropy value is 3.1 or less, the semiconductor adhesive can sufficiently flow even at the corner of the chip where the shear applied at the time of chip mounting is the smallest, and the resin protrudes in a shape along the side surface of the chip. It will be. The thixotropy value may be 1.5 or more, 2.0 or more, or 2.5 or more.

本実施形態に係る半導体用接着剤は、(a)エポキシ樹脂、(b)硬化剤、(c)重量平均分子量10000以上の高分子量成分を含有してもよく、さらに(d)フィラー、(e)フラックス剤を含有すると好ましい。 The semiconductor adhesive according to the present embodiment may contain (a) an epoxy resin, (b) a curing agent, (c) a high molecular weight component having a weight average molecular weight of 10,000 or more, and (d) a filler, (e). ) It is preferable to contain a flux agent.

((a)成分:エポキシ樹脂)
(a)成分のエポキシ樹脂としては、分子内に2個以上のエポキシ基を有するエポキシ樹脂が挙げられ、ビスフェノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹脂、ナフタレン型エポキシ樹脂、フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、フェノールアラルキル型エポキシ樹脂、ビフェニル型エポキシ樹脂、トリフェニルメタン型エポキシ樹脂、ジシクロペンタジエン型エポキシ樹脂、各種多官能エポキシ樹脂等を使用することができる。(a)成分は、1種単独で又は2種以上を組み合わせて用いることができる。
((A) component: epoxy resin)
Examples of the component (a) component epoxy resin include epoxy resins having two or more epoxy groups in the molecule, such as bisphenol A type epoxy resin, bisphenol F type epoxy resin, naphthalene type epoxy resin, and phenol novolac type epoxy resin. Cresol novolac type epoxy resin, phenol aralkyl type epoxy resin, biphenyl type epoxy resin, triphenylmethane type epoxy resin, dicyclopentadiene type epoxy resin, various polyfunctional epoxy resins and the like can be used. The component (a) can be used alone or in combination of two or more.

(a)成分の含有量は、半導体用接着剤の固形分全量を基準として好ましくは10〜50質量%であり、より好ましくは15〜45質量%であり、さらに好ましくは20〜40質量%である。(a)成分の含有量が10質量%以上であると、硬化後の樹脂の流動を十分に制御しやすく、50質量%以下であると、硬化物の樹脂成分が多くなりすぎず、パッケージの反りを低減しやすい。また、(a)成分の含有量を上記範囲内とすることで、半導体用接着剤のチキソトロピー値を1.0以上3.1以下に制御しやすい。樹脂成分が少なくフィラー含有量が多い方がチキソトロピー値は小さくなりやすいため、(a)成分の含有量を50質量%以下とすることでチキソトロピー値を下げやすくなる。 The content of the component (a) is preferably 10 to 50% by mass, more preferably 15 to 45% by mass, and further preferably 20 to 40% by mass based on the total solid content of the semiconductor adhesive. is there. When the content of the component (a) is 10% by mass or more, it is easy to sufficiently control the flow of the resin after curing, and when it is 50% by mass or less, the resin component of the cured product does not become too large and the package Easy to reduce warpage. Further, by setting the content of the component (a) within the above range, it is easy to control the thixotropy value of the semiconductor adhesive to 1.0 or more and 3.1 or less. Since the thixotropy value tends to be smaller when the resin component is small and the filler content is high, the thixotropy value can be easily lowered by setting the content of the component (a) to 50% by mass or less.

((b)成分:硬化剤)
本実施形態に係る半導体用接着剤は、(b)硬化剤を含有する。硬化剤としては、フェノール樹脂系硬化剤、酸無水物系硬化剤、アミン系硬化剤、イミダゾール系硬化剤及びホスフィン系硬化剤等が挙げられる。(b)成分がフェノール性水酸基、酸無水物、アミン類又はイミダゾール類を含むと、接続部に酸化膜が生じることを抑制するフラックス活性を示しやすく、接続信頼性・絶縁信頼性を容易に向上させることができる。以下、各硬化剤について説明する。
((B) component: curing agent)
The semiconductor adhesive according to this embodiment contains (b) a curing agent. Examples of the curing agent include a phenol resin-based curing agent, an acid anhydride-based curing agent, an amine-based curing agent, an imidazole-based curing agent, and a phosphine-based curing agent. (B) When the component contains a phenolic hydroxyl group, an acid anhydride, amines or imidazoles, it is easy to show a flux activity that suppresses the formation of an oxide film at the connection portion, and the connection reliability and insulation reliability are easily improved. Can be made to. Hereinafter, each curing agent will be described.

(b−i)フェノール樹脂系硬化剤
フェノール樹脂系硬化剤としては、分子内に2個以上のフェノール性水酸基を有する硬化剤が挙げられ、フェノールノボラック樹脂、クレゾールノボラック樹脂、フェノールアラルキル樹脂、クレゾールナフトールホルムアルデヒド重縮合物、トリフェニルメタン型多官能フェノール樹脂、各種多官能フェノール樹脂等を使用することができる。フェノール樹脂系硬化剤は、1種単独で又は2種以上を組み合わせて用いることができる。
(Bi) Phenol resin-based curing agent Examples of the phenol resin-based curing agent include a curing agent having two or more phenolic hydroxyl groups in the molecule, such as phenol novolac resin, cresol novolac resin, phenol aralkyl resin, and cresol naphthol. Formaldehyde polycondensate, triphenylmethane type polyfunctional phenol resin, various polyfunctional phenol resins and the like can be used. The phenol resin-based curing agent can be used alone or in combination of two or more.

上記(a)成分に対するフェノール樹脂系硬化剤の当量比(フェノール性水酸基/エポキシ基、モル比)は、硬化性、接着性及び保存安定性に優れる観点から、0.3〜1.5が好ましく、0.4〜1.0がより好ましく、0.5〜1.0がさらに好ましい。当量比が0.3以上であると、硬化性が向上し接着力が向上する傾向があり、1.5以下であると、未反応のフェノール性水酸基が過剰に残存することがなく、吸水率が低く抑えられ、絶縁信頼性がさらに向上する傾向がある。 The equivalent ratio (phenolic hydroxyl group / epoxy group, molar ratio) of the phenol resin-based curing agent to the component (a) is preferably 0.3 to 1.5 from the viewpoint of excellent curability, adhesiveness and storage stability. , 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is even more preferable. When the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved, and when it is 1.5 or less, unreacted phenolic hydroxyl groups do not remain excessively and the water absorption rate. Is kept low, and the insulation reliability tends to be further improved.

(b−ii)酸無水物系硬化剤
酸無水物系硬化剤としては、メチルシクロヘキサンテトラカルボン酸二無水物、無水トリメリット酸、無水ピロメリット酸、ベンゾフェノンテトラカルボン酸二無水物、エチレングリコールビスアンヒドロトリメリテート等を使用することができる。酸無水物系硬化剤は、1種単独で又は2種以上を組み合わせて用いることができる。
(B-ii) Acid anhydride-based curing agent Examples of the acid anhydride-based curing agent include methylcyclohexanetetracarboxylic dianhydride, trimellitic anhydride, pyromellitic anhydride, benzophenone tetracarboxylic dianhydride, and ethylene glycol bis. Anhydrotrimellitic or the like can be used. The acid anhydride-based curing agent may be used alone or in combination of two or more.

上記(a)成分に対する酸無水物系硬化剤の当量比(酸無水物基/エポキシ基、モル比)は、硬化性、接着性及び保存安定性に優れる観点から、0.3〜1.5が好ましく、0.4〜1.0がより好ましく、0.5〜1.0がさらに好ましい。当量比が0.3以上であると、硬化性が向上し接着力が向上する傾向があり、1.5以下であると、未反応の酸無水物が過剰に残存することがなく、吸水率が低く抑えられ、絶縁信頼性がさらに向上する傾向がある。 The equivalent ratio (acid anhydride group / epoxy group, molar ratio) of the acid anhydride-based curing agent to the component (a) is 0.3 to 1.5 from the viewpoint of excellent curability, adhesiveness and storage stability. Is preferable, 0.4 to 1.0 is more preferable, and 0.5 to 1.0 is further preferable. When the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved, and when it is 1.5 or less, unreacted acid anhydride does not remain excessively and the water absorption rate. Is kept low, and the insulation reliability tends to be further improved.

(b−iii)アミン系硬化剤
アミン系硬化剤としては、ジシアンジアミド、各種アミン化合物等を使用することができる。
(B-iii) Amine-based curing agent As the amine-based curing agent, dicyandiamide, various amine compounds and the like can be used.

上記(a)成分に対するアミン系硬化剤の当量比(アミン/エポキシ基、モル比)は、硬化性、接着性及び保存安定性に優れる観点から0.3〜1.5が好ましく、0.4〜1.0がより好ましく、0.5〜1.0がさらに好ましい。当量比が0.3以上であると、硬化性が向上し接着力が向上する傾向があり、1.5以下であると、未反応のアミンが過剰に残存することがなく、絶縁信頼性がさらに向上する傾向がある。 The equivalent ratio (amine / epoxy group, molar ratio) of the amine-based curing agent to the component (a) is preferably 0.3 to 1.5 from the viewpoint of excellent curability, adhesiveness and storage stability, and is preferably 0.4. ~ 1.0 is more preferable, and 0.5 to 1.0 is even more preferable. When the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesive strength tends to be improved, and when it is 1.5 or less, unreacted amine does not remain excessively and the insulation reliability is improved. It tends to improve further.

(b−iv)イミダゾール系硬化剤
イミダゾール系硬化剤としては、2−フェニルイミダゾール、2−フェニル−4−メチルイミダゾール、1−ベンジル−2−メチルイミダゾール、1−ベンジル−2−フェニルイミダゾール、1−シアノエチル−2−ウンデシルイミダゾール、1−シアノ−2−フェニルイミダゾール、1−シアノエチル−2−ウンデシルイミダゾールトリメリテイト、1−シアノエチル−2−フェニルイミダゾリウムトリメリテイト、2,4−ジアミノ−6−[2’−メチルイミダゾリル−(1’)]−エチル−s−トリアジン、2,4−ジアミノ−6−[2’−ウンデシルイミダゾリル−(1’)]−エチル−s−トリアジン、2,4−ジアミノ−6−[2’−エチル−4’−メチルイミダゾリル−(1’)]−エチル−s−トリアジン、2,4−ジアミノ−6−[2’−メチルイミダゾリル−(1’)]−エチル−s−トリアジンイソシアヌル酸付加体、2−フェニルイミダゾールイソシアヌル酸付加体、2−フェニル−4,5−ジヒドロキシメチルイミダゾール、2−フェニル−4−メチル−5−ヒドロキシメチルイミダゾール、エポキシ樹脂とイミダゾール類の付加体等が挙げられる。これらの中でも、硬化性、保存安定性及び接続信頼性にさらに優れる観点から、1−シアノエチル−2−ウンデシルイミダゾール、1−シアノ−2−フェニルイミダゾール、1−シアノエチル−2−ウンデシルイミダゾールトリメリテイト、1−シアノエチル−2−フェニルイミダゾリウムトリメリテイト、2,4−ジアミノ−6−[2’−メチルイミダゾリル−(1’)]−エチル−s−トリアジン、2,4−ジアミノ−6−[2’−エチル−4’−メチルイミダゾリル−(1’)]−エチル−s−トリアジン、2,4−ジアミノ−6−[2’−メチルイミダゾリル−(1’)]−エチル−s−トリアジンイソシアヌル酸付加体、2−フェニルイミダゾールイソシアヌル酸付加体、2−フェニル−4,5−ジヒドロキシメチルイミダゾール及び2−フェニル−4−メチル−5−ヒドロキシメチルイミダゾールが好ましい。イミダゾール系硬化剤は、1種単独で又は2種以上を組み合わせて用いることができる。また、これらをマイクロカプセル化した潜在性硬化剤としてもよい。
(B-iv) Imidazole-based curing agent Examples of the imidazole-based curing agent include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-. Cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimerite, 1-cyanoethyl-2-phenylimidazolium trimerite, 2,4-diamino-6 -[2'-methylimidazolyl- (1')]-ethyl-s-triazine, 2,4-diamino-6- [2'-undecylimidazolyl- (1')]-ethyl-s-triazine, 2, 4-Diamino-6- [2'-ethyl-4'-methylimidazolyl- (1')] -ethyl-s-triazine, 2,4-diamino-6- [2'-methylimidazolyl- (1')] -Ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole, epoxy resin and imidazole Examples include adducts of the type. Among these, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimeri are further excellent in curability, storage stability and connection reliability. Tate, 1-cyanoethyl-2-phenylimidazolium trimerite, 2,4-diamino-6- [2'-methylimidazolyl- (1')]-ethyl-s-triazine, 2,4-diamino-6- [2'-Ethyl-4'-methylimidazolyl- (1')]-ethyl-s-triazine, 2,4-diamino-6- [2'-methylimidazolyl- (1')]-ethyl-s-triazine Isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole and 2-phenyl-4-methyl-5-hydroxymethylimidazole are preferred. The imidazole-based curing agent may be used alone or in combination of two or more. Further, these may be used as a microencapsulated latent curing agent.

イミダゾール系硬化剤の含有量は、(a)成分100質量部に対して、0.1〜20質量部が好ましく、0.1〜10質量部がより好ましい。イミダゾール系硬化剤の含有量が0.1質量部以上であると、硬化性が向上する傾向があり、20質量部以下であると、金属接合が形成される前に接着剤組成物が硬化することがなく、接続不良が発生しにくい傾向がある。 The content of the imidazole-based curing agent is preferably 0.1 to 20 parts by mass, more preferably 0.1 to 10 parts by mass with respect to 100 parts by mass of the component (a). When the content of the imidazole-based curing agent is 0.1 parts by mass or more, the curability tends to be improved, and when it is 20 parts by mass or less, the adhesive composition is cured before the metal bond is formed. There is no tendency for poor connection to occur.

(b−v)ホスフィン系硬化剤
ホスフィン系硬化剤としては、トリフェニルホスフィン、テトラフェニルホスホニウムテトラフェニルボレート、テトラフェニルホスホニウムテトラ(4−メチルフェニル)ボレート及びテトラフェニルホスホニウム(4−フルオロフェニル)ボレート等が挙げられる。
(Vv) Phosphine-based curing agent Examples of the phosphine-based curing agent include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetra (4-methylphenyl) borate, and tetraphenylphosphonium (4-fluorophenyl) borate. Can be mentioned.

ホスフィン系硬化剤の含有量は、(a)成分100質量部に対して、0.1〜10質量部が好ましく、0.1〜5質量部がより好ましい。ホスフィン系硬化剤の含有量が0.1質量部以上であると、硬化性が向上する傾向があり、10質量部以下であると、金属接合が形成される前に半導体用接着剤が硬化することがなく、接続不良が発生しにくい傾向がある。 The content of the phosphine-based curing agent is preferably 0.1 to 10 parts by mass, more preferably 0.1 to 5 parts by mass with respect to 100 parts by mass of the component (a). When the content of the phosphine-based curing agent is 0.1 parts by mass or more, the curability tends to be improved, and when it is 10 parts by mass or less, the semiconductor adhesive is cured before the metal bond is formed. There is no tendency for poor connection to occur.

フェノール樹脂系硬化剤、酸無水物系硬化剤及びアミン系硬化剤は、それぞれ1種単独で又は2種以上を組み合わせて用いることができる。イミダゾール系硬化剤及びホスフィン系硬化剤はそれぞれ単独で用いてもよいが、フェノール樹脂系硬化剤、酸無水物系硬化剤又はアミン系硬化剤と共に用いてもよい。 The phenol resin-based curing agent, the acid anhydride-based curing agent, and the amine-based curing agent can be used alone or in combination of two or more. The imidazole-based curing agent and the phosphine-based curing agent may be used alone, or may be used together with a phenol resin-based curing agent, an acid anhydride-based curing agent, or an amine-based curing agent.

(b)成分としては、硬化性に優れる観点から、フェノール樹脂系硬化剤とイミダゾール系硬化剤の併用、酸無水物系硬化剤とイミダゾール系硬化剤の併用、アミン系硬化剤とイミダゾール系硬化剤の併用、イミダゾール系硬化剤単独使用が好ましい。短時間で接続すると生産性が向上することから、速硬化性に優れたイミダゾール系硬化剤単独使用がより好ましい。この場合、短時間で硬化すると低分子成分等の揮発分が抑制できることから、ボイドの発生を容易に抑制することもできる。 As the component (b), from the viewpoint of excellent curability, a phenol resin-based curing agent and an imidazole-based curing agent are used in combination, an acid anhydride-based curing agent and an imidazole-based curing agent are used in combination, and an amine-based curing agent and an imidazole-based curing agent are used in combination. It is preferable to use the imidazole-based curing agent alone. Since the productivity is improved when the connection is made in a short time, it is more preferable to use the imidazole-based curing agent having excellent quick curing property alone. In this case, since the volatile components such as low molecular weight components can be suppressed by curing in a short time, the generation of voids can be easily suppressed.

((c)成分:重量平均分子量10000以上の高分子量成分)
(c)重量平均分子量10000以上の高分子量成分((a)成分に該当する化合物を除く)としては、フェノキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリカルボジイミド樹脂、シアネートエステル樹脂、(メタ)アクリル樹脂、ポリエステル樹脂、ポリエチレン樹脂、ポリエーテルスルホン樹脂、ポリエーテルイミド樹脂、ポリビニルアセタール樹脂、ポリウレタン樹脂、アクリルゴム等が挙げられ、その中でも、耐熱性及びフィルム形成性に優れる観点から、フェノキシ樹脂、ポリイミド樹脂、(メタ)アクリル樹脂、アクリルゴム、シアネートエステル樹脂、ポリカルボジイミド樹脂が好ましく、フェノキシ樹脂、ポリイミド樹脂、(メタ)アクリル樹脂、アクリルゴムがより好ましい。(c)成分は、単独又は2種以上の混合体又は共重合体として使用することもできる。
(Component (c): High molecular weight component having a weight average molecular weight of 10,000 or more)
Examples of the high molecular weight component (excluding the compound corresponding to the component (a)) having a weight average molecular weight of 10,000 or more include phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, cyanate ester resin, and (meth) acrylic resin. Examples thereof include polyester resin, polyethylene resin, polyether sulfone resin, polyetherimide resin, polyvinyl acetal resin, polyurethane resin, acrylic rubber, etc. Among them, phenoxy resin, polyimide resin, etc. from the viewpoint of excellent heat resistance and film forming property. (Meta) acrylic resin, acrylic rubber, cyanate ester resin, and polycarbodiimide resin are preferable, and phenoxy resin, polyimide resin, (meth) acrylic resin, and acrylic rubber are more preferable. The component (c) can also be used alone or as a mixture of two or more kinds or a copolymer.

(c)成分と(a)成分との質量比は、特に制限されないが、フィルム状を保持するためには、(c)成分1質量部に対して、(a)成分の含有量は、0.01〜5質量部であることが好ましく、0.05〜4質量部であることがより好ましく、0.1〜3質量部であることがさらに好ましい。(a)成分の含有量が0.01質量部以上であると、硬化性が低下したり、接着力が低下することがなく、含有量が5質量部以下であると、フィルム形成性及び膜形成性が低下することがない。また、(c)成分と(a)成分との組み合わせ、及びそれらの質量比によっても、チキソトロピー値を調整することができる。 The mass ratio of the component (c) to the component (a) is not particularly limited, but in order to maintain the film shape, the content of the component (a) is 0 with respect to 1 part by mass of the component (c). It is preferably 0.01 to 5 parts by mass, more preferably 0.05 to 4 parts by mass, and further preferably 0.1 to 3 parts by mass. When the content of the component (a) is 0.01 parts by mass or more, the curability does not decrease or the adhesive strength does not decrease, and when the content is 5 parts by mass or less, the film formability and the film are formed. The formability does not decrease. The thixotropy value can also be adjusted by the combination of the component (c) and the component (a) and their mass ratios.

(c)成分の重量平均分子量は、ポリスチレン換算で10000以上であるが、単独で良好なフィルム形成性を示すために、30000以上が好ましく、40000以上がより好ましく、50000以上がさらに好ましい。重量平均分子量が10000以上である場合にはフィルム形成性が低下する恐れがない。なお、本明細書において、重量平均分子量とは、高速液体クロマトグラフィー(株式会社島津製作所製C−R4A)を用いて、ポリスチレン換算で測定したときの重量平均分子量を意味する。 The weight average molecular weight of the component (c) is 10,000 or more in terms of polystyrene, but it is preferably 30,000 or more, more preferably 40,000 or more, still more preferably 50,000 or more, in order to exhibit good film forming property by itself. When the weight average molecular weight is 10,000 or more, there is no possibility that the film formability is deteriorated. In addition, in this specification, the weight average molecular weight means the weight average molecular weight when measured in polystyrene conversion using high performance liquid chromatography (C-R4A manufactured by Shimadzu Corporation).

(c)成分の多分散度Mw/Mnは、3以下であることが好ましく、2.5以下であることがより好ましい。Mw/Mnが3以下であると、分子量のばらつきが少なくチキソトロピー値が低くなりやすい傾向があると考えられる。 The degree of polydispersity Mw / Mn of the component (c) is preferably 3 or less, and more preferably 2.5 or less. When Mw / Mn is 3 or less, it is considered that the variation in molecular weight is small and the thixotropy value tends to be low.

((d)成分:フィラー)
(d)成分のフィラーとしては、絶縁性無機フィラー等が挙げられる。中でも、平均粒径100nm以下の無機フィラーであればより好ましい。絶縁性無機フィラーとしては、ガラス、シリカ、アルミナ、酸化チタン、マイカ、窒化ホウ素等が挙げられ、その中でも、シリカ、アルミナ、酸化チタン、窒化ホウ素が好ましく、シリカ、アルミナ、窒化ホウ素がより好ましい。絶縁性無機フィラーは、ウィスカーであってもよく、ウィスカーとしては、ホウ酸アルミニウム、チタン酸アルミニウム、酸化亜鉛、珪酸カルシウム、硫酸マグネシウム、窒化ホウ素等が挙げられる。絶縁性無機フィラーは、1種単独で又は2種以上を組み合わせて用いることができる。(d)成分の形状、粒径、及び含有量は特に制限されない。
((D) component: filler)
Examples of the filler of the component (d) include an insulating inorganic filler and the like. Above all, an inorganic filler having an average particle size of 100 nm or less is more preferable. Examples of the insulating inorganic filler include glass, silica, alumina, titanium oxide, mica, and boron nitride. Among them, silica, alumina, titanium oxide, and boron nitride are preferable, and silica, alumina, and boron nitride are more preferable. The insulating inorganic filler may be a whisker, and examples of the whisker include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride. The insulating inorganic filler may be used alone or in combination of two or more. (D) The shape, particle size, and content of the component are not particularly limited.

絶縁信頼性にさらに優れる観点から、(d)成分は絶縁性であることが好ましい。本実施形態に係る半導体用接着剤は、銀フィラー、はんだフィラー等の導電性の金属フィラーを含有していないことが好ましい。 From the viewpoint of further excellent insulation reliability, the component (d) is preferably insulating. The semiconductor adhesive according to this embodiment preferably does not contain a conductive metal filler such as a silver filler or a solder filler.

(d)成分は、分散性及び接着力が向上する観点から、表面処理を施したフィラーであることが好ましい。表面処理剤としては、グリシジル系(エポキシ系)化合物((a)成分に該当する化合物を除く)、アミン系化合物、フェニル系化合物、フェニルアミノ系化合物、(メタ)アクリル系化合物(例えば、下記一般式(1)で表される構造を有する化合物)、下記一般式(2)で表される構造を有するビニル系化合物等が挙げられる。 The component (d) is preferably a surface-treated filler from the viewpoint of improving dispersibility and adhesive strength. Examples of the surface treatment agent include glycidyl-based (epoxy-based) compounds (excluding compounds corresponding to component (a)), amine-based compounds, phenyl-based compounds, phenylamino-based compounds, and (meth) acrylic-based compounds (for example, the following general). Examples thereof include a compound having a structure represented by the formula (1)), a vinyl compound having a structure represented by the following general formula (2), and the like.

Figure 2019167460
[R11は、水素原子又はアルキル基を示し、R12は、アルキレン基を示す。]
Figure 2019167460
[R 11 represents a hydrogen atom or an alkyl group, and R 12 represents an alkylene group. ]

一般式(1)で表される構造を有する化合物により表面処理されたフィラーとしては、R11が水素原子であるアクリル表面処理フィラー、R11がメチル基であるメタクリル表面処理フィラー、R11がエチル基であるエタクリル表面処理フィラー等が挙げられ、半導体用接着剤に含まれる樹脂及び半導体基板の表面との反応性、並びに結合形成の観点から、R11が嵩高くない、アクリル表面処理フィラー、メタクリル表面処理フィラーが好ましい。R12も特に制限はないが、重量平均分子量が高い方が揮発成分も少ないため好ましい。Examples of the filler surface-treated with the compound having the structure represented by the general formula (1) include an acrylic surface-treated filler in which R 11 is a hydrogen atom, a methacrylic surface-treated filler in which R 11 is a methyl group, and R 11 is ethyl. include ethacrylic surface treatment filler such as a group, the reactivity of the resin and the semiconductor substrate of the surface contained in the semiconductor adhesive, as well as in terms of bond formation, R 11 is not bulky, acrylic surface treatment filler, methacrylic Surface-treated fillers are preferred. R 12 is also not particularly limited, but a higher weight average molecular weight is preferable because it has less volatile components.

Figure 2019167460
[R21、R22及びR23は、1価の有機基を示し、R24は、アルキレン基を示す。]
Figure 2019167460
[R 21 , R 22 and R 23 represent a monovalent organic group and R 24 represents an alkylene group. ]

例えば、反応性が低下しない観点から、R21、R22及びR23は、比較的嵩高くない基であることが好ましく、例えば水素原子又はアルキル基であってもよい。また、R21、R22及びR23は、ビニル基の反応性が向上する1価の有機基であってもよい。R24も特に制限はないが、揮発しにくいためボイドが容易に低減できる観点から、重量平均分子量が高い方が好ましい。また、R21、R22、R23及びR24は、表面処理の容易さで選定してもよい。For example, from the viewpoint of not reducing the reactivity, R 21 , R 22 and R 23 are preferably groups that are not relatively bulky, and may be, for example, a hydrogen atom or an alkyl group. Further, R 21 , R 22 and R 23 may be monovalent organic groups in which the reactivity of the vinyl group is improved. R 24 is also not particularly limited, but it is preferable that the weight average molecular weight is high from the viewpoint that voids can be easily reduced because it is hard to volatilize. Further, R 21 , R 22 , R 23 and R 24 may be selected depending on the ease of surface treatment.

表面処理剤としては、表面処理のしやすさから、エポキシ系シラン、アミノ系シラン、(メタ)アクリル系シラン等のシラン処理剤が好ましい。表面処理剤としては、分散性、流動性、接着力に優れる観点から、グリシジル系、フェニルアミノ系、(メタ)アクリル系の化合物が好ましい。表面処理剤としては、保存安定性に優れる観点から、フェニル系、(メタ)アクリル系の化合物がより好ましい。 As the surface treatment agent, a silane treatment agent such as an epoxy-based silane, an amino-based silane, or a (meth) acrylic-based silane is preferable because of the ease of surface treatment. As the surface treatment agent, glycidyl-based, phenylamino-based, and (meth) acrylic-based compounds are preferable from the viewpoint of excellent dispersibility, fluidity, and adhesive strength. As the surface treatment agent, phenyl-based and (meth) acrylic-based compounds are more preferable from the viewpoint of excellent storage stability.

(d)成分の平均粒径は、視認性向上の観点から、100nm以下であると好ましく、60nm以下がより好ましい。(d)成分は、接着力向上の観点から、(メタ)アクリル系シラン又はエポキシ系シランで表面処理された平均粒径60nm以下の無機フィラーであることが好ましい。一方、チキソトロピー値は、(d)成分の平均粒径が大きい方が小さくなる傾向にある。 The average particle size of the component (d) is preferably 100 nm or less, more preferably 60 nm or less, from the viewpoint of improving visibility. The component (d) is preferably an inorganic filler having an average particle size of 60 nm or less surface-treated with (meth) acrylic silane or epoxy-based silane from the viewpoint of improving adhesive strength. On the other hand, the thixotropy value tends to be smaller as the average particle size of the component (d) is larger.

(d)成分の含有量は、半導体用接着剤の全量を基準として20〜80質量%であると好ましく、30〜75質量%であるとより好ましく、50〜75質量%であるとさらに好ましい。(d)成分の含有量が20質量%以上であると、接着力が低くなったり、耐リフロー性が低下する恐れがない。また、(d)成分の含有量が40質量%以下であると、増粘により接続信頼性が低下する恐れがない。(d)成分の含有量は多い方がチキソトロピー値は小さくなる傾向にある。 The content of the component (d) is preferably 20 to 80% by mass, more preferably 30 to 75% by mass, and even more preferably 50 to 75% by mass, based on the total amount of the semiconductor adhesive. When the content of the component (d) is 20% by mass or more, there is no possibility that the adhesive strength is lowered or the reflow resistance is lowered. Further, when the content of the component (d) is 40% by mass or less, there is no possibility that the connection reliability is lowered due to the thickening. (D) The thixotropy value tends to be smaller as the content of the component is larger.

((e)成分:フラックス剤)
半導体用接着剤は、フラックス活性(酸化物、不純物等を除去する活性)を示す(e)フラックス剤をさらに含有することができる。フラックス剤としては、非共有電子対を有する含窒素化合物(イミダゾール類、アミン類等。ただし、(b)成分に含まれるものを除く)、カルボン酸類、フェノール類及びアルコール類が挙げられる。なお、アルコール類に比べてカルボン酸類の方がフラックス活性を強く発現し、接続性を向上し易い。
((E) component: flux agent)
The semiconductor adhesive can further contain (e) a flux agent that exhibits flux activity (activity to remove oxides, impurities, etc.). Examples of the flux agent include nitrogen-containing compounds having an unshared electron pair (imidazoles, amines, etc., excluding those contained in the component (b)), carboxylic acids, phenols and alcohols. In addition, carboxylic acids express more flux activity than alcohols, and it is easy to improve connectivity.

(e)成分の含有量は、はんだ濡れ性の観点から、半導体用接着剤の固形分全量を基準として、0.2〜3質量%であることが好ましく、0.4〜1.8質量%であることがより好ましい。 From the viewpoint of solder wettability, the content of the component (e) is preferably 0.2 to 3% by mass, preferably 0.4 to 1.8% by mass, based on the total solid content of the semiconductor adhesive. Is more preferable.

半導体用接着剤には、さらに、イオントラッパー、酸化防止剤、シランカップリング剤、チタンカップリング剤、レベリング剤等を配合してもよい。これらは1種を単独で用いてもよいし、2種以上組み合わせて用いてもよい。これらの配合量については、各添加剤の効果が発現するように適宜調整すればよい。 The semiconductor adhesive may further contain an ion trapper, an antioxidant, a silane coupling agent, a titanium coupling agent, a leveling agent, or the like. These may be used individually by 1 type, and may be used in combination of 2 or more type. The blending amount of these may be appropriately adjusted so that the effect of each additive is exhibited.

<半導体用接着剤の製造方法>
本実施形態に係る半導体用接着剤は、生産性が向上する観点から、フィルム状(フィルム状接着剤)であることが好ましい。フィルム状接着剤の作製方法を以下に説明する。
<Manufacturing method of adhesive for semiconductors>
The semiconductor adhesive according to the present embodiment is preferably in the form of a film (film-like adhesive) from the viewpoint of improving productivity. The method for producing the film-like adhesive will be described below.

まず、(a)成分、(b)成分、(c)成分、及び必要に応じてその他の成分を有機溶媒中に加えた後に攪拌混合、混錬等により溶解又は分散させて樹脂ワニスを調製する。その後、離型処理を施した基材フィルム上に、ナイフコーター、ロールコーター、アプリケーター、ダイコーター、コンマコーター等を用いて樹脂ワニスを塗布した後、加熱により有機溶媒を減少させて、基材フィルム上にフィルム状接着剤を形成する。また、加熱により有機溶媒を減少させる前に、樹脂ワニスをウエハ等にスピンコートして膜を形成した後、溶媒乾燥を行う方法によりウエハ上にフィルム状接着剤を形成してもよい。 First, a resin varnish is prepared by adding the component (a), the component (b), the component (c), and if necessary, other components into an organic solvent, and then dissolving or dispersing them by stirring, mixing, kneading, or the like. .. Then, a resin varnish is applied to the release-treated base film using a knife coater, a roll coater, an applicator, a die coater, a comma coater, or the like, and then the organic solvent is reduced by heating to reduce the organic solvent to the base film. A film-like adhesive is formed on top. Further, a film-like adhesive may be formed on the wafer by a method in which a resin varnish is spin-coated on a wafer or the like to form a film and then the solvent is dried before the organic solvent is reduced by heating.

樹脂ワニスの調製に用いる有機溶媒としては、各成分を均一に溶解又は分散し得る特性を有するものが好ましく、例えば、ジメチルホルムアミド、ジメチルアセトアミド、N−メチル−2−ピロリドン、ジメチルスルホキシド、ジエチレングリコールジメチルエーテル、トルエン、ベンゼン、キシレン、メチルエチルケトン、テトラヒドロフラン、エチルセロソルブ、エチルセロソルブアセテート、ブチルセロソルブ、ジオキサン、シクロヘキサノン、及び酢酸エチルが挙げられる。これらの中でも、製膜性の観点から、シクロヘキサノンを用いることが好ましく、半導体用接着剤に含有される材料の一部もしくは全てが、シクロヘキサノンに可溶であることが好ましい。すなわち、樹脂ワニスに含有される材料の一部もしくは全てが、シクロヘキサノン溶解物であることが好ましい。これらの有機溶媒は、単独で又は2種類以上を組み合わせて使用することができる。樹脂ワニス調製の際の攪拌混合及び混錬は、例えば、攪拌機、らいかい機、3本ロール、ボールミル、ビーズミル又はホモディスパーを用いて行うことができる。 The organic solvent used for preparing the resin varnish is preferably one having the property of uniformly dissolving or dispersing each component, and for example, dimethylformamide, dimethylacetamide, N-methyl-2-pyrrolidone, dimethyl sulfoxide, diethylene glycol dimethyl ether, etc. Examples include toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl cellosolve, ethyl cellosolve acetate, butyl cellosolve, dioxane, cyclohexanone, and ethyl acetate. Among these, it is preferable to use cyclohexanone from the viewpoint of film-forming property, and it is preferable that a part or all of the materials contained in the semiconductor adhesive are soluble in cyclohexanone. That is, it is preferable that a part or all of the material contained in the resin varnish is a cyclohexanone solution. These organic solvents can be used alone or in combination of two or more. Stirring and mixing and kneading in the preparation of the resin varnish can be carried out by using, for example, a stirrer, a raker, a triple roll, a ball mill, a bead mill or a homodisper.

基材フィルムとしては、有機溶媒を揮発させる際の加熱条件に耐え得る耐熱性を有するものであれば特に制限はなく、ポリエステルフィルム、ポリプロピレンフィルム、ポリエチレンテレフタレートフィルム、ポリイミドフィルム、ポリエーテルイミドフィルム、ポリエーテルナフタレートフィルム、メチルペンテンフィルム等が挙げられる。基材フィルムとしては、これらのフィルムのうちの1種からなる単層のものに限られず、2種以上のフィルムからなる多層フィルムであってもよい。 The base film is not particularly limited as long as it has heat resistance that can withstand the heating conditions when the organic solvent is volatilized, and is a polyester film, polypropylene film, polyethylene terephthalate film, polyimide film, polyetherimide film, poly. Examples thereof include ether naphthalate film and methylpentene film. The base film is not limited to a single layer composed of one of these films, and may be a multilayer film composed of two or more types of films.

塗布後の樹脂ワニスから有機溶媒を揮発させる際の条件としては、具体的には、50〜200℃、0.1〜90分間の加熱を行うことが好ましい。実装後のボイド、粘度調整等に影響がなければ、有機溶媒が1.5質量%以下まで揮発する条件とすることが好ましい。 Specifically, as a condition for volatilizing the organic solvent from the resin varnish after coating, it is preferable to heat at 50 to 200 ° C. for 0.1 to 90 minutes. If there is no effect on voids, viscosity adjustment, etc. after mounting, it is preferable that the organic solvent volatilizes to 1.5% by mass or less.

本実施形態に係るフィルム状の接着剤におけるフィルムの厚さは、視認性、流動性、充填性の観点から、10〜100μmが好ましく、20〜50μmがより好ましい。 The thickness of the film in the film-like adhesive according to the present embodiment is preferably 10 to 100 μm, more preferably 20 to 50 μm, from the viewpoint of visibility, fluidity, and filling property.

<半導体装置>
本実施形態に係る半導体用接着剤は、半導体装置に好適に用いられ、半導体用接着剤として好適であり、半導体チップ及び配線回路基板のそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置、又は複数の半導体チップのそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置において接続部の封止に特に好適に用いられる。以下、本実施形態に係る半導体用接着剤を用いた半導体装置について説明する。半導体装置における接続部の電極同士は、バンプと配線との金属接合、及び、バンプとバンプとの金属接合のいずれでもよい。半導体装置では、例えば、半導体用接着剤を介して電気的な接続を得るフリップチップ接続が用いられてよい。
<Semiconductor device>
The semiconductor adhesive according to the present embodiment is suitably used for semiconductor devices and is suitable as a semiconductor adhesive, in which electrodes at the connection portions of the semiconductor chip and the wiring circuit board are electrically connected to each other. It is particularly preferably used for sealing a connection portion in a semiconductor device or a semiconductor device in which electrodes of each connection portion of a plurality of semiconductor chips are electrically connected to each other. Hereinafter, the semiconductor device using the semiconductor adhesive according to the present embodiment will be described. The electrodes of the connection portion in the semiconductor device may be either a metal bond between the bump and the wiring or a metal bond between the bump and the bump. In the semiconductor device, for example, a flip-chip connection for obtaining an electrical connection via a semiconductor adhesive may be used.

図1は、半導体装置の実施形態(半導体チップ及び基板のCOB型の接続態様)を示す模式断面図である。図1(a)に示すように、第1の半導体装置100は、互いに対向する半導体チップ10及び基板(配線回路基板)20と、半導体チップ10及び基板20の互いに対向する面にそれぞれ配置された配線15と、半導体チップ10及び基板20の配線15を互いに接続する接続バンプ30と、半導体チップ10及び基板20間の空隙に隙間なく充填された接着剤40とを有している。半導体チップ10及び基板20は、配線15及び接続バンプ30によりフリップチップ接続されている。配線15及び接続バンプ30は、半導体用接着剤40により封止されており外部環境から遮断されている。 FIG. 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device (COB type connection mode of a semiconductor chip and a substrate). As shown in FIG. 1A, the first semiconductor device 100 is arranged on the semiconductor chip 10 and the substrate (wiring circuit board) 20 facing each other and the surfaces of the semiconductor chip 10 and the substrate 20 facing each other, respectively. It has a wiring 15, a connection bump 30 that connects the semiconductor chip 10 and the wiring 15 of the substrate 20 to each other, and an adhesive 40 that fills the gap between the semiconductor chip 10 and the substrate 20 without gaps. The semiconductor chip 10 and the substrate 20 are flip-chip connected by the wiring 15 and the connection bump 30. The wiring 15 and the connection bump 30 are sealed with the semiconductor adhesive 40 and are shielded from the external environment.

図1(b)に示すように、第2の半導体装置200は、互いに対向する半導体チップ10及び基板(配線回路基板)20と、半導体チップ10及び基板20の互いに対向する面にそれぞれ配置されたバンプ32と、半導体チップ10及び基板20間の空隙に隙間なく充填された半導体用接着剤40とを有している。半導体チップ10及び基板20は、対向するバンプ32が互いに接続されることによりフリップチップ接続されている。バンプ32は、半導体用接着剤40により封止されており外部環境から遮断されている。 As shown in FIG. 1B, the second semiconductor device 200 is arranged on the semiconductor chip 10 and the substrate (wiring circuit board) 20 facing each other and the surfaces of the semiconductor chip 10 and the substrate 20 facing each other, respectively. It has a bump 32 and a semiconductor adhesive 40 in which the gap between the semiconductor chip 10 and the substrate 20 is filled without gaps. The semiconductor chip 10 and the substrate 20 are flip-chip connected by connecting the opposing bumps 32 to each other. The bump 32 is sealed with the semiconductor adhesive 40 and is shielded from the external environment.

図2は、半導体装置の他の実施形態(半導体チップ同士のCOC型の接続態様)を示す模式断面図である。図2(a)に示すように、第3の半導体装置300は、2つの半導体チップ10が配線15及び接続バンプ30によりフリップチップ接続されている点を除き、第1の半導体装置100と同様である。図2(b)に示すように、第4の半導体装置400は、2つの半導体チップ10がバンプ32によりフリップチップ接続されている点を除き、第2の半導体装置200と同様である。 FIG. 2 is a schematic cross-sectional view showing another embodiment of the semiconductor device (COC type connection mode between semiconductor chips). As shown in FIG. 2A, the third semiconductor device 300 is the same as the first semiconductor device 100 except that the two semiconductor chips 10 are flip-chip connected by the wiring 15 and the connection bump 30. is there. As shown in FIG. 2B, the fourth semiconductor device 400 is similar to the second semiconductor device 200 except that the two semiconductor chips 10 are flip-chip-connected by bumps 32.

半導体チップ10としては、特に制限はなく、シリコン、ゲルマニウム等の同一種類の元素から構成される元素半導体、ガリウム・ヒ素、インジウム・リン等の化合物半導体などの各種半導体を用いることができる。 The semiconductor chip 10 is not particularly limited, and various semiconductors such as elemental semiconductors composed of elements of the same type such as silicon and germanium, and compound semiconductors such as gallium arsenide and indium phosphorus can be used.

基板20としては、配線回路基板であれば特に制限はなく、ガラスエポキシ樹脂、ポリイミド樹脂、ポリエステル樹脂、セラミック、エポキシ樹脂、ビスマレイミドトリアジン樹脂等を主な成分とする絶縁基板の表面に形成された金属層の不要な個所をエッチング除去して配線(配線パターン)が形成された回路基板、上記絶縁基板の表面に金属めっき等によって配線(配線パターン)が形成された回路基板、上記絶縁基板の表面に導電性物質を印刷して配線(配線パターン)が形成された回路基板などを用いることができる。 The substrate 20 is not particularly limited as long as it is a wiring circuit board, and is formed on the surface of an insulating substrate containing glass epoxy resin, polyimide resin, polyester resin, ceramic, epoxy resin, bismaleimide triazine resin and the like as main components. A circuit board on which wiring (wiring pattern) is formed by removing unnecessary parts of the metal layer by etching, a circuit board on which wiring (wiring pattern) is formed by metal plating or the like on the surface of the insulating substrate, and a surface of the insulating substrate. A circuit board or the like on which a conductive material is printed on the surface and wiring (wiring pattern) is formed can be used.

配線15、バンプ32等の接続部は、主成分として金、銀、銅、はんだ(主成分は、例えばスズ−銀、スズ−鉛、スズ−ビスマス、スズ−銅)、ニッケル、スズ、鉛等を含有しており、複数の金属を含有していてもよい。 The connection parts of the wiring 15, bump 32, etc. are mainly composed of gold, silver, copper, solder (main components are tin-silver, tin-lead, tin-bismuth, tin-copper), nickel, tin, lead, etc. It may contain a plurality of metals.

配線(配線パターン)の表面には、金、銀、銅、はんだ(主成分は、例えばスズ−銀、スズ−鉛、スズ−ビスマス、スズ−銅)、スズ、ニッケル等を主な成分とする金属層が形成されていてもよい。この金属層は単一の成分のみで構成されていてもよく、複数の成分から構成されていてもよい。また、複数の金属層が積層された構造をしていてもよい。銅、はんだは安価であることから一般的に使用されている。なお、銅、はんだには酸化物、不純物等が含まれるため、半導体用接着剤はフラックス活性を有することが好ましい。 The main components of the surface of the wiring (wiring pattern) are gold, silver, copper, solder (main components are tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. A metal layer may be formed. This metal layer may be composed of only a single component, or may be composed of a plurality of components. Further, it may have a structure in which a plurality of metal layers are laminated. Copper and solder are generally used because they are inexpensive. Since copper and solder contain oxides, impurities and the like, it is preferable that the adhesive for semiconductors has flux activity.

バンプと呼ばれる導電性突起の材質としては、主な成分として、金、銀、銅、はんだ(主成分は例えば、スズ−銀、スズ−鉛、スズ−ビスマス、スズ−銅)、スズ、ニッケル等が用いられ、単一の成分のみで構成されていてもよく、複数の成分から構成されていてもよい。また、これらの金属が積層された構造をなすように形成されていてもよい。バンプは半導体チップ又は基板に形成されていてもよい。銅、はんだは安価であることから一般的に使用されている。なお、銅、はんだには酸化物、不純物等が含まれるため、半導体用接着剤はフラックス活性を有することが好ましい。 The main components of the material of the conductive protrusions called bumps are gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. Is used, and may be composed of only a single component, or may be composed of a plurality of components. Further, these metals may be formed so as to form a laminated structure. The bumps may be formed on a semiconductor chip or a substrate. Copper and solder are generally used because they are inexpensive. Since copper and solder contain oxides, impurities and the like, it is preferable that the adhesive for semiconductors has flux activity.

また、図1又は図2に示すような半導体装置(パッケージ)を積層して金、銀、銅、はんだ(主成分は、例えばスズ−銀、スズ−鉛、スズ−ビスマス、スズ−銅)、スズ、ニッケル等で電気的に接続してもよい。例えば、TSV技術で見られるような、接着剤を半導体チップ間に介して、フリップチップ接続又は積層し、半導体チップを貫通する孔を形成し、パターン面の電極とつなげてもよい。 Further, the semiconductor devices (packages) as shown in FIGS. 1 or 2 are laminated to form gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper). It may be electrically connected with tin, nickel or the like. For example, as seen in TSV technology, an adhesive may be flip-chip connected or laminated between semiconductor chips to form holes through the semiconductor chips and connected to electrodes on a patterned surface.

図3は、半導体装置の他の実施形態(半導体チップ積層型の態様(TSV))を示す模式断面図である。図3に示すように、第5の半導体装置500では、インターポーザ50上に形成された配線15が半導体チップ10の配線15と接続バンプ30を介して接続されることにより、半導体チップ10とインターポーザ50とはフリップチップ接続されている。半導体チップ10とインターポーザ50との間の空隙には半導体用接着剤40が隙間なく充填されている。上記半導体チップ10におけるインターポーザ50と反対側の表面上には、配線15、接続バンプ30及び半導体用接着剤40を介して半導体チップ10が繰り返し積層されている。半導体チップ10の表裏におけるパターン面の配線15は、半導体チップ10の内部を貫通する孔内に充填された貫通電極34により互いに接続されている。なお、貫通電極34の材質としては、銅、アルミニウム等を用いることができる。 FIG. 3 is a schematic cross-sectional view showing another embodiment of the semiconductor device (semiconductor chip laminated type mode (TSV)). As shown in FIG. 3, in the fifth semiconductor device 500, the wiring 15 formed on the interposer 50 is connected to the wiring 15 of the semiconductor chip 10 via the connection bump 30, so that the semiconductor chip 10 and the interposer 50 are connected to each other. Is flip-chip connected. The gap between the semiconductor chip 10 and the interposer 50 is filled with the semiconductor adhesive 40 without any gap. The semiconductor chip 10 is repeatedly laminated on the surface of the semiconductor chip 10 on the side opposite to the interposer 50 via the wiring 15, the connection bump 30, and the semiconductor adhesive 40. The wiring 15 on the pattern surface on the front and back of the semiconductor chip 10 is connected to each other by a through electrode 34 filled in a hole penetrating the inside of the semiconductor chip 10. As the material of the through electrode 34, copper, aluminum, or the like can be used.

このようなTSV技術により、通常は使用されない半導体チップの裏面からも信号を取得することができる。さらには、半導体チップ10内に貫通電極34を垂直に通すため、対向する半導体チップ10間、又は半導体チップ10及びインターポーザ50間の距離を短くし、柔軟な接続が可能である。本実施形態に係る半導体用接着剤は、このようなTSV技術において、対向する半導体チップ10間、又は半導体チップ10及びインターポーザ50間の封止材料として好適に用いられる。 With such TSV technology, it is possible to acquire a signal from the back surface of a semiconductor chip that is not normally used. Further, since the through electrode 34 is passed vertically through the semiconductor chip 10, the distance between the opposing semiconductor chips 10 or between the semiconductor chip 10 and the interposer 50 can be shortened, and flexible connection is possible. The semiconductor adhesive according to the present embodiment is suitably used as a sealing material between the opposing semiconductor chips 10 or between the semiconductor chips 10 and the interposer 50 in such TSV technology.

<半導体装置の製造方法>
本実施形態に係る半導体装置の製造方法は、本実施形態に係る半導体用接着剤を用いて、半導体チップ及び配線回路基板、又は、複数の半導体チップ同士を接続する。本実施形態に係る半導体装置の製造方法は、例えば、接着剤を介して半導体チップ及び配線回路基板を互いに接続すると共に半導体チップ及び配線回路基板のそれぞれの接続部を互いに電気的に接続して半導体装置を得る工程、又は、接着剤を介して複数の半導体チップを互いに接続すると共に複数の半導体チップのそれぞれの接続部を互いに電気的に接続して半導体装置を得る工程を備える。
<Manufacturing method of semiconductor devices>
In the method for manufacturing a semiconductor device according to the present embodiment, a semiconductor chip and a wiring circuit board, or a plurality of semiconductor chips are connected to each other by using the semiconductor adhesive according to the present embodiment. In the method for manufacturing a semiconductor device according to the present embodiment, for example, a semiconductor chip and a wiring circuit board are connected to each other via an adhesive, and each connection portion of the semiconductor chip and the wiring circuit board is electrically connected to each other to form a semiconductor. A step of obtaining an apparatus or a step of connecting a plurality of semiconductor chips to each other via an adhesive and electrically connecting the connecting portions of the plurality of semiconductor chips to each other to obtain a semiconductor apparatus is provided.

本実施形態に係る半導体装置の製造方法では、接続部を互いに金属接合によって接続することができる。すなわち、半導体チップ及び配線回路基板のそれぞれの接続部を互いに金属接合によって接続する、又は、複数の半導体チップのそれぞれの接続部を互いに金属接合によって接続する。 In the method for manufacturing a semiconductor device according to the present embodiment, the connecting portions can be connected to each other by metal bonding. That is, the respective connection portions of the semiconductor chip and the wiring circuit board are connected to each other by metal bonding, or the respective connection portions of the plurality of semiconductor chips are connected to each other by metal bonding.

本実施形態に係る半導体装置の製造方法の一例として、図4に示す第6の半導体装置600の製造方法について説明する。第6の半導体装置600は、配線(銅配線)15を有する基板(例えばガラスエポキシ基板)60と、配線(例えば銅ピラー、銅ポスト)15を有する半導体チップ10とが半導体用接着剤40を介して互いに接続されている。半導体チップ10の配線15と基板60の配線15とは、接続バンプ(はんだバンプ)30により電気的に接続されている。基板60における配線15が形成された表面には、接続バンプ30の形成位置を除いてソルダーレジスト70が配置されている。 As an example of the method for manufacturing the semiconductor device according to the present embodiment, the method for manufacturing the sixth semiconductor device 600 shown in FIG. 4 will be described. In the sixth semiconductor device 600, a substrate (for example, a glass epoxy substrate) 60 having wiring (copper wiring) 15 and a semiconductor chip 10 having wiring (for example, copper pillars and copper posts) 15 are interposed via a semiconductor adhesive 40. Are connected to each other. The wiring 15 of the semiconductor chip 10 and the wiring 15 of the substrate 60 are electrically connected by a connection bump (solder bump) 30. A solder resist 70 is arranged on the surface of the substrate 60 on which the wiring 15 is formed, except for the position where the connection bump 30 is formed.

第6の半導体装置600の製造方法では、まず、ソルダーレジスト70が形成された基板60上に半導体用接着剤(フィルム状接着剤等)40を貼付する。貼付は、加熱プレス、ロールラミネート、真空ラミネート等によって行うことができる。半導体用接着剤40の供給面積及び厚みは、半導体チップ10又は基板60のサイズ、バンプ高さ等によって適宜設定される。半導体用接着剤40を半導体チップ10に貼付してもよく、半導体ウエハに半導体用接着剤40を貼付した後にダイシングして半導体チップ10に個片化することによって、半導体用接着剤40を貼付した半導体チップ10を作製してもよい。この場合、高い光透過率を有する半導体用接着剤であれば、アライメントマークを覆っても視認性が確保されることから、半導体ウエハ(半導体チップ)のみならず、基板上においても貼付する範囲が制限されず、取り扱い性に優れる。 In the sixth method for manufacturing the semiconductor device 600, first, a semiconductor adhesive (film-like adhesive or the like) 40 is attached onto the substrate 60 on which the solder resist 70 is formed. The sticking can be performed by a heating press, roll laminating, vacuum laminating or the like. The supply area and thickness of the semiconductor adhesive 40 are appropriately set according to the size of the semiconductor chip 10 or the substrate 60, the bump height, and the like. The semiconductor adhesive 40 may be attached to the semiconductor chip 10, and the semiconductor adhesive 40 is attached by dicing the semiconductor wafer after attaching the semiconductor adhesive 40 and then dicing the semiconductor wafer into individual pieces. The semiconductor chip 10 may be manufactured. In this case, if the adhesive has a high light transmittance, the visibility is ensured even if the alignment mark is covered, so that the range of attachment is not only on the semiconductor wafer (semiconductor chip) but also on the substrate. There are no restrictions and it is easy to handle.

半導体用接着剤40を基板60又は半導体チップ10に貼り付けた後、半導体チップ10の配線15上の接続バンプ30と、基板60の配線15とをフリップチップボンダー等の接続装置を用いて位置合わせする。そして、半導体チップ10と基板60を接続バンプ30の融点以上の温度で加熱しながら押し付けて(接続部にはんだを用いる場合は、はんだ部分に240℃以上の温度がかかることが好ましい)、半導体チップ10と基板60を接続すると共に、半導体用接着剤40によって半導体チップ10と基板60の間の空隙を封止充てんする。接続荷重は、バンプ数に依存するが、バンプの高さばらつき吸収、バンプ変形量の制御等を考慮して設定される。接続時間は、生産性向上の観点から、短時間が好ましい。はんだを溶融させ、酸化膜、表面の不純物等を除去し、金属接合を接続部に形成することが好ましい。 After the semiconductor adhesive 40 is attached to the substrate 60 or the semiconductor chip 10, the connection bump 30 on the wiring 15 of the semiconductor chip 10 and the wiring 15 of the substrate 60 are aligned by using a connection device such as a flip chip bonder. To do. Then, the semiconductor chip 10 and the substrate 60 are pressed while being heated at a temperature equal to or higher than the melting point of the connection bump 30 (when solder is used for the connection portion, it is preferable that the solder portion is heated to a temperature of 240 ° C. or higher). The 10 and the substrate 60 are connected, and the gap between the semiconductor chip 10 and the substrate 60 is sealed and filled with the semiconductor adhesive 40. The connection load depends on the number of bumps, but is set in consideration of absorption of bump height variation, control of bump deformation amount, and the like. The connection time is preferably short from the viewpoint of improving productivity. It is preferable to melt the solder to remove oxide films, surface impurities and the like, and to form a metal joint at the connection portion.

短時間の接続時間(圧着時間)とは、接続形成(本圧着)中に接続部に240℃以上の温度がかかる時間(例えば、はんだ使用時の時間)が10秒以下であることをいう。接続時間は、5秒以下が好ましく、3秒以下がより好ましい。 The short connection time (crimping time) means that the time (for example, the time when solder is used) that the temperature of 240 ° C. or higher is applied to the connection portion during the connection formation (main crimping) is 10 seconds or less. The connection time is preferably 5 seconds or less, more preferably 3 seconds or less.

位置合わせをした後、仮固定して、リフロー炉で加熱処理することによってはんだバンプを溶融させて半導体チップと基板を接続することによって半導体装置を製造してもよい。仮固定は、金属接合を形成する必要性が顕著に要求されないため、上述の本圧着に比べて低荷重、短時間、低温度でもよく、生産性向上、接続部の劣化防止等のメリットが生じる。半導体チップと基板を接続した後、オーブン等で加熱処理を行って、接着剤を硬化させてもよい。加熱温度は、接着剤の硬化が進行し、好ましくはほぼ完全に硬化する温度である。加熱温度及び加熱時間は適宜設定すればよい。この場合、得られる半導体装置は、接着剤の硬化物を備える。 After alignment, the semiconductor device may be manufactured by temporarily fixing and heat-treating in a reflow furnace to melt the solder bumps and connecting the semiconductor chip and the substrate. Since the temporary fixing does not significantly require the need to form a metal joint, it may have a lower load, a shorter time, and a lower temperature than the above-mentioned main crimping, and has advantages such as improvement in productivity and prevention of deterioration of the connection portion. .. After connecting the semiconductor chip and the substrate, heat treatment may be performed in an oven or the like to cure the adhesive. The heating temperature is a temperature at which the adhesive is cured, preferably almost completely. The heating temperature and heating time may be set as appropriate. In this case, the resulting semiconductor device comprises a cured product of the adhesive.

以下、実施例を挙げて本開示についてさらに具体的に説明する。ただし、本開示はこれら実施例に限定されるものではない。 Hereinafter, the present disclosure will be described in more detail with reference to examples. However, the present disclosure is not limited to these examples.

各実施例及び比較例で使用した化合物は以下の通りである。
(a)エポキシ樹脂
・トリフェノールメタン骨格含有多官能固形エポキシ樹脂(三菱ケミカル株式会社製、商品名「EP1032H60」、以下「EP1032」という。)
・ナフタレン骨格含有エポキシ樹脂(DIC株式会社製、商品名「HP4032D」)
・ビスフェノールF型液状エポキシ樹脂(三菱ケミカル株式会社製、商品名「YL983U」、以下「YL983」という。)
・柔軟性エポキシ樹脂(三菱ケミカル株式会社製、商品名「YL7175」、以下「YL7175」という。)
The compounds used in each Example and Comparative Example are as follows.
(A) Epoxy resin / triphenol methane skeleton-containing polyfunctional solid epoxy resin (manufactured by Mitsubishi Chemical Corporation, trade name "EP1032H60", hereinafter referred to as "EP1032")
-Naphthalene skeleton-containing epoxy resin (manufactured by DIC Corporation, trade name "HP4032D")
-Bisphenol F type liquid epoxy resin (manufactured by Mitsubishi Chemical Corporation, trade name "YL983U", hereinafter referred to as "YL983")
-Flexible epoxy resin (manufactured by Mitsubishi Chemical Corporation, trade name "YL7175", hereinafter referred to as "YL7175")

(b)硬化剤
・2,4−ジアミノ−6−[2’−メチルイミダゾリル−(1’)]−エチル−s−トリアジンイソシアヌル酸付加体(四国化成工業株式会社製、商品名「2MAOK−PW」、以下「2MAOK」という。)
(B) Hardener ・ 2,4-diamino-6- [2'-methylimidazolyl- (1')] -ethyl-s-triazine isocyanuric acid adduct (manufactured by Shikoku Chemicals Corporation, trade name "2MAOK-PW" , Hereinafter referred to as "2MAOK")

(c)重量平均分子量10000以上の高分子量成分
・アクリル樹脂(株式会社クラレ製、商品名「クラリティLA4285」、Mw/Mn=1.28、重量平均分子量Mw:80000)
(C) High molecular weight component / acrylic resin having a weight average molecular weight of 10,000 or more (manufactured by Kuraray Co., Ltd., trade name "Clarity LA4285", Mw / Mn = 1.28, weight average molecular weight Mw: 80000)

(d)フィラー
無機フィラー
・エポキシ表面処理ナノシリカフィラー(株式会社アドマテックス製、商品名「50nmSE−AH1」、平均粒径:約50nm、以下「SEナノシリカ」という。)
・無機シリカフィラー(株式会社アドマテックス製、商品名「SE2050」、平均粒径:0.5μm、以下「SE2050」という。)
・無機シリカフィラー(株式会社アドマテックス製、商品名「SE2050SEJ」、平均粒径:0.5μm、以下「SE2050SEJ」という。)
(D) Filler Inorganic filler / epoxy surface-treated nanosilica filler (manufactured by Admatex Co., Ltd., trade name "50 nm SE-AH1", average particle size: about 50 nm, hereinafter referred to as "SE nanosilica")
-Inorganic silica filler (manufactured by Admatex Co., Ltd., trade name "SE2050", average particle size: 0.5 μm, hereinafter referred to as "SE2050")
-Inorganic silica filler (manufactured by Admatex Co., Ltd., trade name "SE2050SEJ", average particle size: 0.5 μm, hereinafter referred to as "SE2050SEJ")

(e)フラックス剤
・グルタル酸(シグマアルドリッチジャパン合同会社製、融点:約97℃)
(E) Flux agent / glutaric acid (manufactured by Sigma-Aldrich Japan GK, melting point: approx. 97 ° C)

<フィルム状接着剤の作製>
(実施例1)
エポキシ樹脂11.25g(「EP1032」を6.8g、「HP4032D」を0.75g、「YL983」を1.5g、「YL7175」を2.2g)、硬化剤「2MAOK」0.6g、グルタル酸0.45g、無機フィラー「SEナノシリカ」を35.3g、アクリル樹脂「LA4285」2.0g、及び、シクロヘキサノン(樹脂ワニス中の固形分量が47質量%になる量)を仕込み、直径1.0mmのビーズを固形分と同質量加え、ビーズミル(フリッチュ・ジャパン株式会社製、遊星型微粉砕機P−7)で30分撹拌した。その後、撹拌に用いたビーズをろ過によって除去し、樹脂ワニスを得た。
<Making a film-like adhesive>
(Example 1)
Epoxy resin 11.25g ("EP1032" 6.8g, "HP4032D" 0.75g, "YL983" 1.5g, "YL7175" 2.2g), curing agent "2MAOK" 0.6g, glutaric acid 0.45 g, 35.3 g of inorganic filler "SE nanosilica", 2.0 g of acrylic resin "LA4285", and cyclohexanone (amount that makes the solid content in the resin varnish 47% by mass) are charged, and the diameter is 1.0 mm. The beads were added in the same mass as the solid content, and the mixture was stirred with a bead mill (Fritsch Japan Co., Ltd., planetary fine pulverizer P-7) for 30 minutes. Then, the beads used for stirring were removed by filtration to obtain a resin varnish.

得られた樹脂ワニスを基材フィルム(帝人デュポンフィルム株式会社製、商品名「ピューレックスA54」)上に小型精密塗工装置(株式会社康井精機製)で塗工し、塗工された樹脂ワニスをクリーンオーブン(エスペック株式会社製)で乾燥(100℃/5分)して、フィルム状接着剤を得た。厚みは0.02mmとなるよう作製した。 The obtained resin varnish is coated on a base film (manufactured by Teijin DuPont Film Co., Ltd., trade name "Purex A54") with a small precision coating device (manufactured by Yasui Seiki Co., Ltd.), and the coated resin is applied. The varnish was dried (100 ° C./5 minutes) in a clean oven (manufactured by Espec Co., Ltd.) to obtain a film-like adhesive. It was prepared to have a thickness of 0.02 mm.

(実施例2)
エポキシ樹脂「HP4032D」を1.5gに増やし、エポキシ樹脂「YL983」を0.75gに減らしたこと以外は、実施例1と同様にして、フィルム状接着剤を作製した。
(Example 2)
A film-like adhesive was produced in the same manner as in Example 1 except that the epoxy resin “HP4032D” was increased to 1.5 g and the epoxy resin “YL983” was reduced to 0.75 g.

(比較例1)
エポキシ樹脂「YL7175」及び「HP4032D」を配合せず、無機シリカフィラー(株式会社アドマテックス製、商品名「SE2050」、平均粒径:0.5μm)を2.3g加えたこと以外は、実施例1と同様にして、フィルム状接着剤を作製した。
(Comparative Example 1)
Examples except that the epoxy resins "YL7175" and "HP4032D" were not blended and 2.3 g of an inorganic silica filler (manufactured by Admatex Co., Ltd., trade name "SE2050", average particle size: 0.5 μm) was added. A film-like adhesive was produced in the same manner as in 1.

(比較例2)
無機シリカフィラー(株式会社アドマテックス製、商品名「SE2050SEJ」、平均粒径:0.5μm)を3.3g加え、「SEナノシリカ」を27.9gに減らし、「LA4285」を0.5gに減らしたこと以外は、実施例1と同様にして、フィルム状接着剤を作製した。
(Comparative Example 2)
Add 3.3g of inorganic silica filler (manufactured by Admatex Co., Ltd., trade name "SE2050SEJ", average particle size: 0.5μm), reduce "SE nanosilica" to 27.9g, and reduce "LA4285" to 0.5g. A film-like adhesive was produced in the same manner as in Example 1 except for the above.

表1に実施例1〜2及び比較例1〜2の配合をまとめて示す。 Table 1 summarizes the formulations of Examples 1 and 2 and Comparative Examples 1 and 2.

<評価>
以下、実施例及び比較例で得られたフィルム状接着剤の評価方法を示す。
<Evaluation>
The evaluation methods of the film-like adhesives obtained in Examples and Comparative Examples are shown below.

(1)チキソトロピー値測定サンプルの作製
作製したフィルム状接着剤を卓上ラミネータ(株式会社ミラーコーポレーション製、商品名「ホットドッグGK−13DX」)にて、総厚が0.4mm(400μm)になるまで複数枚ラミネート(積層)し、縦7.3mm、横7.3mmのサイズに切り抜き測定サンプルを得た。
(1) Preparation of thixotropy value measurement sample The produced film-like adhesive is used with a desktop laminator (manufactured by Mirror Corporation, trade name "Hot Dog GK-13DX") until the total thickness reaches 0.4 mm (400 μm). A plurality of sheets were laminated (laminated), and cutout measurement samples were obtained in a size of 7.3 mm in length and 7.3 mm in width.

(2)チキソトロピー値の測定
得られた測定サンプルについて、ずり粘度測定装置(ティー・エイ・インスツルメント・ジャパン株式会社製、商品名「ARES」)にて温度120℃の一定条件で周波数を1Hzから70Hzまで0.1Hz毎秒で連続的に変化させた際の粘度を測定し、7Hz時の粘度値を70Hz時の粘度値で割った値をチキソトロピー値とした。
(2) Measurement of thixotropy value For the obtained measurement sample, a shear viscosity measuring device (manufactured by TA Instruments Japan Co., Ltd., trade name "ARES") was used to set the frequency to 1 Hz under a constant temperature of 120 ° C. The viscosity was measured when the viscosity was continuously changed from 1 to 70 Hz at 0.1 Hz per second, and the value obtained by dividing the viscosity value at 7 Hz by the viscosity value at 70 Hz was taken as the thixotropy value.

(3)半導体装置の製造方法
作製したフィルム状接着剤を切り抜き(縦7.3mm、横7.3mm、厚み0.045mm)、はんだバンプ付き半導体チップ(チップサイズ:縦7.3mm、横7.3mm、厚み0.15mm、バンプ高さ:銅ピラー+はんだの合計約45μm、バンプ数328、ピッチ80μm)上に貼付した。次に、フィルム状接着剤を貼付したはんだバンプ付き半導体チップを、ガラスエポキシ基板(ガラスエポキシ基材厚さ:420μm、銅配線厚さ:9μm)にフリップチップボンダーFCB3(パナソニック株式会社製)で実装し(実装条件:圧着ヘッド温度350℃/5秒/0.5MPa)、図4と同様の半導体装置を得た。ステージ温度は80℃とした。
(3) Manufacturing method of semiconductor device The produced film-like adhesive is cut out (length 7.3 mm, width 7.3 mm, thickness 0.045 mm), and a semiconductor chip with solder bumps (chip size: length 7.3 mm, width 7. 3 mm, thickness 0.15 mm, bump height: copper pillar + solder total about 45 μm, number of bumps 328, pitch 80 μm). Next, a semiconductor chip with solder bumps to which a film-like adhesive is attached is mounted on a glass epoxy substrate (glass epoxy substrate thickness: 420 μm, copper wiring thickness: 9 μm) with a flip chip bonder FCB3 (manufactured by Panasonic Corporation). (Mounting conditions: crimp head temperature 350 ° C./5 seconds / 0.5 MPa), and the same semiconductor device as in FIG. 4 was obtained. The stage temperature was 80 ° C.

(4)カバレッジ性の評価方法
上記の(3)半導体装置の製造方法で得た半導体装置を上側チップの上方からマイクロスコープ(株式会社キーエンス製)にて観察し、チップ端部からの樹脂のはみ出し幅を測定した。はみ出し幅は、チップの1辺の中央からの樹脂のはみ出し幅W(単位:μm)と、当該1辺の一端(チップの角)から0.2mm中央側の位置からの樹脂のはみ出し幅W(単位:μm)とを測定し、両者の比(W/W)を求めた。なお、Wは、チップの上記1辺の一端から0.2mm中央側の位置からの樹脂のはみ出し幅、及び、他端から0.2mm中央側の位置からの樹脂のはみ出し幅のうち、小さい方の値である。この比(W/W)の測定をチップの4辺全てについて行い、その平均値を「カバレッジ性」として求めた。
(4) Evaluation method of coverage The semiconductor device obtained by the above method (3) Manufacturing method of the semiconductor device is observed from above the upper chip with a microscope (manufactured by KEYENCE CORPORATION), and the resin protrudes from the end of the chip. The width was measured. The protrusion width is the resin protrusion width W 1 (unit: μm) from the center of one side of the chip and the resin protrusion width W from the position 0.2 mm center from one end (corner of the chip) of the one side. 2 (unit: μm) was measured, and the ratio of the two (W 2 / W 1 ) was determined. W 2 is the smaller of the resin protrusion width from the position 0.2 mm center side from one end of the one side of the chip and the resin protrusion width from the position 0.2 mm center side from the other end. The value of the one. This ratio (W 2 / W 1 ) was measured on all four sides of the chip, and the average value was calculated as "coverability".

カバレッジ性は、半導体装置においてチップの角部まで接着剤樹脂が行き渡っているかを示す指標である。半導体装置の角部と辺のセンター部のはみ出し幅の差がない方が好ましいため、カバレッジ性は1により近いほど良好である。 The coverage is an index indicating whether or not the adhesive resin has spread to the corners of the chip in the semiconductor device. Since it is preferable that there is no difference in the protrusion width between the corner portion and the center portion of the side of the semiconductor device, the coverage property is better as it is closer to 1.

チキソトロピー値の測定結果と、カバレッジ性の評価結果を表1に示す。 Table 1 shows the measurement results of thixotropy value and the evaluation results of coverage.

Figure 2019167460
Figure 2019167460

表1の評価結果より、チキソトロピー値が3.1以下の実施例1、実施例2はカバレッジ性が0.4を超えていたが、チキソトロピー値が3.1を超えて大きい比較例1、比較例2はカバレッジ性が0.4未満となった。これらのことから、チキソトロピー値が低い本開示のフィルム状の半導体用接着剤によれば、カバレッジ性が高くなることが確認された。 From the evaluation results in Table 1, the coverage of Example 1 and Example 2 having a thixotropy value of 3.1 or less was over 0.4, but the thixotropy value was larger than 3.1. In Example 2, the coverage was less than 0.4. From these facts, it was confirmed that the film-shaped semiconductor adhesive of the present disclosure having a low thixotropy value has high coverage.

10…半導体チップ、15…配線、20,60…基板、30…接続バンプ、32…バンプ、34…貫通電極、40…半導体用接着剤、50…インターポーザ、70…ソルダーレジスト、100,200,300,400,500,600…半導体装置。 10 ... Semiconductor chip, 15 ... Wiring, 20, 60 ... Substrate, 30 ... Connection bump, 32 ... Bump, 34 ... Through electrode, 40 ... Semiconductor adhesive, 50 ... Interposer, 70 ... Solder resist, 100, 200, 300 , 400, 500, 600 ... Semiconductor device.

Claims (8)

半導体チップ及び配線回路基板のそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置、又は、複数の半導体チップのそれぞれの接続部の電極同士が互いに電気的に接続された半導体装置において、前記接続部の少なくとも一部の封止に用いられる半導体用接着剤であって、
前記半導体用接着剤のチキソトロピー値が、1.0以上、3.1以下であり、
前記チキソトロピー値は、前記半導体用接着剤を厚さ400μmまで積層したサンプルについて、ずり粘度測定装置で温度120℃の一定条件にて周波数を1Hzから70Hzまで連続的に変化させた際の粘度を測定し、7Hz時の粘度値を70Hz時の粘度値で割った値である、半導体用接着剤。
In a semiconductor device in which the electrodes of the respective connection portions of the semiconductor chip and the wiring circuit board are electrically connected to each other, or in a semiconductor device in which the electrodes of the respective connection portions of a plurality of semiconductor chips are electrically connected to each other. , A semiconductor adhesive used to seal at least a part of the connection portion.
The thixotropy value of the semiconductor adhesive is 1.0 or more and 3.1 or less.
The thixotropy value measures the viscosity of a sample in which the semiconductor adhesive is laminated to a thickness of 400 μm when the frequency is continuously changed from 1 Hz to 70 Hz under a constant temperature of 120 ° C. with a shear viscosity measuring device. An adhesive for semiconductors, which is a value obtained by dividing the viscosity value at 7 Hz by the viscosity value at 70 Hz.
(a)エポキシ樹脂、(b)硬化剤、及び、(c)重量平均分子量10000以上の高分子量成分を含有する、請求項1に記載の半導体用接着剤。 The semiconductor adhesive according to claim 1, which contains (a) an epoxy resin, (b) a curing agent, and (c) a high molecular weight component having a weight average molecular weight of 10,000 or more. さらに(d)フィラーを含有する、請求項2に記載の半導体用接着剤。 The semiconductor adhesive according to claim 2, further comprising (d) a filler. さらに(e)フラックス剤を含有する、請求項2又は3に記載の半導体用接着剤。 The semiconductor adhesive according to claim 2 or 3, further comprising (e) a flux agent. 前記(c)重量平均分子量10000以上の高分子量成分の多分散度Mw/Mnが3以下である、請求項2〜4のいずれか一項に記載の半導体用接着剤。 (C) The semiconductor adhesive according to any one of claims 2 to 4, wherein the polydispersity Mw / Mn of the high molecular weight component having a weight average molecular weight of 10,000 or more is 3 or less. 前記半導体用接着剤に含有される材料の一部もしくは全てが、シクロヘキサノンに可溶である、請求項2〜5のいずれか一項に記載の半導体用接着剤。 The semiconductor adhesive according to any one of claims 2 to 5, wherein a part or all of the material contained in the semiconductor adhesive is soluble in cyclohexanone. フィルム状である、請求項1〜6のいずれか一項に記載の半導体用接着剤。 The semiconductor adhesive according to any one of claims 1 to 6, which is in the form of a film. 請求項1〜7のいずれか一項に記載の半導体用接着剤を用い、接続装置により前記半導体用接着剤を介して半導体チップ及び配線回路基板の位置合わせを行い、互いに接続すると共に半導体チップ及び配線回路基板のそれぞれの接続部の電極同士を互いに電気的に接続し、前記接続部の少なくとも一部を前記半導体用接着剤で封止する工程、又は、接続装置により前記半導体用接着剤を介して複数の半導体チップの位置合わせを行い、互いに接続すると共に複数の半導体チップのそれぞれの接続部の電極同士を互いに電気的に接続し、前記接続部の少なくとも一部を前記半導体用接着剤で封止する工程を備える、半導体装置の製造方法。 Using the semiconductor adhesive according to any one of claims 1 to 7, the semiconductor chip and the wiring circuit board are aligned by the connecting device via the semiconductor adhesive, and are connected to each other and the semiconductor chip and the semiconductor chip. The step of electrically connecting the electrodes of the respective connection portions of the wiring circuit board to each other and sealing at least a part of the connection portions with the semiconductor adhesive, or via the semiconductor adhesive by a connecting device. The plurality of semiconductor chips are aligned with each other, connected to each other, and the electrodes of the connecting portions of the plurality of semiconductor chips are electrically connected to each other, and at least a part of the connecting portions is sealed with the semiconductor adhesive. A method of manufacturing a semiconductor device, comprising a step of stopping.
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