JPS6385700A - Band division type voice analyzer - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a speech analyzer, and more particularly to a speech analyzer used in a band division type speech analysis and synthesis device.

(Prior art) Conventionally, this type of technology has been described in The Bell System Technical Journal (The Bell System Technical Journal).
electrical journal) T 55 [8
) (1976-10) (US) p, 1069-10
The band division type speech analysis and synthesis method (Sub
- Also called Band Coding method, hereinafter referred to as SB
(abbreviated as C method) is known. This SBC method is the second
As shown in the figure, this is a method in which the frequency band of the audio signal is divided into a plurality of bands (usually 4 to 8), and the output of each divided channel is encoded and decoded separately. This SBC is shown in Figure 3.
The basic circuit configuration of the method is shown. Figure 4(a)-(,)
3 is a diagram for explaining the operation of the circuit shown in FIG. 3. FIG.

The operation of the SBC method will be explained below using FIG. 3 and FIGS. 4(a) to (e).

First, the operation of the analyzer is as follows.

An analog audio signal input from a microphone (not shown) or the like is input to a low-9 filter (not shown) to remove frequency components of 1/2 or more of a predetermined sampling frequency, and then sent to an AD converter. (not shown) from an analog signal to a digital signal S at a predetermined sampling frequency.
(n). Here n is the sample number.

This digitized input signal 5(n) is input to a bandpass filter 201, and a specific band component (Wlk - W2k in this case) is extracted as shown in FIG. 4(a). Next, the output signal of the bandpass filter 201 is multiplied by a cosine wave (cos wave) having a frequency Wlk shown in FIG. As shown in figure (C) <(0-W
k) is shifted to the baseband. 2W1 that occurs at this time
The Ronos filter 203 removes unnecessary frequency components (for example, the components indicated by dotted lines in FIG. 4(e)). The signal rk(n) obtained in this way is Wl
Since it requires only the following frequency components,
Sampling at a sampling frequency of 2W1 maintains necessary and sufficient information. For this purpose, the downsampling unit 204 lowers the unnecessarily high sampling frequency to 2Wk and performs downsampling.
This downsampled signal is encoded by an encoder 205, and the encoded signal is transmitted to a combiner.

Next, the synthesizer decodes the signal sent from the analyzer by performing processing completely opposite to that of the analyzer. That is, after the encoded signal is decoded by the full decoder 206, the interpolator 207 performs upsampling to return the signal downsampled by the analyzer to the original sampling frequency. °The output signal from the interpolation unit 207 is outputted to the multiplier 208 as shown in FIG. 4(d).
It is modulated by being multiplied by a subwave with a frequency of
) is returned to the original frequency band (WlkWzk), and then the (W
lk W2k) are removed.

In this way, a signal 5k(n) is output from the combiner.

The above series of processing is performed for each divided band (channel), and finally the outputs of all channels are added to obtain an output audio signal.

The above is the basic operation of the SBC system, but the circuit configuration shown in Figure 3 is not often directly converted into a device, and in order to reduce the amount of circuitry, the bandpass filters 201 and 209 are not used as shown in Figure 5. An SBC system with a configuration like this has also been proposed.

Next, the operation of the circuit shown in FIG. 5 will be explained.

First, in the analyzer, the digitized input signal S
(nl is a complex signal jQJ, n (where ωk = (
+W2k)/2] on Wl. This complex modulation is done by multiplier 301! Modulation (modulated wave is part ωkn)
, sine modulation by the multiplier 302 (the modulated wave is applied to the ground ωkn. The outputs of the multipliers 301 and 302 are applied to loaf four-pass filters 303 and 304 with a bandwidth (0-ω/2'), respectively. input and filtered.

In this way, the real part ak(n) of the complex signal ak(nl+jbk'') is output from the Ronos filter 303 as D-t!7+.

The filter 304 outputs a complex signal ak(n)+jbk(n
) are output. Each signal ak
(n) and bk(nl are respectively downsampled to frequency Wk by downsamplers 305 and 306, encoded by encoder 307, and transmitted to the synthesizer side.

In the synthesizer, the encoded signal is decoded by a decoder 308, returned to the original sampling frequency by interpolators 309 and 310, and then converted to the bandwidth (0-ω/
2) After being filtered through the Ronos filters 311 and 312, cos modulation by a multiplier 313;
The signal is demodulated by sine modulation by a multiplier 314, and the QC5 component of the signal and its own component are added by an adder 315 to synthesize the signals of the corresponding divided bands.

The above series of processing is performed for each divided band (channel), and finally the outputs of all channels are added to obtain an output audio signal.

(Problem to be Solved by the Invention) However, compared to the circuit configuration of the conventional speech analyzer shown in FIG. 5, the circuit scale is reduced compared to the one shown in FIG. However, there is a problem that a low noise filter is required for each channel, which is impractical. Furthermore, in the case of conventional speech analyzers, modulation, filtering and two stages of calculation processing are required.
When fixed-point arithmetic is performed, there is also the problem of how to accumulate calculation errors in each processing process.

It is an object of the present invention to provide a speech analyzer that eliminates the above-mentioned problems and enables high-quality encoding with a simple circuit configuration.

(Means for Solving the Problems) In order to achieve the above-mentioned object, the present invention is a band division type speech analyzer that receives an analog audio input signal and extracts a predetermined sampling frequency from the analog audio input signal.
a low-nox filter that removes the above-mentioned frequency components; a converter that samples the analog signal output from the low-nox filter at a predetermined sampling frequency and converts the analog signal into a digital input signal; and the digital input. Dividing the frequency band of the signal into multiple bands (channels) and using a frequency equal to the center frequency of the channel as the frequency component of each divided channel (2)
By performing amplitude modulation with a modulated wave and a sine modulated wave, low-pass filtering each amplitude-modulated component, and downsampling it according to the bandwidth of each divided channel, the ! components and si
and an acyclic filter section for extracting n components, and the center frequency and bandwidth of each divided channel are set so that the period of the downsampling is equal to a positive multiple of the period of the modulated wave. This is what I did.

Further, the acyclic filter section includes an input memory which has a capacity at least corresponding to the number of taps M of the acyclic filter section and which sequentially stores the digital input signal from the converter, and each input memory. 7' Filter coefficient u hm for low-pass filtering corresponding to m=0 to (M-1)
(However, m = 0 ~ (M-1)) and the modulation wave [2π
(m/D)J] (Here, J is a positive constant set in advance for each channel, D=(fs/fk)・J
The downsampling thinning interval expressed as fs
is the sampling frequency of low-pass filtering in the acyclic filter section, fk is the center frequency structure of the corresponding channel), and the product hmcos[2π(rilo)J) and the filter coefficients and the sIn modulated wave S[2π( r+
1//D)J] product hmsk+(2π(-1/D)J
, a filter coefficient memory that stores filter coefficients calculated in advance for M taps and for each channel as filter coefficients of 1; and each digital input signal stored in the input memory and the filter coefficient memory stored in the filter coefficient memory. and a sum-of-products operation unit that performs a sum-of-products operation for extracting the partial components and self-components of each channel at each downsampling period using the new filter coefficients obtained. .

(Function) The speech analyzer of the present invention replaces the low-pass filter of the analyzer shown in FIG.
The center frequency and bandwidth of each channel are set so that the downsampling period in each channel is equal to an integral multiple of the period of the modulated wave, and the FIR filter is Modulation, Ronox filtering, and downsampling are processed simultaneously in the following.The operation will be explained in detail below.

First, the relationship between a low-pass filter (an FIR filter is used in the present invention) and downsampling will be explained. Figure 6 shows the frequency amplitude characteristics of a low-pass filter, where the horizontal axis shows frequency and the vertical axis shows attenuation, where fs is the sampling frequency of the input signal of the low-pass filter, and fw is the band of any one channel. It is the width. Since the loaf 4-speed filter has the frequency amplitude characteristic as shown in FIG. 6, its output signal does not include frequency components of fw/2 or higher.

Therefore, according to Nyquist's sampling theorem, if the output signal of the low-pass filter is resampled at the downsampling frequency fo such that fD≧fw, necessary and sufficient information can be maintained.

Here, in order to facilitate processing, the downsampling frequency fD is usually selected to be a fraction of the sampling frequency 18 of the original signal. For example, fs = 10kHz + f
When w=1 kHz, it is sufficient to perform downsampling to extract one sample every 10 samples from the output of the low-pass filter calculated every fs, and in the present invention, this downsampling is also processed within the FIR filter.

FIG. 7 shows a basic configuration diagram of an FIR filter with M taps. Here, AD is an adder, Ro, R4tR2, .
...RM-1 is a register, and this register R6 to R
A shift register SR is constructed by the above.

When the input signal to this FIR filter is t''xn, the output y(θ is as shown in the following equation (1).

Here, each coefficient hm of the FIR filter is given by the inverse response of the desired loaf 4 filter.

In this way, the output signal of the FIR filter is determined without using past output signals, so if the output result is to be down-sampled, it only needs to be calculated once for each down-sampling period, and the values in between are calculated. There's no point.

In the present invention, the FIR filter performs downsampling and loaf mass filtering as described above, and also performs KCO5 modulation (or sine modulation).
The explanation will be given below.

In this case, the output yn of this FIR filter is expressed by the following equation (2).

Here, ω is the center frequency of the channel, and Ts is the input signal
n sampling period. As mentioned above, the loaf and filter operations are performed only for each down sample, so if n=Dn', the above equation (2) can be expressed as the following equation (3).

If the down-sampling thinning interval and center frequency f are selected as shown below, equation (3) becomes the following equation (5).

As is clear from equation (5), the swearing coefficient is the same every time regardless of n′, and cm=hmcos 2π−; J
(6) Then, by storing this cm in advance in the ROM as the coefficient V of the low-pass filter, and performing a correlation calculation with XDn'-□! Multiplication is no longer necessary, and the same applies to brutish multiplication in the case of ground modulation.Modulation (CxH
Modulation, ground modulation), low-pass, and downsampling processing can be performed all at once using only low-pass filter calculations in the FIR filter.

Table 1 below shows the sampling frequency of the input signal f
3 shows an example of the center frequency and bandwidth corresponding to each channel that can be obtained by the FIR filter in the speech analyzer of the present invention when 3 = 8 kHz.

Incidentally, since the thinning interval only needs to be regular and rapid, each of the values shown in Table 1 can take various values depending on the value of D.

In the FIR filter of the present invention, a desired one is selected and used from among the band division conditions determined in Table 1 or in a manner similar to Table 1.

(Embodiment) Fig. 1 is a block diagram showing the configuration of a band division type speech analyzer showing an embodiment of the present invention, where l is an analog signal input terminal, 2 is a low-pass filter, and 3 is an A/D converter. , 4 is an F'IR filter section.

In the present IJ, the FIR filter section 4td, the input memory 5 that stores the digital signal sent from the converter 3, the coefficient memory 6 that stores the filter coefficients shown by the above-mentioned equation (6), the input memory 5 and the coefficients. a memory management unit 7 that performs old read control and address control of the memory 6; a multiplier 8 that multiplies the digital signal from the input memory 5 by the filter coefficient from the coefficient memory 6; It is composed of an integrator 9 that accumulates multiplication results corresponding to channels. Further, lO is an output terminal.

In this example, the sampling frequency of the input signal is 8 kHz.
The number of z-band divisions is 4, and the center frequency, bandwidth, and constant J of each channel are set as follows.

Center frequency habit Bandwidth J Channel 1 800Hz 800Hz 1
Channel 2 1600Hz 800Hz
2 channels 3 2400Hz 800Hz
3 channels 4 3200Hz 800Hz
4. Also, the number of taps of the filter is set to M=80.

The configuration of the input memory 5 will now be described with reference to FIG. This manual memory 5 may have a capacity that can hold the latest data of the number of taps of the filter, that is, 80, at the time of filter calculation in the FIR filter section 4, but it also has a capacity that can hold the latest data of the number of filter taps, that is, 80, at the time of filter calculation in the FIR filter section 4. Since new input data is entered, 1 for input pamphlet.
It has an extra capacity for the downsampling period, that is, 10 data, and has a total capacity of 90 data.

Next, referring to FIGS. 9(a) and 9(b), the coefficient memory 6
The configuration of is explained below. FIG. 9(a) shows the coefficient memory 6
9 (bl is a partially enlarged view of FIG. 9 (al). This coefficient memory 6 stores the filter coefficient vhmcos[2π-
J], and filter coefficient hm*(zπ−
J] (where m = O to 79) are calculated and stored in advance in 80 pieces corresponding to the number of taps of the filter and corresponding to channels 1 to 4, respectively.

The operation of this embodiment will be described below with reference to FIGS. 1, 8, and 9(a) and (b).

First, an analog audio signal is input from the analog signal input terminal 1 via a microphone (not shown) or the like. This analog audio signal is input to a low-pass filter 2 to remove frequency components higher than 1/2 of a predetermined sampling frequency, and then to an A/D converter 3 at a predetermined sampling frequency (8 kHz in this example). The signal is converted into digital input data 5(n).

This input data 5(n) is input to the FiFIR filter unit 4 and stored in the input memory 5 sequentially from address O under the control of the memory management unit 7. When data is written up to address 89, the address of this manual memory 5 returns to address O again. On the other hand, since the memory management unit 7 writes and reads input data to and from the input memory 6 and reads filter coefficients from the coefficient memory 6 in a time-sharing manner, while input data is being written to the input memory 5, Before that, the input data stored in the input memory 5 and the filter coefficients stored in the coefficient memory 6 are read out, and are sequentially calculated using the multiplier 8 and the integrator 9 as shown in equation (7) above. A sum-of-products operation is executed. This product-sum operation calculates the casff2 component al and the sfn component bn for each channel within one downsampling period, and this is repeated every downsampling period. This calculation will be explained in more detail below.

Here, input data S (n
) has been written. When this is completed, the integrator 9 is reset. Next, the memory management unit 7
The read address of input memory 5 is set to the start address of area 1, and the read address of coefficient memory 6 is set to coefficient memory 6.
Set to the first address of After the above settings have been made, while sequentially incrementing the addresses of the input memory 5 and coefficient memory 6, the input data S(n) is read from the input memory 5, and the four-component filter coefficients are read from the coefficient memory 6, respectively. , the sum of products of both is performed for the number of taps (80). At this point, channel (ch) 1 a
This means that the calculation of -f5 minutes an is completed, and the product-sum result stored in the integrator 9 is outputted from the output terminal 10,
Multiplier 9 is reset. Next, the read address of the input memory 5 is set to the start address of area 1 again.

On the other hand, the read address of the coefficient memory 6 continues to be incremented, and at this point, the read address of the coefficient memory 6 continues to be incremented.
It is set to the start address of the filter coefficients for inli. Then, in the same way, sequentially perform all product-sum calculations, Ch
The sine component of I. is calculated and outputted from the output terminal 10.

Hereinafter, the four components aH and sfn components bn are calculated for ah 2 to 4 in the same manner as described above, and the output terminal 1
More than θ is output.

During this time, input data is also written to area 9 of input memory 5 in a time-division manner, and writing of new input data to area 9 is completed during this downsampling period. In the next downsampling cycle, new input data is written to area 1 of input memory 5 and is stored in areas 2 to 9. Calculation of the above-mentioned Cps component and sIn component using input data,
and their output is performed. Hereinafter, in the same way, new input data is stored in the input memory 5 for each downsampling period, and the four components and the oxidation component are calculated using the input data previously stored in the input memory, and their The output is repeated.

In this way, each area 1 to 9 of the input memory 5 is used cyclically.

In addition, this FIR filter section performs υ, low/e-s filtering, and H! by a product-sum operation that calculates the min and sfn components of each channel for each downsampling cycle. Modulation or sin modulation is performed simultaneously.

(Effects of the Invention) As explained in detail above, according to the band-splitting speech analyzer of the present invention, a low-pass filter coefficient multiplied by a modulated wave (or modulation or old man modulation) is used as a new filter coefficient. Therefore, it is no longer necessary to perform multiplication for first-stage modulation separately from low-pass filtering as in the past, and the amount of calculation and calculation error can be reduced. Since it is multiplied by a coefficient, the memory capacity for storing it can be considerably reduced compared to the conventional method.

Furthermore, in the analyzer of the present invention, the input to the FIR filter section that functions as a low-pass filter is not a signal obtained by modulating the input signal, but the output of the converter itself.
Conventionally, the input memory capacity required was equal to channel depth x 2 x number of filter taps, but now the input memory capacity is equal to the number of taps (e.g. 80) + 227
7 minutes (for example, 10 minutes) is sufficient, and the circuit scale can be significantly reduced.

The present invention is based on a band division type speech analysis and synthesis device, that is, SBC.
It can be used in voice analysis and synthesis equipment, channel vocoders, etc., and is effective for short-term spectrum analysis of signals, not just voice.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a diagram showing an example of band division in the SBC system, and FIG.
The figure is a block diagram of a conventional speech analysis synthesizer using the SBC method. Figure 6 is a diagram showing the frequency amplitude characteristics of the low-pass filter, Figure 7 is the FIR
Basic configuration diagram of the filter, Figure 8 is a configuration diagram of the input memory, Figure 9(a) is a configuration diagram of the filter coefficient memory, Figure 9
FIG. 9(b) is a partially enlarged view of FIG. 9(a). l...Input terminal, 2...Low/4' filter, 3
..., Φ converter, 4... FIR filter section, 5.
...Input memory, 6...Filter coefficient memory, 7...
-Memory management unit, 8...multiplier, 9...integrator. Akira Oguta+=41zb Furuto's clever name □l 翫 1st figure stomach number KHz Sec direction +-, "r-, (-T'a hanging N to the party゛1 f'1 Figure 2 (Envy, SBC universal criticism analysis table to device 7 44 Figure 3 Taku 3 leap) control hill i Figure 8 to the ellipse Filter number of Tatsumi tk Figure 9

Claims (2)

[Claims] (1) A low-pass filter that receives an analog audio input signal and removes frequency components of 1/2 or more of a predetermined sampling frequency from the analog audio input signal, and an analog signal output from the low-pass filter at a predetermined sampling frequency. an A/D converter that samples and converts the analog signal into a digital input signal; and an A/D converter that divides the frequency band of the digital input signal into a plurality of bands (channels) and converts the frequency components of each divided channel into cos with a frequency equal to the frequency
Amplitude modulation is performed using a modulated wave and a sine modulated wave, and each amplitude-modulated component is low-pass filtered and down-sampled according to the bandwidth of each divided channel, thereby obtaining a cosine component and a sine component for each channel. and a non-recursive filter section for extracting, and setting the center frequency and bandwidth of each divided channel so that the period of the downsampling is equal to an integral multiple of the period of the modulated wave. vessel. (2) The acyclic filter section includes an input memory that has a capacity at least corresponding to the number of taps M of the acyclic filter section and that sequentially stores digital input signals from the A/D converter; Tap m=0~
Filter coefficient h_m (where m = 0 to (M-1)) for low-pass filtering corresponding to (M-1) and cos modulation wave cos [2π (m/D) J] (where J corresponds to each channel) A positive constant preset to D, D = (f_s
h_mcos[2
π(m/D)J] and the filter coefficient h_m and sin
Product h_msin with modulated wave sin [2π(m/D)J]
a filter coefficient memory that stores [2π(m/D)J] as a new filter coefficient calculated in advance for M taps and for each channel; and each digital input signal stored in the input memory. and a product-sum operation unit that performs a product-sum operation for extracting a cosine component and a sine component of each channel at each downsampling period using the new filter coefficients stored in the filter coefficient memory. A band division type speech analyzer according to claim (1).