JPS6359023A - A/d converter - Google Patents

Abstract

PURPOSE:To improve the accuracy of an A/D converter as a theoretical value by shifting a DC potential of a video signal aud inputting the result to the 2nd A/D converter. CONSTITUTION:A video signal amplified by an amplifier 1 is clamped to a lower limit Vref1 by a clamp circuit 4 and the blanking period is replaced into an upper limit Vref2 by a switch circuit 3. A level shift circuit 2 shift its current/ potential so that the potential at the blanking part is a reference potential Vref1. Thin the output signal of the clamp circuit 4 and an output signal of the level shift circuit 2 are inputted respectively to A/D converters 6, 7. Thus, the lower half of the analog signal is converted into an n-bit digital signal by the A/D converter 7 and the upper half is converted by the A/D converter 6 respectively and the arithmetic processing unit 8 form the summed (n+1)-bit digital signal. Thus, the accuracy is doubled in comparison with the single operation.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an A/D converter that converts analog signals, particularly analog video signals, into digital signals.

2. Description of the Related Art An A/D converter that converts an analog video signal into a digital signal is required to have both high speed and high accuracy. Accuracy is determined by the number of bits in the converted digital signal, and increases by a factor of two for each additional pit. However, with current semiconductor technology, it is extremely difficult to realize a high-speed A/D converter with a large number of bits. Therefore, high-speed A with a small number of bits
Several proposals have been made to improve accuracy in /D converters.

As a method for improving the bit precision of conventional A/D converters, see the Technical Report of the Television Society VOL.

9, black 14PP57-62.

Figure 3 is a block diagram of this conventional A/D converter.
, , -7, 1 is an amplifier with a gain of 2, 4 is a clamp circuit that clamps the DC potential of the video signal to the potential of the reference voltage source 9, and 5 is a clamp pulse or a
6. a synchronization signal generator that supplies driving clock signals to the A/D converters 6 and 7; Finally, an A/D converter that converts an analog signal into an n-bit digital signal, 9, 10.
11 is a reference voltage source (also called a reference voltage source) that determines the input voltage range (also called a reference voltage range) of the A/D converters 6 and 7; 8 is an A/D 12 is an arithmetic processor that performs arithmetic processing, for example, addition, on the digital signals converted by the converters 6 and 7;
A level shift circuit 13 shifts the clock level input to the A/D converter 6 to an appropriate level; 13 is a level shift circuit that changes the level of the digital signal of the A/D converter 6;

The operation of the A/D converter configured as described above will be described below.

After the video signal is amplified twice by the amplifier 1, the blanking portion is amplified by the clamp circuit 4 at a potential vref+ (reference voltage Vre) determined by the reference voltage source 9.
fj) and input to an A/'D converter. The A/D converter 6 receives the potential v of the reference voltage source 11.
A potential difference (Vr
efs Vref2) into an n-bit digital signal. Same (A/D converter 7 has potential difference (Vrefz
-Vref+) k Convert to n bits. Each A/
The digital signals converted by the D converters 6 and 7 are added together by the arithmetic processor 8, resulting in (n-1-1) digital signals.

Now, the accuracy of the A/D converter configured as above will be described. First, for comparison, the accuracy when the A/D converter 7 is operated alone will be described.

FIG. 4 shows the configuration when the A/D converter 7 is independent, and as shown in FIG. 5(A), the potential difference (Vref2Vr
ef+) is converted into an n-bit digital signal. On the other hand, in the case of FIG. 3, the video signal amplified twice by amplifier 1 is sent to xy A/D converter 6. It will be entered at the end. As shown in FIG. 5(B), even if the same signal as in FIG. 5(A) is input, (
Vrefs −Vref2) = (Vref2− V
ref+), the lower half thereof is converted into an n-bit digital signal by the A/D converter T, and the upper half thereof is converted by the A/D converter 6 into an n-bit digital signal. The signal obtained by adding these together becomes n-)-1 bits. Therefore, A
/ Even if the same analog signal as used alone is input to the D converter, it will be converted to a (n-1-1) bit digital signal, and the accuracy will be doubled.

In this way, the accuracy of the A/D converter can be improved by the configuration shown in FIG. The configuration shown in this conventional example requires two n-bit A/D converters to improve accuracy per bit, but it is much more effective than realizing a high-speed n+1-bit A/D converter. be. And you can use the same technique to get as much precision as you need.

Problems to be Solved by the Invention However, the configuration shown above has the following problems.

Generally, an A/D converter can achieve accuracy only when the input voltage range is set to a predetermined value, but it cannot be set arbitrarily. By the way, in the conventional configuration shown in FIG. 3, the A/D converter 6 compares the upper and lower limits of the input voltage range with the input voltage range of the human/D converter.
It is necessary to increase f2. However, as mentioned above, there is an appropriate set value for the input voltage range, so in the end, for example, by increasing the power supply voltage and ground kVref'2 of the A/D converter 7, It is necessary to ensure that the input voltage range is as high as Vref as the set value.

Items that require high precision, such as A/D converters,
It is most stable to work with the ground as a reference,
Conventional configurations not only increase the number of power supplies but also degrade stability and accuracy. Furthermore, when the power supply voltage changes, it becomes necessary to shift the level of the clock input to the A/D converters and the digital signal output, and level shift circuits 12 and 13 are required. 7. Level-shifting high-speed digital signals.

requires a considerable circuit size.

As described above, although the conventional method can theoretically improve the accuracy of the A/D converter by twice, it has not been able to fully demonstrate its capabilities due to increased stability and peripheral circuit scale.

In view of these points, the present invention provides an A/D that is highly stable, can easily implement peripheral circuits, and fully exhibits theoretical performance.
The entire purpose is to provide a converter.

Means for Solving the Problems In order to achieve the above object, the present invention includes a first A/D converter to which a video signal is input, a shift circuit for shifting the DC potential of the video signal, and a shift circuit for shifting the DC potential of the video signal. a second A/D converter to which an output signal is input; a first A/D converter;
The configuration includes a processing circuit that performs arithmetic processing on the output signal of the A/D converter.

Effect of the present invention With the above-described configuration, the DC potential of the video signal is shifted and inputted to the second A/D converter, so that the tenth A/D converter and the second A/D converter are the same. It works with the power supply voltage, and its accuracy allows it to fully demonstrate the theoretically set performance.

Embodiment FIG. 1 shows a block diagram of an A/D converter in a first embodiment of the present invention, and the same parts as in FIG. 3 are given the same numbers. In FIG. 1, 2 is a level shift circuit that level-shifts the DC potential of the output signal so that the DC potential in the blanking part of the output signal of the switch circuit 3 becomes the same as the reference potential vref1, and 3 is a synchronization signal generator. This is a switch circuit that replaces the blanking portion of Shingetsu, which is clamped to the reference potential vref+ by the clamp circuit 4, with the reference potential vref+ by the blanking signal supplied from the clamp circuit 6.

The operation of the A/D converter of this embodiment configured as described above will be explained using FIG. 2.

The video signal amplified by the amplifier 1 is clamped to Vrefl by the clamp circuit 4, and its waveform becomes as shown in FIG. 2(A). The video signal is sent to a switch circuit 39, .

The blanking period is replaced by vref2, as shown in FIG. 2(B). The level shift circuit 2 shifts the current potential so that the potential of the blanking portion becomes the reference potential Vref+. FIG. 2(C) shows this situation. The output signal of the clamp circuit 4 and the output signal of the level shift circuit 2 are respectively transferred to a p/D converter 7.
eVc is input. Therefore, as in the conventional example shown in FIG. 3, the lower half of the analog signal input to the amplifier 1 is converted into a digital signal of n pints by the A/D converter 7, and the upper half by the A/D converter 6. are converted into a digital signal of (n+1) pits and added by the arithmetic processor 8. This results in twice the accuracy as when working alone. Moreover, since the A/D converter 6 works in the same input voltage range as the A/D converter 7, there is no need to shift the power supply voltage as in the conventional case, it operates stably, and the accuracy is the same as the theoretical value. Improved. Compared to the small digital level shift circuits 12 and 131c, the analog level shift has a simple configuration, and the switch circuit 3 can also be realized with a small general-purpose IC, so the scale of the peripheral circuits is also reduced.

As described above, according to this embodiment, the DC potential of the video signal input to the A/D converter 6 is level-shifted to
/ By inputting the signal to the D converter 7, the circuit scale is small, the circuit operates stably, and the same accuracy improvement as the theory can be obtained.

In this embodiment, the blanking period is replaced with a reference potential, but it may be replaced by generating a potential that is Y equal to the reference potential.Furthermore, the voltage input to the clamp circuit 4 may also be a potential that is × equal to the reference potential. good. Furthermore, the same effect can be obtained by adding a noise whose height is approximately equal to the input voltage range of the A/D converter 7 during the blanking period.

Furthermore, although the same reference voltages Vref+ and vref2k are input to the A/D converters 6 and 7, similar effects can be obtained even if different reference voltages are input.

1. The present invention can be applied even if the polarity of the signal is reversed, but it goes without saying that the reference potential to be replaced and the voltage to be shifted will change.

112.-J Furthermore, although the explanation has been given using an example in which two A/D converters are used to improve the precision by two times, it goes without saying that the present invention can also be applied to a system in which a plurality of A/D converters are used to improve the precision.

As described in detail, according to the present invention, the accuracy of the A/D converter can be improved according to the theoretical value, and its practical effects are particularly noticeable in fields that require high speed and high precision, such as video signals. is thick.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an A/D converter according to an embodiment of the present invention, Fig. 2 is a waveform diagram showing the operation of each part of the same embodiment, and Figs. 3 and 4 are a diagram of a conventional A/D converter. A block diagram of the converter and FIG. 5 are waveform diagrams showing the operation of the conventional example. 1...Amplifier, 2...Level shift circuit, 3...Switch circuit, 4...Clamp circuit, 5...Synchronization signal generation Vessel, 6, 7...
...A/D converter, 8... Arithmetic processor. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 5
Figure σoo-or

Claims (2)

[Claims] (1) A first A/D converter to which a video signal is input, a shift circuit that shifts the DC potential of the video signal, and at least a second A/D converter to which the output signal of the shift circuit is input.
An A/D converter comprising: a /D converter; and a processing circuit that performs arithmetic processing on output signals of first and second A/D converters. (2) The shift circuit is a circuit that replaces a certain period during the blanking period of the video signal with a potential that is the same as or approximately equal to the upper or lower limit potential of the input voltage range of the first A/D converter, or the video signal a circuit that adds a pulse with a height equal to or approximately equal to the input voltage range of the first A/D converter during a certain period during the blanking period of the first A/D converter;
2. The A/D converter according to claim 1, further comprising a circuit for shifting a DC potential to be equal to or substantially equal to an upper or lower limit of an input voltage range of the A/D converter.