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JPS63307793A - Semiconductor laser element - Google Patents

Semiconductor laser element

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Publication number
JPS63307793A
JPS63307793A JP14452587A JP14452587A JPS63307793A JP S63307793 A JPS63307793 A JP S63307793A JP 14452587 A JP14452587 A JP 14452587A JP 14452587 A JP14452587 A JP 14452587A JP S63307793 A JPS63307793 A JP S63307793A
Authority
JP
Japan
Prior art keywords
width
active layer
region
layer
semiconductor laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14452587A
Other languages
Japanese (ja)
Inventor
Kazuaki Sasaki
和明 佐々木
Masahiro Hosoda
昌宏 細田
Masaki Kondo
正樹 近藤
Saburo Yamamoto
三郎 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP14452587A priority Critical patent/JPS63307793A/en
Publication of JPS63307793A publication Critical patent/JPS63307793A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a semiconductor laser element, which has low threshold currents and no astigmatism and in which no higher transverse mode is generated, by forming a region blocking a diffusion to both sides of a stripe of carriers in an active layer so that its width is the same as or narrower than a that of channel. CONSTITUTION:A region blocking the diffusion of carriers in an active region 3 is formed into an optical guide shaped by absorbing light from the active layer 3 on both shoulders of a striped groove 7 formed onto a substrate 1, and the width Wm of the region is set at a value the same as or narrower than the width Wc of the optical guide approx imately. Accordingly, since the width Wm of the active layer is shaped dn width narrower than or the same as the width Wc of a V channel and both sides of a mesa-shaped region including the active layer 3 are buried with multilayer crystal layers 11, 12, leakage currents are reduced, and currents can be concentrated effectively into the narrow mesa-shaped region, thus acquiring a semiconductor laser oscillating at an extremely low threshold. Characteristics having no astigmatism are obtained with excellent reproducibility.

Description

【発明の詳細な説明】 く技術分野〉 本発明は極めて低いしきい値電流を有し、非点収差のな
い屈折率導波路型半導体レーザの素子構造に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to an element structure of a refractive index waveguide semiconductor laser having an extremely low threshold current and no astigmatism.

〈従来技術〉 従来の半導体レーザ素子を光導波機構で分類すると、利
得導波型と屈折率導波型とに分類される。
<Prior Art> When conventional semiconductor laser devices are classified by optical waveguide mechanism, they are classified into gain waveguide type and refractive index waveguide type.

しかし、応用上重要な横モード安定性の点からは屈折率
導波型の方が断熱有利であり、様々な構造の屈折率導波
型レーザが提案されている。この代表的な例として、 
B H(Bur i ed  Heterostruc
ture )レーザ及びVSIS(V−channel
ed 5ubstrateInner 5tripe)
レーザがある。
However, from the point of view of transverse mode stability, which is important for applications, the refractive index guided laser is more advantageous in terms of insulation, and index guided lasers with various structures have been proposed. A typical example of this is
B H (Buried Heterostruc
) laser and VSIS (V-channel
ed 5ubstrateInner 5tripe)
There's a laser.

第3図はBHレーザの素子構造を示す断面模式図である
。p  GaAs基板1上に幅Wmのストライプ状多層
結晶構造部が形成され、この部分がレーザ発振用動作部
となる。即ち、この多層結晶構造部はp −GaAtA
s  クラッド層2、GaAtAs活性層3、n−Ga
AtAsクラッド層4、n−GaASキャップ層5から
成るダブルへテロ接合構造を構成している。!た活性層
3の両側を低屈折率物質15で埋め込んでいるので完全
な屈折率導波を示し、非点収差がなく、しきい値電流が
IOmA程度で比較的小さいという利点を有する。しか
しながら、埋め込み層15の屈折率及び導波路幅W を
適正m に選択しないと高次横モードで発振し易いので、製作条
件の点で制約が多いという欠点を有する。
FIG. 3 is a schematic cross-sectional view showing the element structure of a BH laser. A striped multilayer crystal structure portion having a width Wm is formed on the p-GaAs substrate 1, and this portion becomes an operating portion for laser oscillation. That is, this multilayer crystal structure is p-GaAtA
s cladding layer 2, GaAtAs active layer 3, n-Ga
It constitutes a double heterojunction structure consisting of an AtAs cladding layer 4 and an n-GaAS cap layer 5. ! Since both sides of the active layer 3 are filled with a low refractive index material 15, it exhibits perfect refractive index waveguide, has no astigmatism, and has the advantage of having a relatively small threshold current of about IOmA. However, unless the refractive index of the buried layer 15 and the waveguide width W are appropriately selected m, oscillation is likely to occur in a high-order transverse mode, so there is a drawback that there are many restrictions in terms of manufacturing conditions.

一方、第4図に示すvstsレーザはp  GaAs基
板l上にn−GaAs電流阻止層6を堆積した後幅Wc
のストライプ状V字溝を刻設して基板1上から電流阻止
層6の除去された電流通路を開通させた後p  GaA
tAs クラッド層2、GaAtAs活性層3、n −
GaAtAsクラッド層4、n−GaAs キャップ層
5を順次積層してダブルへテロ接合レーザ動作部を形成
したものであり、導波路幅Wct−4〜7μm と広く
しても、活性層3内で導波路の外側の光が電流阻止層(
6)と基板1に吸収されるため、高次モード利得が抑制
され、高次横モードが発生しないという利点を有してい
る。しかし、しきい値電流が40〜60mAとなfiB
Hレーザに比べて高く、非点収差が10〜20μmで比
較的大きいといった欠点がある。しきい値電流が高い理
由は、電流が電流阻止層6による内部ストライプ構造に
よって狭窄されているのに対して、活性層3内に注入さ
れたキャリアは活性層3の横方向両側へ拡散するので、
レーザ発振に無効なキャリアが発生するためである。こ
の無効キャリアは不必要な自然放出光及び発熱に消費さ
れ、レーザ素子の信頼性に悪影響を与える。また、vS
ISレーザの大きな非点収差は、導波路両側の光が吸収
されるため、その光の波面が中央部に対して遅れること
から起こる。
On the other hand, the vsts laser shown in FIG. 4 has a width Wc after depositing an n-GaAs current blocking layer 6 on a p-GaAs substrate l.
After cutting a striped V-shaped groove to open a current path from the substrate 1 with the current blocking layer 6 removed, p GaA
tAs cladding layer 2, GaAtAs active layer 3, n −
A double heterojunction laser operating section is formed by sequentially laminating a GaAtAs cladding layer 4 and an n-GaAs cap layer 5, and even if the waveguide width Wct is as wide as Wct-4 to 7 μm, the waveguide cannot be guided within the active layer 3. Light outside the wave path passes through the current blocking layer (
6) and is absorbed by the substrate 1, which has the advantage that higher-order mode gain is suppressed and higher-order transverse modes do not occur. However, when the threshold current is 40 to 60 mA, fiB
It has drawbacks such as being expensive compared to the H laser and having a relatively large astigmatism of 10 to 20 μm. The reason for the high threshold current is that while the current is confined by the internal stripe structure of the current blocking layer 6, carriers injected into the active layer 3 diffuse to both sides of the active layer 3 in the lateral direction. ,
This is because carriers that are invalid for laser oscillation are generated. These invalid carriers are consumed by unnecessary spontaneous emission and heat generation, which adversely affects the reliability of the laser device. Also, vs.
The large astigmatism of the IS laser occurs because light on both sides of the waveguide is absorbed, and the wavefront of that light lags behind the center.

〈発明の目的〉 本発明は、上述のBHレーザ及びVSISレーザのそれ
ぞれの問題点を解決し、しきい値電流が低く非点収差が
なくしかも高次横モードの発生のない半導体レーザ素子
を提供することを目的とする。
<Objective of the Invention> The present invention solves the problems of the above-mentioned BH laser and VSIS laser, and provides a semiconductor laser device with a low threshold current, no astigmatism, and no generation of higher-order transverse modes. The purpose is to

上記目的を達成するため、本発明はVSISレーザにお
いて、活性層内キャリアのストライプ両側への拡散を阻
止する領域を、チャネル幅と同じ幅か、それよシも狭く
形成したことを特徴とする。
In order to achieve the above object, the present invention is characterized in that a VSIS laser is provided in which a region that prevents carriers in the active layer from diffusing to both sides of the stripe is formed to have a width equal to or narrower than the channel width.

〈実施例〉 第1凹穴ないし第1図(C)は本発明の各実施例を示す
半導体レーザの模式図である。以下、第1凹穴を参照し
て、この発明の第1の実施例について説明する。p型G
aAs基板1を用いたVSISレーザのVチャネル溝7
の両側にチャツプ層50表面からn−GaAs電流阻止
層6に達するまでメサエッチし、チャネル溝幅をWc=
4μm1活性層3のところでのメサ幅をWm=2μmと
し、WmくWcとなるように形成する。次に液相エピタ
キシャル(LPE)成長法により、高抵抗AtxGa 
I −XAS(0,5<x、ノンドープ又はGeドープ
)の第1埋込層l 1 、 p−AtxGa+−XAS
 (x=0.2 )の第2埋込層I2およびn −At
xGa+ −XAS (x==0.2 )の第3埋込層
13、n−GaAsの第4埋込層(キャップ層)14を
順次成長させる。このとき第1埋込層11と第2埋込層
12はその成長時間を短かくすることにより、キャップ
層5の表面には成長しないように調整する。第3埋込層
13は第2埋込層12成長後にこの層を成長させること
により素子表面の平坦性を向上させるためのもので、第
4埋込み層14の厚さに関係なく素子表面は充分に平坦
になった。
<Example> The first recessed hole or FIG. 1(C) is a schematic diagram of a semiconductor laser showing each example of the present invention. Hereinafter, a first embodiment of the present invention will be described with reference to the first recessed hole. p-type G
V channel groove 7 of VSIS laser using aAs substrate 1
Mesa etching is performed from the surface of the chap layer 50 to the n-GaAs current blocking layer 6 on both sides of the channel groove width Wc=
The mesa width at one active layer 3 is set to 4 μm and Wm is 2 μm, and the mesa width is formed so that Wm is smaller than Wc. Next, high-resistivity AtxGa was grown by liquid phase epitaxial (LPE) growth method.
I-XAS (0,5<x, non-doped or Ge-doped) first buried layer l 1 , p-AtxGa+-XAS
(x=0.2) second buried layer I2 and n-At
A third buried layer 13 of xGa+ -XAS (x==0.2) and a fourth buried layer (cap layer) 14 of n-GaAs are sequentially grown. At this time, the first buried layer 11 and the second buried layer 12 are adjusted so that they do not grow on the surface of the cap layer 5 by shortening their growth time. The third buried layer 13 is grown after the second buried layer 12 is grown to improve the flatness of the element surface, and regardless of the thickness of the fourth buried layer 14, the element surface is sufficiently covered. It became flat.

この第1図(5)に示した第1の実施例に係る半導体レ
ーザ素子は、高抵抗(e)I Q−611)のAtGa
AS第1埋込層11あるいはp −AtGaAs  第
2埋込層I2とn二GaAs電流阻止層6とで形成され
るPn逆バイアス接合の形成によシ、リーク電流を極め
て少なくできるので、しきい値電流はIOmA前後、発
振波長は780 nmのものが得られた。またCW(連
続発振)動作において、光出力20mW程度まで安定な
基本横モードで発振させることができた。
The semiconductor laser device according to the first embodiment shown in FIG. 1(5) is made of AtGa
By forming a Pn reverse bias junction formed by the AS first buried layer 11 or the p-AtGaAs second buried layer I2 and the n2-GaAs current blocking layer 6, the leakage current can be extremely reduced. A value current of around IOmA and an oscillation wavelength of 780 nm were obtained. Furthermore, in CW (continuous wave) operation, it was possible to oscillate in a stable fundamental transverse mode up to an optical output of about 20 mW.

このような高出力まで基本横モードが維持されるのは、
活性層幅(Wm=2μm)がVチャネル幅(Wc=’4
μm)より狭いものの、活性層よりしみ出した光がVチ
ャネル肩部に吸収され、高次モードの利得が抑圧される
効果が残っているためと考えられる。又メサ幅WmをV
チャネル幅Wcより狭く形成しているため、基板による
光吸収量は従来の第4図に示すVSISレーザより減少
し、第3図に示すBHレーザのような完全な屈接率導波
型に近づいておりかつ非点収差はほとんど発生しない0 第1図(B)はメサエッチングを調整し、■チャネル幅
(Wc24μm)と活性層幅(Wm24μm)を一致さ
せたものである。この例の埋込型半導体レーザにおいて
も、しきい値電流15mA前後、発振波長が780 n
mのものが再現性良く得られた。またWc動作において
光出力20mW以上まで基本横モードで発振しているこ
とが確認された。レーザ光のビームウェストは端面に一
致し、非点収差もなかった。
The reason why the fundamental transverse mode is maintained up to such high power is that
The active layer width (Wm=2μm) is the V channel width (Wc='4
Although the width is narrower than .mu.m), it is thought that this is because the light seeping out from the active layer is absorbed by the shoulder of the V channel, and the effect of suppressing the gain of higher-order modes remains. Also, the mesa width Wm is V
Since the channel width is narrower than Wc, the amount of light absorbed by the substrate is reduced compared to the conventional VSIS laser shown in Fig. 4, approaching a perfect index-guided type BH laser shown in Fig. 3. Figure 1(B) shows the mesa etching adjusted to match the channel width (Wc 24 .mu.m) and the active layer width (Wm 24 .mu.m). The buried semiconductor laser in this example also has a threshold current of around 15 mA and an oscillation wavelength of 780 nm.
m was obtained with good reproducibility. It was also confirmed that in the Wc operation, oscillation was performed in the fundamental transverse mode up to an optical output of 20 mW or more. The beam waist of the laser beam coincided with the end surface, and there was no astigmatism.

第1図(Qに示した第3番目の実施例は、第1凹穴に示
した第1番目の実施例と比べて、テラスを形成したp−
GaAs基板1上にn−GaAS電流阻止層6を形成し
たものを成長用下地基板としている点のみが異なってい
る。このような基板を用いることにより、チャネル溝7
外での電流阻止層6の厚みを充分確保することができる
ので、メサエッチングの際に電流阻止層6がエツチング
されて薄くなり過るのを防ぐことができ、リーク電流の
発生を抑制する効果がある。このため素子の歩留まりを
さらに向上させることができる。
The third embodiment shown in FIG. 1 (Q) is different from the first embodiment shown in the first recessed hole.
The only difference is that the base substrate for growth is a GaAs substrate 1 on which an n-GaAS current blocking layer 6 is formed. By using such a substrate, the channel groove 7
Since the current blocking layer 6 can be sufficiently thick outside, it is possible to prevent the current blocking layer 6 from being etched and become too thin during mesa etching, and this has the effect of suppressing the generation of leakage current. There is. Therefore, the yield of devices can be further improved.

第1図(C)に示した第3番目の実施例において、メサ
幅(活性層幅)WmをVチャネル幅(Wo=4μm)以
下にした場合の、発振しきい値π流1thとメサ幅Wm
の関係を第2図の長方形0ABC内に示す。又、比較の
ため、メサ幅WmがVチャネル幅Wcより広い第5図に
示す従来の埋込型−VSIS(B−VSIS)V−ザの
Ithとwmの関係も第2図の長方形0ABC外に示し
ている。Wmが小さくなるほど1thは小さくなり、特
にWm≦WCの場合(長方形0ABC内)1thは15
mA以下と非常に小さくなり、メサ幅WmをVチャネル
幅WC以下にすることにより、従来のB−VSISレー
ザに比べてもさらに低しきい値化が実現できていること
がわかる。又Wmを2μm以下にしても、2μmから4
μmの間にしても20mW以上まで基本横モードで発振
し、非点収差のないことを確認した。
In the third embodiment shown in FIG. 1(C), the oscillation threshold π current 1th and the mesa width when the mesa width (active layer width) Wm is set below the V channel width (Wo=4 μm) Wm
The relationship is shown within the rectangle 0ABC in FIG. Also, for comparison, the relationship between Ith and wm of the conventional buried-VSIS (B-VSIS) V-za shown in FIG. 5, where the mesa width Wm is wider than the V channel width Wc, is also outside the rectangle 0ABC in FIG. It is shown in The smaller Wm is, the smaller 1th becomes, especially when Wm≦WC (within rectangle 0ABC) 1th is 15
It can be seen that by making the mesa width Wm smaller than the V channel width WC, an even lower threshold value can be achieved compared to the conventional B-VSIS laser. Also, even if Wm is reduced to 2 μm or less, it will decrease from 2 μm to 4 μm.
It was confirmed that it oscillated in the fundamental transverse mode up to 20 mW or more even in the range of μm, and that there was no astigmatism.

Wmく2μmの場合は、GaAS基板への光吸収効果が
無くても、屈折率光導波路自体が基本横モード発振条件
を満足する。
When Wm is 2 μm, the refractive index optical waveguide itself satisfies the fundamental transverse mode oscillation condition even if there is no light absorption effect on the GaAS substrate.

〈発明の効果〉 以上のように本発明によれば、活性層幅をVチャネル幅
より狭くかあるいは同じ幅に形成し、活性層を含むメサ
状領域の両側を高抵抗AtxGa l −XAS(0,
5<x)層かAzxca 1−XASのPn逆バイアス
接合を含む多層結晶層で埋込んだことにょシ、IJ−り
電流を少なくシ、狭いメサ状領域に有効に電流を集中す
ることができるため、極めて低いしきい値で発振する半
導体レーザが得られる。またこのようにして形成された
半導体レーザは、メサ状領域がVチャネルの内部に存在
するものの、活性層から埋込層にしみ出した光がVチャ
ネル肩部に吸収される効果が保持されているせいか、2
0m1V以上の高出力まで横基本モードで発撮し、非点
収差のない特性を再現性良く示した。
<Effects of the Invention> As described above, according to the present invention, the active layer width is formed to be narrower than or equal to the V channel width, and both sides of the mesa-shaped region including the active layer are coated with high resistance AtxGal-XAS(0 ,
By embedding it with a multilayer crystal layer including a Pn reverse bias junction of Azxca 1-XAS (5< Therefore, a semiconductor laser that oscillates at an extremely low threshold value can be obtained. In addition, in the semiconductor laser formed in this way, although the mesa-shaped region exists inside the V channel, the effect that light seeping out from the active layer into the buried layer is absorbed by the shoulder part of the V channel is maintained. Maybe because there is, 2
It fired in the horizontal fundamental mode up to a high output of 0m1V or more, and showed characteristics with no astigmatism with good reproducibility.

なおこの発明の半導体レーザ素子は、上述のG a A
 s −A&;aAs  系に限定されることなく、I
npInGaAsP系やその他のへテロ接合レーザ素子
にも適用できる。また成長法もLPE(液晶エピタキシ
ャル成長)法以外にも、MO(有機) −CVD法、V
PE(気相成長)法やMBE(分子線エピタキシャル)
法などを利用しても良い。
Note that the semiconductor laser device of the present invention has the above-mentioned G a A
Without being limited to the s -A&;aAs system,
It can also be applied to npInGaAsP-based and other heterojunction laser elements. In addition to the LPE (liquid crystal epitaxial growth) method, the growth methods include MO (organic) -CVD method, V
PE (vapor phase epitaxy) method and MBE (molecular beam epitaxial)
You may also use the law.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(A)(B)(C)は本発明の各実施例を示す模
式図である。第2図は従来のBHレーザの概略断面図で
ある。又第3図乃至第5図は従来のVSISレーザの概
略断面図である。 1:p−GaAs基板、   2 : p−AtGaA
sクラッド層3 : AjGaAs活性層、  4 :
 n−AtGaAsクラッド層5:n−GaAsキャッ
プ層、 6:n−GaAsT流阻止層、 7:vチャネル溝、   8,9:電極1!=高抵抗A
tGaAs第1埋込層、+ 2 : p−AtGaAs
第2埋込層、+ 3 : n−AtGaAs第3埋込層
、+4 二n−GaAsキャップ層、 15:梶込層
FIGS. 1A, 1B, and 1C are schematic diagrams showing each embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of a conventional BH laser. 3 to 5 are schematic cross-sectional views of conventional VSIS lasers. 1: p-GaAs substrate, 2: p-AtGaA
s cladding layer 3: AjGaAs active layer, 4:
n-AtGaAs cladding layer 5: n-GaAs cap layer, 6: n-GaAsT flow blocking layer, 7: v-channel groove, 8, 9: electrode 1! = high resistance A
tGaAs first buried layer, +2: p-AtGaAs
2nd buried layer, +3: n-AtGaAs third buried layer, +4 2n-GaAs cap layer, 15: Kajikomi layer

Claims (1)

【特許請求の範囲】 1、基板上に形成されたストライプ溝の両肩で活性層か
らの光を吸収することによって作られる光導波路の内部
に、活性層内キャリアの拡散を阻止する領域を形成しか
つ該領域の幅を略々、前記光導波路幅と同じかあるいは
狭く設定したことを特徴とする半導体レーザ素子。 2、キャリアの拡散を阻止する領域が、高抵抗の化合物
半導体層又は半導体層のPn逆バイアス接合を含む複層
の少なくとも一方を含む多層結晶層で埋込まれている特
許請求の範囲第1項記載の半導体レーザ素子。
[Claims] 1. Inside the optical waveguide, which is created by absorbing light from the active layer on both shoulders of a striped groove formed on the substrate, a region is formed to prevent diffusion of carriers in the active layer. A semiconductor laser device characterized in that the width of the region is set to be approximately the same as or narrower than the width of the optical waveguide. 2. The region for preventing carrier diffusion is embedded in a multilayer crystal layer including at least one of a high resistance compound semiconductor layer or a multilayer including a Pn reverse bias junction of a semiconductor layer. The semiconductor laser device described above.
JP14452587A 1987-06-09 1987-06-09 Semiconductor laser element Pending JPS63307793A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14452587A JPS63307793A (en) 1987-06-09 1987-06-09 Semiconductor laser element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14452587A JPS63307793A (en) 1987-06-09 1987-06-09 Semiconductor laser element

Publications (1)

Publication Number Publication Date
JPS63307793A true JPS63307793A (en) 1988-12-15

Family

ID=15364355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14452587A Pending JPS63307793A (en) 1987-06-09 1987-06-09 Semiconductor laser element

Country Status (1)

Country Link
JP (1) JPS63307793A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013038092A (en) * 2011-08-03 2013-02-21 Toshiba Corp Semiconductor laser device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013038092A (en) * 2011-08-03 2013-02-21 Toshiba Corp Semiconductor laser device
US9407065B2 (en) 2011-08-03 2016-08-02 Kabushiki Kaisha Toshiba Semiconductor laser

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