JPS63263904A - Broad band dc amplifier - Google Patents
Broad band dc amplifierInfo
- Publication number
- JPS63263904A JPS63263904A JP62098949A JP9894987A JPS63263904A JP S63263904 A JPS63263904 A JP S63263904A JP 62098949 A JP62098949 A JP 62098949A JP 9894987 A JP9894987 A JP 9894987A JP S63263904 A JPS63263904 A JP S63263904A
- Authority
- JP
- Japan
- Prior art keywords
- emitter
- pairs
- base
- differential
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 6
- 230000000694 effects Effects 0.000 description 7
- 230000020169 heat generation Effects 0.000 description 4
- 230000003321 amplification Effects 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000001747 exhibiting effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、オシロスコープのブラウン管(CRT)の駆
動、特に垂直偏向板の駆動に用いる広帯域直流増幅器に
関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a wideband DC amplifier used for driving a cathode ray tube (CRT) of an oscilloscope, particularly for driving a vertical deflection plate.
従来の技術
第2図は従来の垂直出力増幅器の構成を示している。第
2図において、51.61は一対の入力端子、65.6
6は高周波増幅として働くトランジスタで、差動入力信
号がトランジスタ65.66のぺ2 べ−7゛
−スに印加される。トランジスタ65.66のエミッタ
はエミッタ結合抵抗器56を介して接続され、かつ抵抗
値の等しい抵抗器57.58を介して電圧源に接続され
ている。トランジスタ65.66の各コレクタはベース
接地トランジスタ67.68のエミッタに接続され、ト
ランジスタ67.68の各ベースはベースバイアス電圧
に接続され、各コレクタは負荷抵抗器71,72を介し
て適当な電圧源に接続されている。69.70は出力端
子である。Prior Art FIG. 2 shows the configuration of a conventional vertical output amplifier. In Figure 2, 51.61 is a pair of input terminals, 65.6
Reference numeral 6 denotes a transistor functioning as a high frequency amplifier, and a differential input signal is applied to the bases of transistors 65 and 66. The emitters of the transistors 65, 66 are connected via an emitter-coupled resistor 56 and to a voltage source via resistors 57, 58 of equal resistance. Each collector of transistors 65, 66 is connected to the emitter of a common base transistor 67, 68, each base of transistor 67, 68 is connected to a base bias voltage, and each collector is connected to an appropriate voltage via a load resistor 71, 72. connected to the source. 69.70 is an output terminal.
次に上記従来例の動作について説明する。Next, the operation of the above conventional example will be explained.
入力端子51.61への差動入力信号はトランジスタ対
65.66に印加され、エミッタ結合抵抗器56を介し
て差信号が増幅され、トランジスタ対67.68で伝送
され、出力端子69.70に差動出力として与えられる
。The differential input signal to the input terminals 51.61 is applied to the transistor pair 65.66, the difference signal is amplified via the emitter-coupled resistor 56, transmitted by the transistor pair 67.68, and output to the output terminal 69.70. Provided as a differential output.
発明が解決しようとする問題点
この種の増幅器は印加される入力信号の最高周波数およ
び最大振幅に対し、偏向板の容量を充電するため、増幅
器の出力段には普通十分な静止電流を供給する必要があ
る。このためエミッタ接地3 べ−7
段での消費電力が大きくなり、発熱が犬である。Problem to be Solved by the Invention This type of amplifier typically supplies sufficient quiescent current to the output stage of the amplifier to charge the capacitance of the deflection plate for the highest frequency and maximum amplitude of the applied input signal. There is a need. For this reason, the power consumption in the emitter-grounded 3rd and 7th stage increases, and heat generation increases.
この状態で入力信号が印加されると、差動構成のエミッ
タ接地段の動作点が変化し、このため上記エミッタ接地
段の消費電力が異なシ、発熱に差が生じる。この発熱差
が上記エミッタ接地段のベース、エミッタ間電圧の差と
して現われ、いわゆる熱的歪が発生する。When an input signal is applied in this state, the operating point of the common emitter stage of the differential configuration changes, and as a result, the power consumption of the grounded emitter stage differs, resulting in a difference in heat generation. This difference in heat generation appears as a difference in voltage between the base and emitter of the common emitter stage, resulting in so-called thermal distortion.
本発明は上記従来の問題点を解決するものであシ、広帯
域で、熱的歪の少ない広帯域直流増幅器を提供すること
を目的とするものである。The present invention is intended to solve the above-mentioned conventional problems, and it is an object of the present invention to provide a wideband DC amplifier with a wideband and low thermal distortion.
問題点を解決するための手段
本発明は上記目的を達成するため、カスコード接続のコ
ンデンサ給金エミッタ接地入力段およびベース接地出力
段を有する高周波信号路と、上記エミッタ接地の直流バ
イアス供給手段であるトランジスタのベース、エミッタ
間に演算増幅器による帰還回路を構成した低周波信号路
を備えたものである。Means for Solving the Problems In order to achieve the above object, the present invention provides a high frequency signal path having a cascode-connected capacitor-fed, emitter-grounded input stage and a base-grounded output stage, and means for supplying the emitter-grounded DC bias. A low-frequency signal path is provided between the base and emitter of a transistor, which constitutes a feedback circuit using an operational amplifier.
作 用
本発明は上記構成によシ次のような作用を有する。すな
わち、高周波および低周波経路に分離構成し、熱的歪が
発生する低周波経路に演算増幅器による帰還回路を設け
ているので、ベース、エミッタの電圧変化が生じても出
力側では帰還作用によりこの影響が現われず、熱的歪を
抑えることができる。Effects The present invention has the following effects due to the above configuration. In other words, the high-frequency and low-frequency paths are separated, and a feedback circuit using an operational amplifier is installed in the low-frequency path where thermal distortion occurs, so even if a voltage change occurs at the base or emitter, the feedback effect will prevent this change on the output side. No influence appears, and thermal distortion can be suppressed.
実施例
以下、本発明の実施例について図面を参照しながら説明
する。第1図は本発明の一実施例の構成を示すものであ
る。EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of an embodiment of the present invention.
第1図において、1,11は一対の入力端子、2゜10
は特性の等しい一対の演算増幅器、3,12は一対のレ
ベルシフト用ツェナーダイオードで、差動入力信号が演
算増幅器2.10の非反転入力およびツェナダイオード
3,120一端に印加される。In Figure 1, 1 and 11 are a pair of input terminals, 2゜10
are a pair of operational amplifiers with equal characteristics; 3 and 12 are a pair of level-shifting Zener diodes; a differential input signal is applied to the non-inverting input of the operational amplifier 2.10 and one end of the Zener diodes 3 and 120;
5.9は特性の等しい一対のトランジスタで、各演算増
幅器2,10の出力および反転入力がトランジスタ対5
,9のベースおよびエミッタに接続されている。 トラ
ンジスタ対5,9のエミッタはエミッタ結合抵抗器6を
介して接続され、かつ抵抗値の5へ一/
等しい抵抗器7,8を介して電圧源に接続されている。5.9 is a pair of transistors with equal characteristics, and the output and inverting input of each operational amplifier 2 and 10 are connected to the transistor pair 5.
, 9 are connected to the bases and emitters of . The emitters of the transistor pair 5, 9 are connected via an emitter-coupled resistor 6 and via resistors 7, 8 whose resistance value is equal to 1/5 to a voltage source.
15.16は高周波増幅として働く一対のトランジスタ
で、各エミッタにトランジスタ対5,9のコレクタが接
続され、直流バイアスが与えられる。トランジスタ対1
5.16のエミッタはコンデンサ14を介して接続され
、各ベースはツェナダイオード対3,120一方と電流
源対4,13に接続され、各コレクタはベース接地トラ
ンジスタ対17.18のエミッタに接続されている。ト
ランジスタ対17.18の各ベースはベースバイアス電
圧に接続され、各コレクタは負荷抵抗器21.22を介
して適当な電圧源に接続されている。19.20は出力
端子である。Reference numerals 15 and 16 designate a pair of transistors that function as high-frequency amplifiers, each emitter of which is connected to the collector of the transistor pair 5 and 9, and a DC bias is applied. transistor pair 1
The emitters of 5.16 are connected through a capacitor 14, the bases of each are connected to a Zener diode pair 3,120 on the other hand and a current source pair 4,13, and the collectors of each are connected to the emitters of a common base transistor pair 17.18. ing. The base of each transistor pair 17.18 is connected to a base bias voltage and the collector of each is connected via a load resistor 21.22 to a suitable voltage source. 19.20 are output terminals.
次に上記実施例の動作について説明する。Next, the operation of the above embodiment will be explained.
入力端子1,11への差動入力信号はレベルシフト用の
ツェナダイオード対3,12を介し、差動増幅器構成の
エミッタ接地トランジスタ対15 、16に印加される
。この増幅段はエミッタ間にコンデンサ14を介してい
るので、直流分がカットされ、高周波の差信号成分のみ
が増幅され、カスコード構成のベース接地トランジスタ
対17,1.8で伝送され、出力端子対19.20に高
周波の差動出力として得られる。一方、低周波成分は演
算増幅器対2、10の非反転入力に加わり、帰還作用に
よりトランジスタ対5,9のエミッタには入力信号と同
じ振幅の信号が再生され、エミッタ結合抵抗器6を介し
て低周波の差信号が増幅される。この信号はトランジス
タ15.17,16.18を介し、出力端子対19.2
0に低周波の差動出力として得られ、上記高周波成分と
重畳し、差動入力信号の増幅された信号として再生され
る。Differential input signals to input terminals 1 and 11 are applied to a pair of common emitter transistors 15 and 16 of a differential amplifier configuration via a pair of Zener diodes 3 and 12 for level shifting. Since this amplification stage has a capacitor 14 interposed between the emitters, the DC component is cut, and only the high frequency difference signal component is amplified and transmitted through a pair of common-base transistors 17 and 1.8 in a cascode configuration, and the output terminal pair is 19.20 is obtained as a high frequency differential output. On the other hand, the low frequency component is applied to the non-inverting inputs of the operational amplifier pair 2 and 10, and a signal with the same amplitude as the input signal is reproduced at the emitters of the transistor pair 5 and 9 due to the feedback effect, and is transmitted through the emitter-coupled resistor 6. The low frequency difference signal is amplified. This signal is passed through transistors 15.17 and 16.18 to output terminal pair 19.2.
0 as a low-frequency differential output, is superimposed on the high-frequency component, and is reproduced as an amplified signal of the differential input signal.
低周波経路に使用する演算増幅器2,1oは汎用性のも
ので十分であシ、ループ利得が十分高ければトランジス
タ対5,9の発熱差によるベース、エミッタ電圧の変化
はエミッタ側に発生せず、良好な増幅特性を示す。General-purpose operational amplifiers 2 and 1o used in the low frequency path are sufficient; if the loop gain is sufficiently high, changes in base and emitter voltages due to the difference in heat generation between the transistor pair 5 and 9 will not occur on the emitter side. , exhibiting good amplification characteristics.
このように、本実施例によれば、低周波、高周波成分を
別々に増幅し、総合的に安定した広帯域直流増幅器を構
成している。熱的歪を外部素子で補正することは際限が
なく、また調整面でも高度フ ペーゾ
なテクニックを必要とするが、上記構成の本発明によれ
ばこれを要することなく、熱的歪の問題を解消すること
ができる。In this manner, according to this embodiment, the low frequency and high frequency components are amplified separately, and a comprehensively stable broadband DC amplifier is constructed. There is no limit to how thermal distortion can be corrected using external elements, and advanced techniques are required in terms of adjustment, but the present invention with the above configuration eliminates the need for this and solves the problem of thermal distortion. It can be resolved.
発明の効果
以上述べたように本発明によれば、高周波および低周波
経路に分離構成し、熱的歪が発生する低周波経路に演算
増幅器による帰還回路を設けているので、ベース、エミ
ッタの電圧変化が生じても出力側では帰還作用によりこ
の影響が現われず、広帯域で熱的歪を抑えることができ
る。Effects of the Invention As described above, according to the present invention, the high frequency and low frequency paths are separated and a feedback circuit using an operational amplifier is provided in the low frequency path where thermal distortion occurs, so that the base and emitter voltages are reduced. Even if a change occurs, this effect does not appear on the output side due to the feedback effect, and thermal distortion can be suppressed over a wide band.
第1図は本発明の一実施例における広帯域直流増幅器を
示す回路図、第2図は従来の増幅器を示す回路図である
。
1.11・・・入力端子、 5.9.15.16.17
.18・・・トランジスタ、3.12・・・レベルシフ
ト用ツェナダイオード、4,13・・電流源、2.10
・・演算増幅器1、6・・・結合抵抗器、14・・・結
合コンデンサ、 7,8゜21、22・・・抵抗器。
代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図
+VI
第2図FIG. 1 is a circuit diagram showing a broadband DC amplifier according to an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional amplifier. 1.11...Input terminal, 5.9.15.16.17
.. 18...Transistor, 3.12...Zena diode for level shift, 4,13...Current source, 2.10
...Operation amplifiers 1, 6...Coupling resistor, 14...Coupling capacitor, 7,8°21, 22...Resistor. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure + VI Figure 2
Claims (1)
よびベース接地出力段を有する高周波信号路と、上記エ
ミッタ接地の直流バイアス供給手段であるトランジスタ
のベース、エミッタ間に演算増幅器による帰還回路を構
成した低周波信号路を備えたことを特徴とする広帯域直
流増幅器。A high frequency signal path having a cascode-connected capacitor-coupled emitter-grounded input stage and a base-grounded output stage, and a low-frequency signal path comprising a feedback circuit using an operational amplifier between the base and emitter of the transistor that is the emitter-grounded DC bias supply means. A wideband DC amplifier characterized by being equipped with.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62098949A JPH0695609B2 (en) | 1987-04-22 | 1987-04-22 | Wideband DC amplifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62098949A JPH0695609B2 (en) | 1987-04-22 | 1987-04-22 | Wideband DC amplifier |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS63263904A true JPS63263904A (en) | 1988-10-31 |
JPH0695609B2 JPH0695609B2 (en) | 1994-11-24 |
Family
ID=14233352
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62098949A Expired - Lifetime JPH0695609B2 (en) | 1987-04-22 | 1987-04-22 | Wideband DC amplifier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0695609B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013008339A1 (en) * | 2011-07-14 | 2013-01-17 | 富士通株式会社 | Differential amplifier circuit |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7071784B2 (en) * | 2002-11-29 | 2006-07-04 | Linear Technology Corporation | High linearity digital variable gain amplifier |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS593605U (en) * | 1982-06-28 | 1984-01-11 | 松下電器産業株式会社 | ferrite antenna coil |
-
1987
- 1987-04-22 JP JP62098949A patent/JPH0695609B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS593605U (en) * | 1982-06-28 | 1984-01-11 | 松下電器産業株式会社 | ferrite antenna coil |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2013008339A1 (en) * | 2011-07-14 | 2013-01-17 | 富士通株式会社 | Differential amplifier circuit |
JP5673824B2 (en) * | 2011-07-14 | 2015-02-18 | 富士通株式会社 | Differential amplifier circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH0695609B2 (en) | 1994-11-24 |
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