JPS63178542A - Isolation method of dielectric for semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the labor hour required for a dielectric isolation work and cost by continuously executing a removal process by the paper etching treatment of a damage layer formed in an isolation trench in an Si substrate and an insulating-layer forming process in the same furnace. CONSTITUTION:Reactive ion etching treatment is executed to the surface of an Si substrate to shape an isolation trench 31. A damage layer 35 is formed onto the inner surface of the isolation trench 31 at that time. The substrate 30 is inserted into a diffusion furnace, paper etching treatment is carried out in the diffusion furnace, and the layer 35 on the inner surface of the isolation trench 31 is removed. The substrate 30 is oxidized and treated in the diffusion furnace left as the substrate 30 is inserted. An insulating layer 32 is shaped onto the inner surface of the isolation trench 31 through the oxidation treatment. The inside of the isolation trench 31 in the substrate 30 is filled with poly Si, and each element region is isolated electrically. According to the method, the trench 31 is not contaminated by an etchant and an impurity, etc., thus reducing the labor hour required for dielectric isolation work and cost.

Description

Detailed Description of the Invention <Industrial Application Field> The present invention is directed to the dielectric of a semiconductor device, in which isolation grooves are formed in a silicon substrate by anisotropic etching, and each element region is electrically isolated by the isolation grooves. Concerning body separation method.

<Prior Art> Conventionally, in the manufacture of semiconductor devices, each element region formed on the surface of a silicon substrate is electrically isolated to prevent an undesirable relationship between adjacent elements. At the same time, efforts are being made to increase the degree of integration of devices.

As one of such methods for separating each element region, a method called dielectric isolation or trench isolation is known, which consists of various steps as shown in the process diagram of FIG. The semiconductor device is sequentially processed into the state shown in FIG. 3 in each step of this dielectric isolation method.

First, isolation grooves 31 as shown in FIG. 3(a) are formed on the surface of the silicon substrate 30 by etching in the isolation groove forming step. Next, by oxidation treatment in the insulating layer forming step, a third layer is formed on the inner surface of this isolation trench 31.
An insulating layer 32 as shown in Figure (c) is formed. Further, in a polysilicon filling step, the inside of this isolation trench 31 is filled with polysilicon 33 as shown in FIG. 3(d), and each element region is electrically isolated. In addition, the third
Reference numeral 34 in FIG. 3A indicates an oxide film formed on the silicon substrate 30 in advance.

By the way, since the shape of such separation groove 31 requires an anisotropic processing shape (see FIG. 3(a)), reactive ion etching (R) is used as the etching process.
The separation groove 31 must be formed using the IE) method. However, when forming the separation trench 31 by this RIE method, the inner surface of the separation trench 31 is damaged by accelerated ions, and a damaged layer 35 is formed on the inner surface.

Therefore, conventionally, a damaged layer removal process for removing the damaged layer 35 of the isolation groove 31 is set as a subsequent process of the isolation groove forming process using the RIE method. In this damaged layer removal step, the damaged layer 35 on the inner surface of the isolation groove 31 is removed by wet etching the silicon substrate 30 or by performing a wet etching treatment after a sacrificial oxidation treatment, and then the silicon substrate 30 is cleaned. , keep it dry. FIG. 3(b) is an explanatory diagram showing the separation groove 31 with the damaged layer 35 removed.

<Problems to be Solved by the Invention> By the way, the above dielectric separation method has the following problems. That is, in the damaged layer removal step, the damaged layer 34 is removed by wet etching or the like, so the damaged layer removal step and the next step, the insulating layer formation step, cannot be performed consecutively; Each step had to be performed as a separate step. Therefore, separating semiconductor devices using such a dielectric separation method is laborious and costly.

Furthermore, the process of removing the damaged layer by wet etching or the like itself has the following disadvantages. That is, since the separation groove 31 has minute dimensions, it is difficult for the etching solution or cleaning liquid to enter the inside of the separation groove 31.
It is difficult for the etching solution etc. that has spread inside the separation groove 31 to dry, and if the etching solution etc. remains inside the separation groove 31, impurities such as dust are easily absorbed by this etching solution and the separation groove 3 The inside of the plant is likely to become contaminated.

The present invention eliminates inconveniences such as isolation groove contamination in the conventional damaged layer removal process, and also aims to reduce work effort and cost by performing the damaged layer removal process and the insulating layer formation process in succession. The purpose of the present invention is to provide a dielectric isolation method for semiconductor devices that can be used to perform dielectric separation of semiconductor devices.

Means for Solving Problems> In order to achieve the above object, the present invention forms isolation grooves in a silicon substrate by anisotropic etching, and electrically connects each element region with the isolation grooves. In the dielectric isolation method for semiconductor devices, the method includes a step of removing a damaged layer formed on the inner surface of the isolation groove by the anisotropic etching treatment using a paper etching treatment, and forming an insulating layer on the inner surface of the isolation groove using an oxidation treatment. This method is characterized in that the steps of forming the .

<Operation> According to the above method, the damaged layer on the inner surface of the separation groove is removed by paper etching, so that the separation groove is not contaminated by etching solution or impurities. Moreover, since the oxidation treatment to form an insulating layer on the inner surface of the separation groove is performed continuously in the same furnace following the damaged layer removal process, the labor and cost required for the work are reduced compared to conventional methods. can be achieved.

<Example> Hereinafter, the dielectric separation method of the present invention will be explained in detail based on the example shown in the process diagram of FIG.

First, in the isolation groove forming step of the method of the present invention, reactive ion etching is performed on the surface of the silicon substrate 300 to form isolation grooves 3 as shown in FIG. 3(a).
1 is formed. At this time, the inner surface of the separation groove 31 is damaged by this reactive ion etching process, and a damaged layer 35 is formed on this inner surface.

Such a silicon substrate 30 is inserted into a diffusion furnace in the next step, which is a damage layer removal step, and is subjected to a vapor etching process in this diffusion furnace.

This vapor etching process is performed by supplying a chlorine-based gas such as hydrogen chloride into the interior of a diffusion furnace heated to approximately 1100°C. The damaged layer 35 on the inner surface is removed.

Next, an oxygen-based gas such as oxygen or water vapor is supplied instead of the chlorine-based gas into the diffusion furnace in which the silicon substrate 30 is still inserted, and the silicon substrate 30 is subjected to oxidation treatment using the oxygen-based gas. administered.

By this oxidation treatment, an insulating layer 32 as shown in FIG. 3(c) is formed on the inner surface of the isolation trench 31.

Polysilicon is then filled into the isolation groove 31 of the silicon substrate 30 which is taken out of the diffusion furnace and sent to a polysilicon filling process, and each element region formed on the silicon substrate 30 is electrically isolated. .

By the way, plasma etching equipment used in conventional dielectric separation methods can only process about 10 silicon substrates at a time, and the same applies to cleaning equipment. However, in the damaged layer removal step of the method of the present invention described above, that is, the vapor etching treatment, about 100 silicon substrates can be inserted into the diffusion furnace, so the processing efficiency can be greatly improved. become.

<Effects of the Invention> As described above, according to the method of the present invention, the damaged layer formed in the isolation groove of the silicon substrate is removed in the damaged layer removal step using vapor etching treatment, so that the next step is performed following this damaged layer removal step. The insulating layer forming step can be performed continuously in the same furnace. Moreover, the vapor etching process prevents the separation groove from being contaminated by etching solution or impurities. Therefore, there is an effect that the effort and cost required for dielectric separation work of semiconductor devices can be reduced.

[Brief explanation of the drawing]

The first part is a process explanatory diagram showing an example of the method of the present invention,
FIG. 2 is a process explanatory diagram showing a conventional example. Moreover, FIGS. 3(a) to 3(d) are explanatory diagrams showing the state of the minute R grooves in each step, respectively. 30...Silicon substrate, 31...Isolation groove, 32...Insulating layer, 35...Damaged layer.

Claims (1)

[Claims] (1) In a dielectric isolation method for a semiconductor device, in which a separation groove is formed in a silicon substrate by an anisotropic etching process, and each element region is electrically isolated by the separation groove, the separation is performed by the anisotropic etching process. A semiconductor characterized in that a step of removing a damaged layer formed on the inner surface of a groove by vapor etching treatment and a step of forming an insulating layer on the inner surface of the isolation groove by oxidation treatment are performed consecutively in the same furnace. Dielectric isolation method for devices.