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JPS63175945A - Debugging method for program - Google Patents

Debugging method for program

Info

Publication number
JPS63175945A
JPS63175945A JP62008413A JP841387A JPS63175945A JP S63175945 A JPS63175945 A JP S63175945A JP 62008413 A JP62008413 A JP 62008413A JP 841387 A JP841387 A JP 841387A JP S63175945 A JPS63175945 A JP S63175945A
Authority
JP
Japan
Prior art keywords
program
debugged
debugging
address
contents
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62008413A
Other languages
Japanese (ja)
Inventor
Masashi Ikegami
池上 正志
Hiroshi Kutsuyama
沓山 弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP62008413A priority Critical patent/JPS63175945A/en
Publication of JPS63175945A publication Critical patent/JPS63175945A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To shorten a debugging processing by counting the number for calling a debugging program and executing a program to be debugged from the next address of a prescribed address subsequently to stored contents without executing the debugging program when the called number does not coincide with the inputted number. CONSTITUTION:The contents of the prescribed address inputted by the input means 1 of the program to be debugged are stored in a holding means 12, an instruction for calling the debugging program is written in the address, the called number of the debugging program according to the execution of the program to be debugged is counted by a counting means 11, when the called number does not coincide with the inputted number, the debugging program is not executed but the program to be debugged is executed from the next address of the prescribed address subsequently to the contents stored in the holding means 12. Thereby, the execution of the program to be debugged is not interrupted at the contents of a register or a memory at the prescribed position of the program are grasped to continue the debugging processing.

Description

【発明の詳細な説明】 イ)産業上の利用分野 不発811はコンピュータ開発支援システムとしての1
0グラムのデバッグ方法に関するものである。
Detailed Description of the Invention A) Industrial application field Misfire 811 is 1 as a computer development support system.
This article relates to a 0gram debugging method.

口】従来の技術 従来、プログラムのデバッグは、被デバツグプログラム
を実行させ、所望の箇所で停止し、その4の所定のレジ
スタるるいはメモリの内容’igみ出して、その内容を
みることで進められていた(例えば脣開1m55−15
4636号公報参照ン。
[Background Art] Conventionally, debugging a program involves running the program to be debugged, stopping at a desired point, extracting the contents of a specified register or memory, and looking at the contents. (For example, the opening of the neck was 1m55-15
See Publication No. 4636.

ところで−りのプログラム(ルーをンフを複数回実行し
、める所定回数このグログラムを実行させたときの所定
レジスタるるい鉱メそりの6谷をみてデバッグ処mt進
める場合、この被デバツグプログラムの所定箇所にブレ
ークポイントを設定し、被デバツグプログラムを実行さ
せその停止回数を操作者が数え、更に所定の回数になる
まで停止しtプログラムを復帰させる必要ありた。
By the way, if you want to proceed with the debugging process by looking at the 6 valleys of the specified register Rurui Mesori when this program is executed a specified number of times, this debugged program It was necessary for the operator to set a breakpoint at a predetermined location in the debugged program, run the program to be debugged, count the number of times the debugged program was stopped, stop the program until the predetermined number of times was reached, and then return the program.

ハ)発明が解決しエフとする問題点 操作者にとうて、プログラムの停止回数を所定数かぞえ
たり、停止し友プログラムを復帰させるのは大変煩わし
い作業であり、またグログラムがいちいち中断するので
、他のプログラムに悪影響t&はし的確なデバッグがさ
nなρ為り之り、更にデバッグ処理に量大な時間を必要
としてい比ゆ本発明は斯様な点にfti与て為されたち
ので、被デバツグプログラムの実行を中4させることな
く、所定回叙ダログラムが実行さn、そのグログラムノ
所定v!Bffrでのレジスタfメモリの内容の把握を
してデバッグ処理が通りらnるデバッグ万ff1t−提
供するものでるる。
C) Problems that the invention solves and F For the operator, it is a very troublesome task to count the number of times a program has stopped, or to restart a friend program after stopping it, and the program is interrupted every time. This will have a negative impact on other programs and will not allow for accurate debugging, and will also require a large amount of time for debugging. , a given iterative darogram is executed without interrupting the execution of the program to be debugged, n, and the given program v! It provides debugging information that allows the debugging process to be completed by grasping the contents of the register f memory in Bffr.

二】間一点t−S決する九めの手段 零り明は被デバツグプログラムの所定アドレスと回数を
入力する入力手段と、被デバッググログラ^O人力手設
にて入力さn友所定アドレスの内’4t−退避させて2
く保持手段と、デバッグプログラムが呼び出さ几た回数
をカウントする計数手段とt″備え、被デバツグプログ
ラムの前記入力手段にて人力さrt7を所定アドレスの
内容を保持手段に格納すると共に、七のアドレスにデバ
ッググログラムを呼び出す命令に一、iFさ込み、仮デ
バッグプログラムの実行によるデバッグプログラムの呼
び出された回数を計数手段にてカウントし、前記入力手
段にて人力ざ几た1叙と紬叙しないFIFPは、デバツ
グプログラムを実行せずに、保持手段に格納名nた内容
に引さ@さwa記所定アドレスの次のアドレスカムう被
デバツグプログラムを実行するプログラムのデバッグ方
法でめる。
2] The ninth means for determining the time interval is an input means for inputting the predetermined address of the program to be debugged and the number of times, and input means for manually setting the predetermined address of the program to be debugged. Inside'4t - evacuate 2
and a counting means for counting the number of times the debug program has been called. An iF is inserted into the instruction to call the debug program at the address, and the counting means counts the number of times the debug program is called by executing the temporary debug program. FIFPs that do not execute the debugging program do not execute the debugging program, but instead refer to the contents stored in the holding means at the address next to the specified address. .

ホ)作  用 計数手段にて、入力された回数がカウントさnる衷で被
デバツググログラムは中継することなく複数回実行さn
、入力された回数と同じ回数だけ仮デバッグプログラム
が実行さnると、その時、被デバツグプログラムの入力
さfL7Hアドレスの所定箇所でデバッグプログラムの
実行がさ几て、デバッグ処理を進めらnる。
e) While the number of inputs is counted by the action counting means, the debugged program is executed multiple times without relaying.
, when the temporary debug program is executed the same number of times as the number of inputs, the execution of the debug program is stopped at the predetermined location of the input fL7H address of the program to be debugged, and the debugging process proceeds. .

へ)実 施例 (IJは入力手段としての11?−ボードでI10イン
タフェース(2Jを介してI[I御回路(3)に接続さ
nている。(4)は出力手数としてのC1(Tで、制御
回路(3)とともにCI(Tコントローラ(5)にて表
示11g4される。(6)は被デバツググログラムが格
納さnている#Ilメモリ、(7)は被デバツググログ
ラムの実行のための補助11tlJg1回路、(8)は
制御回路(3)’(D制御用プログラム及びデバッググ
ログラムが記憶さ几ている第2メモリ、(9J(1(I
はキーボード(1)が人力され比所定アドレス及び@J
数を格納する第1、第2レジスタ、uIJはデバッググ
ログラムが呼び出された回数をカウントするカウンタ、
C4は今一ボード(υから入力さn友PJt冗アドレス
O内容を保持するための退避Vジスタでるる。
to) Example (IJ is connected to the I[I control circuit (3) via the I10 interface (2J) on the 11?-board as an input means. (4) is the C1 (T 11g4 is displayed together with the control circuit (3) in the CI (T controller (5)). (6) is the #Il memory in which the debugged program is stored, and (7) is the debugged program. An auxiliary 11tlJg1 circuit (8) is a control circuit (3)'(D a second memory in which a control program and a debug program are stored, (9J(1(I)
The keyboard (1) is input manually and the specified address and @J
The first and second registers store numbers, uIJ is a counter that counts the number of times the debug program is called,
C4 is a save V register for holding the contents of the PJt redundant address inputted from the current board (υ).

斯様なtc置にりさ、42図及び第3図の70−tヤー
ドを参照しつつ説明する。尚、第1メモリ(6)にるる
被デバツグプログラムは後−のアドレスAのi!r後で
ループ状に実行さnるものである。
Such a tc position will be explained with reference to FIG. 42 and 70-t yard in FIG. Note that the program to be debugged stored in the first memory (6) is i! of address A at the end. It is executed in a loop after r.

まず第1メモリ(6Jに被デバツグプログラムを用意し
た後、牛−ボード(υから、デバッグに適当な被デバツ
グプログラムの所定アドレスAと、被デバツグプログラ
ムの実行が何回されたとさにデパック処理を進めるかそ
の回数nを入力する。入力さ几之所廻アドレスAと回数
nは大々第ルジスタ<9)、d2レジスタQlに格納”
ざnる(81)。劃Ijl t!21 jli+3 (
3Jは第1メ七す(6J円の被デバツグプログラムの第
ルジスタ(9]に指示さルるアドレスAの内容t:A避
レジしタ四に保持し、更に411/ジスタ(91にtt
i不さnろアトvxho円容をデバッググログラムC呼
び出す命令(CALL  j)IjG)に醤8換えるC
82)。そして+Vt+御回路(3)は被デバッグプロ
グラム倉デバッグすべく補5aute回路(7)に41
メモリ(6)内へ彼デバッグプログラムの大行ヲさせる
(、$3ン。
First, after preparing the program to be debugged in the first memory (6J), from the board (υ), the specified address A of the program to be debugged suitable for debugging and the number of times the program to be debugged has been executed. Input whether to proceed with the depacking process or the number of times n.The input address A and the number of times n are stored in the d2 register Ql.
Zanru (81).劃Ijl t! 21 jli+3 (
3J holds the contents of address A specified in the first register (9) of the debugged program of 6J yen in t:A save register 4, and further stores 411/register (tt in 91).
Replace the command (CALL j)IjG) to call debug program
82). The +Vt+ control circuit (3) is connected to the auxiliary 5aute circuit (7) to debug the program to be debugged.
It causes the debug program to run in memory (6) ($3).

さて、第ルジスタ(9)に示さnるアドレスAの内容が
メ行ざnるとデバッグプログラムが呼びだ葛nる(84
)。ここで制御回路(3)は、カウンタ(111Vcよ
りデバッグプログラムの呼び出し回数をカウントして2
り、1IE2レジスタに格納ざnている回数nとカワン
タaDo埴を比較するUS>。両$o<直が一致しない
時は、制御回路(3)は第ルジスタで示さnる被デバツ
グプログラムのアドレスAに退避レジスタ0に保持さn
ている内容を書き込み、帛2メモリ(8)円のデバッグ
プログラムを実行せずに再びアドレスAから補助!I制
御回路(7)に仮デバッグプログラムの実行を続Cすさ
せる(S6]。
Now, when the contents of address A shown in register (9) are not processed, the debug program is called (84).
). Here, the control circuit (3) counts the number of times the debug program is called from a counter (111Vc) and
Compare the number of times n stored in the 1IE2 register with the number of times n is stored in the 1IE2 register. When the two values do not match, the control circuit (3) saves n to the address A of the program to be debugged indicated by the register n and stores it in the save register 0.
Write the contents of the file and retry from address A without running the debug program in the memory (8) circle! The I control circuit (7) is caused to continue executing the temporary debug program (S6).

両者の値が一致するならば、!II@1回路(37はそ
のままデバッグプログラムを実行しく87)、所定のレ
ジスタやメモリの内容t−CRT (43に出力したり
、その他の図示しないメモリ値域に記憶させる等の処理
を行う。
If both values match, then! The II@1 circuit (37 executes the debug program as is) performs processing such as outputting the contents of predetermined registers and memory to t-CRT (43) and storing them in other memory ranges (not shown).

デバッグプログラムの実行が終了しtのち、制御回路(
37は、補助!lJ御回路(71に遅避しジスタロの内
8を実行させ、続いて被デバツグプログラムのアドレス
Aの久のアドレスへと再び被デバツグプログラムの実行
をさせる(S8〕。
After the execution of the debug program is finished, the control circuit (
37 is assistance! The lJ control circuit (71) is delayed and executes 8 of the registers, and then the program to be debugged is executed again at the address after address A of the program to be debugged (S8).

而して、被デバツグプログラムが複数回実行さnるとき
、複数回の実行のうち何回目と何回目の実行時の所定レ
ジスタやメモリの内容が知りたいときには、その回数を
予め中−ボードから入力しておくことで、被デバツグプ
ログラムの実行を途中で停止することなく、所望日数実
行された時点でQ所定レジスタfメモリの内容を刈るこ
とがり能となる。
Therefore, when the program to be debugged is executed multiple times, if you want to know the contents of a specified register or memory at the time of the multiple executions, you can check the number of times in advance. By inputting from , it becomes possible to reap the contents of the Q predetermined register f memory after the debugged program has been executed for the desired number of days without stopping the execution of the program to be debugged.

ト)発明の効果 本発明は以上の説明から明らかな如く、所定回数被デパ
ンダプログラムt−実行させた時のデバッグが、−回一
回仮デバッグプログラムを中断させることもなく、ま几
その回数を操作者が数えることもなべ、可能となる。こ
のため、操作者が停止し几被デバッグプログラムtoL
eさせるといった煩わしさもなくなり、デバッグ処理の
時間の短縮化がさnる。また、被デバツグプログラムの
中断による他のプログラムへの影響も発生せず、的確な
デバッグ処理が可能となる。
g) Effects of the Invention As is clear from the above description, the present invention allows debugging when the depandered program t is executed a predetermined number of times without interrupting the temporary debugging program once. It is also possible for the operator to count the number of pans. For this reason, the operator must stop the debug program toL.
This eliminates the hassle of having to do e-copying, and the time required for debugging can be shortened. Furthermore, interruption of the program to be debugged does not affect other programs, making it possible to perform accurate debugging.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明方法に係る装置の概4構成図、第2図及
び帛3図はフローチャートである。 (1)・・・キーボード(入力手段]、(3)・・・制
御@路、(4)・・・CRT、(57・・・41メモリ
(被デバツグプログラム〕、(7)・・・補助制御回路
、(8)−ji2メモリ(デバッグプログラム)、(9
7・・・ml L/9スタ、α嶋・・・第2レジスタ、
a]J・・・カクンタ(#を数手段)、α4・・・退避
レジスタ(保持手段〉。
FIG. 1 is a general configuration diagram of an apparatus according to the method of the present invention, and FIGS. 2 and 3 are flowcharts. (1)...keyboard (input means), (3)...control@path, (4)...CRT, (57...41 memory (program to be debugged)), (7)... Auxiliary control circuit, (8)-ji2 memory (debug program), (9
7...ml L/9 star, αjima...2nd register,
a] J...Kakunta (# means several), α4... Save register (holding means).

Claims (1)

【特許請求の範囲】[Claims] 1)被デバツグプログラムの所定アドレスと回数を入力
する入力手段と、被デバツグプログラムの入力手段にて
入力された所定アドレスの内容を退避させておく保持手
段と、デバツグプログラムが呼び出された回数をカウン
トする計数手段とを備え、被デバツグプログラムの前記
入力手段にて入力された所定アドレスの内容を保持手段
に格納すると共に、そのアドレスにデバツグプログラム
を呼び出す命令を書き込み、被デバツグプログラムの実
行によるデバツグプログラムの呼び出された回数を計数
手段にてカウントし、前記入力手段にて入力された回数
と一致しない時は、デバツグプログラムを実行せずに、
保持手段に格納された内容に引き続き前記所定アドレス
の次のアドレスから被デバツグプログラムを実行するこ
とを特徴とするプログラムのデバツグ方法。
1) An input means for inputting a predetermined address and number of times of the debugged program, a holding means for saving the contents of the predetermined address inputted by the input means of the debugged program, and a debugging program called up. and a counting means for counting the number of times the program to be debugged is stored in the holding means at a predetermined address inputted by the input means, and also writes an instruction to call the debugging program to the address. A counting means counts the number of times the debugging program is called by executing the program, and if the number does not match the number inputted by the inputting means, the debugging program is not executed and
1. A method for debugging a program, characterized in that the program to be debugged is executed from an address next to the predetermined address following the contents stored in the holding means.
JP62008413A 1987-01-16 1987-01-16 Debugging method for program Pending JPS63175945A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62008413A JPS63175945A (en) 1987-01-16 1987-01-16 Debugging method for program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62008413A JPS63175945A (en) 1987-01-16 1987-01-16 Debugging method for program

Publications (1)

Publication Number Publication Date
JPS63175945A true JPS63175945A (en) 1988-07-20

Family

ID=11692455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62008413A Pending JPS63175945A (en) 1987-01-16 1987-01-16 Debugging method for program

Country Status (1)

Country Link
JP (1) JPS63175945A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009506407A (en) * 2005-08-08 2009-02-12 ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング Computer system control method and control apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009506407A (en) * 2005-08-08 2009-02-12 ローベルト ボツシユ ゲゼルシヤフト ミツト ベシユレンクテル ハフツング Computer system control method and control apparatus
US8219796B2 (en) 2005-08-08 2012-07-10 Robert Bosch Gmbh Method and device for controlling a computer system

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