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JPS6249998B2 - - Google Patents

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Publication number
JPS6249998B2
JPS6249998B2 JP54142520A JP14252079A JPS6249998B2 JP S6249998 B2 JPS6249998 B2 JP S6249998B2 JP 54142520 A JP54142520 A JP 54142520A JP 14252079 A JP14252079 A JP 14252079A JP S6249998 B2 JPS6249998 B2 JP S6249998B2
Authority
JP
Japan
Prior art keywords
layer
groove
grooves
ohmic metal
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54142520A
Other languages
Japanese (ja)
Other versions
JPS5666085A (en
Inventor
Yasuo Shinohara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14252079A priority Critical patent/JPS5666085A/en
Publication of JPS5666085A publication Critical patent/JPS5666085A/en
Publication of JPS6249998B2 publication Critical patent/JPS6249998B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/0201Separation of the wafer into individual elements, e.g. by dicing, cleaving, etching or directly during growth
    • H01S5/0202Cleaving
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/1053Comprising an active region having a varying composition or cross-section in a specific direction
    • H01S5/1064Comprising an active region having a varying composition or cross-section in a specific direction varying width along the optical axis
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 本発明は半導体レーザー素子の製造方法に関す
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor laser device.

近年光通信は信頼性も向上し実用化に向つて急
速に歩み始めた。そこで半導体レーザー等の光素
子の安定した大量供給が必要になつてきた。半導
体レーザーの量産化にとつて最も問題となつてい
るものの一つにチツプに分割する方法の問題があ
る。
In recent years, optical communications have improved in reliability and are rapidly moving toward practical application. Therefore, a stable, large-scale supply of optical devices such as semiconductor lasers has become necessary. One of the biggest problems in the mass production of semiconductor lasers is the method of dividing them into chips.

従来半導体レーザーをチツプに分割する場合に
は次のような方法が行われていた。即ち、拡散・
メタライズを施こされたウエーハは安全カミソリ
の先等の鋭利なものを用いて細長い幅200〜300μ
mのバーに劈開され、これをさらに安全カミソリ
等によつて一つ一つのチツプに分割する方法で行
なわれていた。この方法は非常な熟練を必要と
し、しかも得られたチツプの形状が一定にならな
い等の理由で量産向きの方法とはいえない。一方
チツプに分割する際に活性層を横切つて切断する
と、活性層の部分にクラツクが生じることがあ
る。このようにしてクラツクの生じたチツプは動
作中に突然の劣化を起すことが多く、半導体レー
ザー素子の信頼性を悪くしている。又オーミツク
金属を含めて劈開する場合はアロイの歪によつて
劈開線がすぐに曲つてしまう場合があり、チツプ
に分割する際の歩留りを落とす原因となつてい
る。
Conventionally, when dividing a semiconductor laser into chips, the following method was used. In other words, diffusion
The metallized wafer is cut into a thin strip with a width of 200 to 300μ using a sharp object such as the tip of a safety razor.
The method used was to cleave the material into 50 m bars, which were then further divided into individual chips using a safety razor or the like. This method requires great skill and is not suitable for mass production because the shape of the chips obtained is not uniform. On the other hand, if the active layer is cut across when dividing into chips, cracks may occur in the active layer. Chips with cracks in this manner often undergo sudden deterioration during operation, impairing the reliability of semiconductor laser devices. Furthermore, when cleavage is performed to include ohmic metals, the cleavage line may easily bend due to distortion of the alloy, which causes a drop in yield when dividing into chips.

本発明の目的は高い信頼性を持ち特殊な熟練技
能を要さずに安定に生産出来る半導体レーザー素
子の製造方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a semiconductor laser element that has high reliability and can be stably produced without requiring special skills.

本発明によれば、半導体基板の一主表面上に、
活性層を含む複数のエピタキシヤル層を形成した
後前記エピタキシヤル層の最上層上にオーミツク
金属層を被着してウエーハを準備する工程と、所
定方向に所定間隔を有して互いに平行な複数の第
1の溝及び前記第1の溝と直交し前記第1の溝で
挟まれた中央部で欠落した部分を有し所定間隔を
有して互いに平行な複数の第2の溝を備えたマス
クを前記ウエーハのオーミツク金属層上に形成す
る工程と、前記マスクを用いて前記活性層より深
くまで前記第1の溝及び第2の溝にそれぞれ対応
する溝を形成する工程と、前記第2の溝に対応す
る溝に沿つて前記ウエーハを劈開する工程とを含
んでなることを特徴とする半導体レーザー素子の
製造方法が得られる。
According to the present invention, on one main surface of a semiconductor substrate,
preparing a wafer by forming a plurality of epitaxial layers including an active layer and then depositing an ohmic metal layer on top of the epitaxial layers; a first groove, and a plurality of second grooves that are perpendicular to the first groove and have a missing part in the center sandwiched by the first groove, and are parallel to each other at predetermined intervals. forming a mask on the ohmic metal layer of the wafer; forming grooves deeper than the active layer using the mask, corresponding to the first groove and the second groove, respectively; There is obtained a method for manufacturing a semiconductor laser device, comprising the step of cleaving the wafer along a groove corresponding to the groove.

次に本発明の実施例を図面を参照して詳細に説
明する。
Next, embodiments of the present invention will be described in detail with reference to the drawings.

第1図は本発明の一実施例を説明するための半
導体レーザーチツプの斜視図である。
FIG. 1 is a perspective view of a semiconductor laser chip for explaining one embodiment of the present invention.

まず、一般に行なわれているように(100)面
を主表面として有するGas基板1上に
AlxGa1-xAs層2、AlyGa1-yAs層3、AlxGa1-xAs
4、Gas層5を順次エピタキシヤル成長してウ
エーハを準備する。
First, as is generally done, a G a A s substrate 1 having a (100) plane as the main surface is
A wafer is prepared by sequentially epitaxially growing Al x G a1-x A s layer 2, Al y G a1-y A s layer 3, Al x G a1-x A s layer 4, and Ga A s layer 5. .

次に、このウエーハのGas層5の表面からG
as層5と導電型を異にする所定の不純物を選択
拡散させて(110)方向に延びたストライプ状の
不純物拡散層6を互いに平行に複数個形成する。
次に真空蒸着等によりオーミツク金属層7を形成
する。フオトレジスト膜を被着したのち選択的に
除去して不純物拡散層6と平行な第1の溝10及
びこれと直交する第2の溝9を形成し第2図に示
すような格子の一部が欠けているような溝パター
ンを有するマスクを形成する。ここで格子が一部
欠けた部分8は前述の選択拡散により形成した不
純物拡散層6に一致させなければならない。この
ようなパターンを有するフオトレジスト膜からな
るマスクを用いて、オーミツク金属層7をエツチ
ング、イオンミリング等の手法により取り去る。
この時不純物拡散層6上のオーミツク金属7は取
り去られずに残る。次にこのオーミツク金属7を
取り去つた部分の結晶をエツチングし結晶に格子
状の溝(前述のフオトレジスト膜の第1の溝1
0、第2の溝9に対応した溝)を形成する。この
溝は結晶の第4層Gas層5から第3層の
AlxGa1-xAs層及び第2層のAlyGa1-yAs層3をつき
抜けて第1層のAlxGa1-xAs層2に達する深さに形
成される。この時不純物拡散層6の部分の結晶は
エツチングされずに残る。このようにして格子状
の溝を形成した後にきれぎれの溝9のほぼ中央部
に沿つて劈開し、劈開バーを形成する。このよう
にして劈開バーを形成すると一定の間隔でパター
ニングが施された溝が掘られているので活性領域
の長さによる特性のバラツキが減り特性の揃つた
半導体レーザーが得られる。この劈開バーに端面
劣化を抑えるパツシベーシヨン膜等を施した後も
う一つの溝10に沿つて切り離し一つ一つのチツ
プとする。ここで得られた半導体レーザーは長さ
も幅も揃つた一定の形状を持つたものとなる。し
かもレーザー光11の出射部分12以外の素子の
周辺部分は活性層3をつき抜けてエツチングされ
ているため、ペレツタイズに伴つてクラツクが生
じこれにより動作中に急速劣化を起すこともなく
なる。
Next, G is removed from the surface of the G a A s layer 5 of this wafer.
A predetermined impurity having a conductivity type different from that of the a As layer 5 is selectively diffused to form a plurality of striped impurity diffusion layers 6 extending in the (110) direction and parallel to each other.
Next, an ohmic metal layer 7 is formed by vacuum evaporation or the like. A photoresist film is deposited and then selectively removed to form a first groove 10 parallel to the impurity diffusion layer 6 and a second groove 9 perpendicular thereto, forming part of a lattice as shown in FIG. A mask is formed that has a groove pattern that is missing. Here, the portion 8 where the lattice is partially missing must match the impurity diffusion layer 6 formed by the selective diffusion described above. Using a mask made of a photoresist film having such a pattern, the ohmic metal layer 7 is removed by a technique such as etching or ion milling.
At this time, the ohmic metal 7 on the impurity diffusion layer 6 remains without being removed. Next, the portion of the crystal from which the ohmic metal 7 has been removed is etched to create lattice-like grooves (the first grooves 1 of the photoresist film described above) in the crystal.
0, a groove corresponding to the second groove 9) is formed. This groove extends from the fourth layer G a A s layer 5 of the crystal to the third layer G a
Formed to a depth that penetrates the Al x G a1-x A s layer and the second Al y G a1-y A s layer 3 to reach the first Al x G a1-x A s layer 2. . At this time, the crystal in the impurity diffusion layer 6 remains without being etched. After forming the lattice-like grooves in this manner, the grooves 9 are cleaved along approximately the center of the grooves 9 to form cleavage bars. When the cleavage bar is formed in this manner, patterned grooves are dug at regular intervals, so variations in characteristics due to the length of the active region are reduced, and a semiconductor laser with uniform characteristics can be obtained. After a passivation film or the like is applied to this cleavage bar to suppress end face deterioration, it is cut out along another groove 10 to form individual chips. The semiconductor laser obtained here has a constant shape with uniform length and width. Furthermore, since the peripheral portion of the device other than the emitting portion 12 of the laser beam 11 is etched through the active layer 3, cracks that occur due to pelletization and rapid deterioration during operation are no longer caused.

以上は半導体レーザーチツプの活性領域側の表
面に関してであるが、基板1側のオーミツク金属
を素子チツプの周辺部で取り去ることもペレツト
化を再現性よく行うには有効な手段となる。基板
側のオーミツク金属形成は活性領域側の加工が終
了し、ウエーハ全体の厚みを70〜100μm程度の
厚みに減らした後に行われる。第3図は基板側の
オーミツク金属上にフオトレジストにより形成さ
れる格子状パターン13である。この格子状パタ
ーンは活性領域側のパターンと格子の位置を一致
させて形成される。この格子状パターン13にオ
ーミツク金属をエツチングすると、活性領域側の
エツチング溝9,10と相対する同一の位置のオ
ーミツク金属が取り去られる。このようにチツプ
に分割する際に切り離される部分の金属を取り去
つておくとチツプに分割する時の再現性がよくな
り歩留りが向上する。
Although the above description concerns the surface of the semiconductor laser chip on the active region side, removing the ohmic metal on the substrate 1 side at the periphery of the device chip is also an effective means for pelletizing with good reproducibility. Ohmic metal formation on the substrate side is performed after processing on the active region side is completed and the total thickness of the wafer is reduced to about 70 to 100 μm. FIG. 3 shows a grid pattern 13 formed by photoresist on the ohmic metal on the substrate side. This lattice pattern is formed by matching the position of the pattern on the active region side with the lattice. When ohmic metal is etched into this grid pattern 13, the ohmic metal at the same position facing the etching grooves 9 and 10 on the active region side is removed. In this way, by removing the metal from the parts to be separated when dividing into chips, the reproducibility when dividing into chips is improved and the yield is improved.

この実施例では結晶に掘る溝の深さを活性層を
つき抜けて第1層中間までとしたが、さらに深く
エピタキシヤル層をつき抜けて基板に達してしま
つても同様の効果が得られることは明らかであ
る。
In this example, the depth of the groove dug into the crystal was set to penetrate through the active layer and reach the middle of the first layer, but the same effect can be obtained even if it penetrates deeper through the epitaxial layer and reaches the substrate. is clear.

以上のように活性領域側の結晶に活性層をつき
抜ける溝を掘り、更に要すれば基板側のオーミツ
ク金属をこの溝と一致させて格子状に取り去るこ
とにより半導体レーザーをチツプに分割する作業
が容易に再現性よく出来る。又得られたチツプは
形状一定のものとなり後の組立工程に非常に都合
よくなる。一方チツプに分割する際に活性層を横
切つて割ることがなくなるので、活性領域に影響
するクラツクの発生がなくなり信頼性が向上す
る。
As described above, the semiconductor laser can be divided into chips by digging a groove in the crystal on the active region side that passes through the active layer, and if necessary, removing the ohmic metal on the substrate side in a lattice pattern in line with the groove. Easy and reproducible. Moreover, the obtained chips have a constant shape, which is very convenient for the subsequent assembly process. On the other hand, since the active layer is not split across the chip when it is divided into chips, there is no occurrence of cracks that affect the active region, and reliability is improved.

一方長波長発光素子として知られているIoa
sP/IoP系の素子は実施例のAlGaAs/Gas
系の素子より傷の入りやすい性質を持つているの
で、本発明の効果がより顕著で現われることは明
らかである。
On the other hand, I o Ga, which is known as a long wavelength light emitting element,
The A s P/I o P system element is AlG a A s /G a A s in the example.
It is clear that the effects of the present invention are more pronounced because the elements are more susceptible to scratches than other elements.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を説明するための半
導体レーザーチツプの斜視図、第2図は活性領域
側でオーミツク金属を取り去りエツチング溝を掘
るための溝パターンを示す平面図、第3図は基板
側のオーミツク金属を取り去るための溝パターン
の平面図である。 1…基板、2…第1層AlxGa1-xAs層、3…第2
層AlyGa1-yAs層、4…第3層AlxGa1-xAs層、5…
第4層Gas層、6…不純物選択拡散層、7…活
性領域側のオーミツク金属、11…レーザー光、
12…レーザー光出射部分、8…レーザー光出射
部分がエツチングされないようにするための格子
状パターンの一部欠けた部分、9…活性領域と直
交するきれぎれの第2の溝、10…活性領域と平
行な連続した第1の溝、13…互に直交する連続
した格子状パターン。
FIG. 1 is a perspective view of a semiconductor laser chip for explaining one embodiment of the present invention, FIG. 2 is a plan view showing a groove pattern for removing ohmic metal on the active region side and digging an etching groove, and FIG. 3 1 is a plan view of a groove pattern for removing ohmic metal from the substrate side. 1...Substrate, 2...First layer Al x G a1-x A s layer, 3... Second layer
Layer Al y G a1-y A s layer, 4...Third layer Al x G a1-x A s layer, 5...
4th layer Ga As layer, 6... Impurity selective diffusion layer, 7... Ohmic metal on active region side, 11... Laser light,
DESCRIPTION OF SYMBOLS 12... Laser light emitting part, 8... Partially missing part of the lattice pattern to prevent the laser light emitting part from being etched, 9... Discrete second groove perpendicular to the active region, 10... Active region continuous first grooves parallel to 13...continuous lattice patterns orthogonal to each other;

Claims (1)

【特許請求の範囲】[Claims] 1 半導体基板の一主表面上に、活性層を含む複
数のエピタキシヤル層を形成した後前記エピタキ
シヤル層の最上層上にオーミツク金属層を被着し
てウエーハを準備する工程と、所定方向に所定間
隔を有して互いに平行な複数の第1の溝及び前記
第1の溝と直交し前記第1の溝で挟まれた中央部
で欠落した部分を有し所定間隔を有して互いに平
行な複数の第2の溝を備えたマスクを前記ウエー
ハのオーミツク金属層上に形成する工程と、前記
マスクを用いて前記活性層より深くまで前記第1
の溝及び第2の溝にそれぞれ対応する溝を形成す
る工程と、前記第2の溝に対応する溝に沿つて前
記ウエーハを劈開する工程とを含んでなることを
特徴とする半導体レーザー素子の製造方法。
1. Preparing a wafer by forming a plurality of epitaxial layers including an active layer on one main surface of a semiconductor substrate and then depositing an ohmic metal layer on the top layer of the epitaxial layers; a plurality of first grooves that are parallel to each other with a predetermined interval; and a plurality of first grooves that are perpendicular to the first groove and have a missing part in the center sandwiched between the first grooves, and are parallel to each other and have a predetermined interval. forming a mask having a plurality of second grooves on the ohmic metal layer of the wafer; and using the mask to form the first grooves deeper than the active layer.
and a step of forming grooves corresponding to the second groove, respectively, and cleaving the wafer along the groove corresponding to the second groove. Production method.
JP14252079A 1979-11-02 1979-11-02 Semiconductor laser element Granted JPS5666085A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14252079A JPS5666085A (en) 1979-11-02 1979-11-02 Semiconductor laser element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14252079A JPS5666085A (en) 1979-11-02 1979-11-02 Semiconductor laser element

Publications (2)

Publication Number Publication Date
JPS5666085A JPS5666085A (en) 1981-06-04
JPS6249998B2 true JPS6249998B2 (en) 1987-10-22

Family

ID=15317261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14252079A Granted JPS5666085A (en) 1979-11-02 1979-11-02 Semiconductor laser element

Country Status (1)

Country Link
JP (1) JPS5666085A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56165735U (en) * 1980-05-12 1981-12-08
JPS56161685A (en) * 1980-05-16 1981-12-12 Fujitsu Ltd Manufacture of semiconductor laser
JPH0489867U (en) * 1990-12-14 1992-08-05

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52105790A (en) * 1976-03-01 1977-09-05 Nec Corp Injection type semiconductor laser element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52105790A (en) * 1976-03-01 1977-09-05 Nec Corp Injection type semiconductor laser element

Also Published As

Publication number Publication date
JPS5666085A (en) 1981-06-04

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