JPS6231086A - Constitution of memory - Google Patents

Abstract

PURPOSE:To save a chip area for a memory by storing the data requiring a high speed in a high speed ROM, and storing the data requiring no high speed in a low speed ROM. CONSTITUTION:A high speed ROM 8 and a low speed ROM 10 form the same address space and the accessed by the same address indicator. In the ROMs 8, 10, a program ROM performed by a CPU and the data ROM used by the CPU are included. Since the program ROM has a high rate of accessing, a high speed is required, while the data ROM has a lower rate of accessing than the program ROM, so that it may require a low speed but require a large capacity. Accordingly, the program requiring the high speed is stored in the high speed ROM 8, and the data requiring the large capacity is stored in the low speed ROM 10. In this manner, the memory is allocated.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a ROM (read-only memory) in a one-chip semiconductor device such as a one-chip CPU.

(Prior Art) A ROM stores programs, data, and the like. R.O.
For M, there are two types of high-speed ROM: OR type high-speed ROM, which is large due to its low storage density but has a high read speed, and conversely, an AND type ROM, which has a low read speed but high storage density, and can achieve large capacity in a small size. There is also a low speed ROM. AND type RO
M can realize two to three times the memory capacity in the same area compared to OR type ROM. However, AND type RO
Since the read speed of M is extremely slow, AND type RO is usually used.
M is not used alone.

On the other hand, as shown in Fig. 2, if only the OR type high-speed ROM 4 is used as the ROM of the 1-chip microcomputer 2, as the capacity of the ROM increases, the ROM occupies as shown in Fig. 3. The ratio increases and RO
The chip size is now determined by the capacity of M.

Therefore, an AND-OR type ROM, which is a compromise between an AND type ROM and an OR type ROM, is often used in a one-chip microcomputer with a built-in large capacity ROM. However, the AND-OR type ROM has a drawback that it is difficult to cope with the increase in speed of the CPU.

(Objective) The present invention provides a ROM with almost high read speed in a 1-chip microcomputer or other 1-chip semiconductor device.
The objective is to realize a memory configuration whose memory capacity is close to that of a low-speed ROM.

(Configuration) In the memory configuration of the present invention, a low-speed ROM with high storage density and low read speed and a low-speed ROM with low storage density and high read speed are located on the same chip at the same address accessed by the same address indicator. Data that is arranged at an appropriate ratio in space and requires high speed is high-speed R.
Data that is stored in OM and does not require high speed is stored in low speed R.
Stored in OM.

Examples will be specifically described below.

Figure 1 shows a 1-chip microcomputer similar to Figure 2, with the same memory capacity as ROM4 in high-speed ROM8.
This was realized using the low-speed ROM10. High speed RO
M8 and low-speed ROM10 form the same address space,
Accessed by the same address indicator. 12 is the chip area saved in this embodiment.

ROM8 and 10 contain program ROMs that are executed by the CPU.
and a data ROM used by the CPU. .

Examples of data ROMs include dot matrix character generators, display messages, or tables.

A program ROM requires high speed because of its high access rate, whereas a data ROM has a low access rate compared to a program ROM and can be operated at a low speed, but requires a significantly large capacity.

Accordingly, in one embodiment, memory is allocated such that the programmer and program requiring high speed are stored in the high speed ROM 8, and the data requiring large capacity is stored in the low speed ROM 10.

In some cases, all of ROM8.10 is used as a program ROM. In that case, among the programs, routines that are accessed frequently and routines that require high speed are stored in the high speed ROM 8, and routines that are accessed less frequently and routines that do not require high speed are stored in the low speed ROM 10. good.

(Effects) According to the present invention, by providing a high-speed ROM and a low-speed ROM, the chip area for memory can be saved compared to the conventional case of only a high-speed ROM.

Further, by storing data that requires high speed performance in a high speed ROM and data that does not require high speed performance in a low speed ROM, a large capacity can be achieved without degrading the overall performance.

[Brief explanation of drawings]

Figure 1 is a block diagram showing one embodiment, Figure 2 is a block diagram showing a conventional memory configuration, and Figure 3 is a diagram showing the memory capacity and proportion of ROM in the conventional memory configuration shown in Figure 2. . 8...High speed ROM, 10...Low speed ROM. 12... Saved memory chip area.

Claims (1)

[Claims] (1) Low-speed ROM with high storage density and low read speed
and a low-speed ROM with a low storage density and high read speed are arranged in an appropriate ratio on the same chip in the same address space accessed by the same address indicator, and the data requiring high speed is Stored in high-speed ROM,
A memory configuration characterized in that data that does not require high speed performance is stored in the low speed ROM.