JPS62252964A - Active matrix substrate housed in driver - Google Patents
Active matrix substrate housed in driverInfo
- Publication number
- JPS62252964A JPS62252964A JP61096301A JP9630186A JPS62252964A JP S62252964 A JPS62252964 A JP S62252964A JP 61096301 A JP61096301 A JP 61096301A JP 9630186 A JP9630186 A JP 9630186A JP S62252964 A JPS62252964 A JP S62252964A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- driver
- line
- active matrix
- lines
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 26
- 239000011159 matrix material Substances 0.000 title claims description 12
- 239000010409 thin film Substances 0.000 claims abstract description 24
- 239000010408 film Substances 0.000 claims abstract description 15
- 230000015556 catabolic process Effects 0.000 abstract description 7
- 230000002093 peripheral effect Effects 0.000 abstract description 7
- 239000000463 material Substances 0.000 abstract description 6
- 238000005468 ion implantation Methods 0.000 abstract description 5
- 239000004020 conductor Substances 0.000 abstract 1
- 239000004973 liquid crystal related substance Substances 0.000 description 7
- 150000002500 ions Chemical class 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000011149 active material Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000006386 neutralization reaction Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H01L27/12—
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、透明絶縁基板上に薄膜トランジスタを形成し
たドライバー内蔵アクティブマトリックス基板の構造に
関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of an active matrix substrate with a built-in driver, in which thin film transistors are formed on a transparent insulating substrate.
近年、絶縁基板上に堆積した半導体薄膜を能動領域とし
て用いたMO3型薄膜トランジスターは、液晶表示装置
の画素の光スィッチとしてばかりでなく、周辺の駆動回
路も構成できるほどに性能があがっている。しかし7、
絶縁基板を用いたデバイスでは、絶縁基板表面に生じた
電荷をいかに外部に放散して、薄膜トランジスターの絶
縁破壊を防止するかが課題である。特に液晶表示装置の
ように、パネル表示部分の面積が大きいデバイスでは製
造工程中での基板表面でのチャージアップをいかに防止
するかが重要である。In recent years, the performance of MO3 type thin film transistors, which use semiconductor thin films deposited on insulating substrates as active regions, has improved to such an extent that they can be used not only as optical switches for pixels in liquid crystal display devices, but also as peripheral drive circuits. But 7,
In devices using insulating substrates, the challenge is how to dissipate charges generated on the surface of the insulating substrate to the outside and prevent dielectric breakdown of thin film transistors. Particularly in devices such as liquid crystal display devices where the panel display area is large, it is important to prevent charge-up on the substrate surface during the manufacturing process.
第2図は、透明絶縁基板上にマトリックス状に配置され
た薄膜トランジスターと周辺駆動回路から構成された液
晶表示用ドライバー内蔵アクティブマトリックス基板の
模式図である。1 (G、〜()、、)は、タイミング
線となるゲート線、2(S1〜Ss)は、データ線とな
るソース線であり、3の薄膜トランジスターと4の画素
電極は、ゲート線、ソース線の交点に配置されている。FIG. 2 is a schematic diagram of an active matrix substrate with a built-in driver for a liquid crystal display, which is composed of thin film transistors and peripheral drive circuits arranged in a matrix on a transparent insulating substrate. 1 (G, ~(), , ) are gate lines serving as timing lines, 2 (S1~Ss) are source lines serving as data lines, and thin film transistors 3 and pixel electrodes 4 are gate lines, Located at the intersection of the source lines.
5は、タイミング線駆動回路、6はデータ線駆動回路で
あり、この図では両側駆動の場合な示している第3図は
、前記模式図で構成された従来の液晶表示用ドライバー
内蔵アクティブマトリックス基板の外周近傍の平面図(
α)と断面図Cb)である。透明絶縁基板7上に化学反
応を媒介として結晶や非晶質を被着させるCVD法によ
り、多結晶シリコン薄膜8を堆積させる。次に、多結晶
シリコン薄膜のパターン形成を行なった後、ゲート絶縁
膜9を形成し、その上に金属や多結晶シリコン薄膜を用
いたゲート電極10及びゲート線1を駆動回路内を衾め
て同時形成する。次に、ゲート電極10とレジストをマ
スクに用いて、P型不純物イオンとN型不純物イオンを
選択的にイオン打込みをしてP型とN型の薄膜トランジ
スターのソース・ドレイン領域を形成する。次に、層間
絶縁膜11をCVD法により積層し、コンタクトホール
を開口した後、透明導電膜を被着して、画素電極4を形
成し金属を被着して、ソース線2及び、周辺のタイミン
グ線駆動回路5とデータ線駆動回路6内の配線とする。5 is a timing line drive circuit, and 6 is a data line drive circuit. In this figure, both sides are driven. FIG. A plan view near the outer periphery of (
α) and cross-sectional view Cb). A polycrystalline silicon thin film 8 is deposited on a transparent insulating substrate 7 by a CVD method in which crystals or amorphous materials are deposited through a chemical reaction. Next, after patterning the polycrystalline silicon thin film, a gate insulating film 9 is formed, and a gate electrode 10 and a gate line 1 made of metal or polycrystalline silicon thin film are formed on the gate insulating film 9 inside the drive circuit. Form simultaneously. Next, using the gate electrode 10 and a resist as a mask, P-type impurity ions and N-type impurity ions are selectively implanted to form source and drain regions of P-type and N-type thin film transistors. Next, an interlayer insulating film 11 is laminated by the CVD method, a contact hole is opened, a transparent conductive film is deposited, a pixel electrode 4 is formed, and a metal is deposited to form the source line 2 and the surrounding area. This is assumed to be wiring within the timing line drive circuit 5 and data line drive circuit 6.
しかし、前述の従来技術では、イオン打込みの工程で透
明絶縁基板上にチャージアップされた電荷の逃げ路がな
いため、薄膜トランジスターの絶縁破壊を生じやすい。However, in the above-mentioned conventional technology, there is no escape route for charges built up on the transparent insulating substrate during the ion implantation process, and therefore dielectric breakdown of the thin film transistor is likely to occur.
そのため、イオン打込み時には、基板表面近傍で打込み
イオンを熱電子により中性化する打込み方式を採用する
のであるが、完全な中性化は難しく、外観上不明な程度
の軽いダメージが発生する。特に、画素を駆動する薄膜
トランジスターは、レーザー等を用いて、切断すること
によってその画素のみを犠牲にするだけすむ。ところが
、周辺にある駆動回路部分の簿膜トランジスターは、1
つでも不良があると動作不良をおこすという問題点を生
ずる。そこで本発明は、このような問題点を解決するも
ので、その目的とするところは、薄膜トランジスターの
絶縁破壊耐量を増加した周辺駆動回路を提供するところ
にある。For this reason, when implanting ions, an implantation method is used in which the implanted ions are neutralized by thermoelectrons near the substrate surface, but complete neutralization is difficult, and slight damage occurs that is not apparent from the outside. In particular, by cutting the thin film transistor that drives a pixel using a laser or the like, only the pixel can be sacrificed. However, the film transistors in the peripheral drive circuit portion are 1
If there is any defect at any time, a problem arises in that it causes malfunction. SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and an object of the present invention is to provide a peripheral drive circuit in which the dielectric breakdown strength of thin film transistors is increased.
本発明のドライバー内蔵アクティブマトリックス基板は
、周辺駆動回路を導電膜の配線で囲うと共に、基板周辺
にも導電膜領域をもうけ、両者を短絡することを特徴と
する。The active matrix substrate with a built-in driver of the present invention is characterized in that the peripheral drive circuit is surrounded by conductive film wiring, and a conductive film region is also provided around the substrate to short-circuit the two.
本発明の上記の構造によれば、駆動回路は、導電膜の配
線でシールドされたことになり、大面積を占める表示部
分から・リチャージアップした電荷は基板周辺を接地す
ることで外部に放散できるため駆動回路内の薄膜トラン
ジスターのダメージをなくすことが可能である。According to the above-described structure of the present invention, the drive circuit is shielded by conductive film wiring, and the charges that are recharged from the display area that occupies a large area can be dissipated to the outside by grounding the periphery of the substrate. Therefore, it is possible to eliminate damage to the thin film transistor in the drive circuit.
第1図は、本発明の実施例であり、液晶表示用ドライバ
ー内蔵アクティブマトリックス基板の外周近傍の平面図
である。第3図の従来例に比べて、駆動回路をゲート線
と同一の材料を用いた配線で周囲をおおっており、透明
絶縁基板の周辺に同一材料で接続しているため、駆動回
路内の薄膜トランジスターは、完全にシールドされてい
るのでイオン打込み等による絶縁破壊を十分防止するこ
とができる。駆動回路を囲んでいる配線は、本実流側の
ように、ゲート線と同一材料にする必要はなく、JJ4
種の導電膜を用いても何らさしつかえない。配線幅は、
十ミクロンメートルもとれば十分であり、占有面積も小
さく、工程が増えるわけではないので好都合である。FIG. 1 is an embodiment of the present invention, and is a plan view of the vicinity of the outer periphery of an active matrix substrate with a built-in driver for liquid crystal display. Compared to the conventional example shown in Figure 3, the drive circuit is surrounded by wiring made of the same material as the gate line, and is connected to the periphery of the transparent insulating substrate using the same material. Since the transistor is completely shielded, dielectric breakdown due to ion implantation or the like can be sufficiently prevented. The wiring surrounding the drive circuit does not need to be made of the same material as the gate line as on the actual flow side, and is made of JJ4.
There is no problem in using a conductive film of any kind. The wiring width is
A thickness of 10 micrometers is sufficient, occupies a small area, and does not increase the number of steps, which is advantageous.
以上述べたように本発明によれば、周辺の駆動回路は導
電膜の配線でシールドされたことになり、イオン打込み
等の電荷の表面へのチャージアップによる駆動回路内の
薄膜トランジスターの絶縁破壊を防止するという効果を
有する。また酸素プラズマ等のクリーニング工程でも、
ダメージ防止に役立つものである。As described above, according to the present invention, the peripheral drive circuit is shielded by conductive film wiring, which prevents dielectric breakdown of the thin film transistor in the drive circuit due to charge build-up on the surface due to ion implantation, etc. It has the effect of preventing Also, in cleaning processes such as oxygen plasma,
This helps prevent damage.
第1図は、本発明の液晶表示用ドライバー内蔵アクティ
ブマトリックス基板の外周近傍の平面図である。第2図
は、液晶表示用ドライバー内蔵アクティブマトリックス
基板の模式図である。第3図は、従来の液晶表示用ドラ
イバー内蔵アクティブマ) IJソックス板の外周近傍
の平面図(α)と断面図(b)である。
1・・・・・・ゲート線(タイミング線)2・・・・・
・ソース線(データ線)
3・・・・・・薄膜トランジスター
4・・・・・・画素電極
5・・・・・・タイミング線駆動回路
6・・・・・・データ線駆動回路
7・・・・・・透明絶縁基板
8・・・・・・多結晶シリコン薄膜
9・・・・・・ゲート絶縁膜
10・・・ゲート電極
11・・・層間絶縁膜
12・−・コンタクトホール
以 上
出願人 セイコーエプソン株式会社
第1図FIG. 1 is a plan view of the vicinity of the outer periphery of an active matrix substrate with a built-in driver for liquid crystal display according to the present invention. FIG. 2 is a schematic diagram of an active matrix substrate with a built-in driver for liquid crystal display. FIG. 3 is a plan view (α) and a cross-sectional view (b) of the vicinity of the outer periphery of a conventional active material with a built-in driver for liquid crystal display (IJ sock board). 1... Gate line (timing line) 2...
- Source line (data line) 3... Thin film transistor 4... Pixel electrode 5... Timing line drive circuit 6... Data line drive circuit 7... ...Transparent insulating substrate 8...Polycrystalline silicon thin film 9...Gate insulating film 10...Gate electrode 11...Interlayer insulating film 12...Contact hole and above Applications People Seiko Epson Corporation Figure 1
Claims (3)
線を有し、該データ線とタイミング線の交差点に薄膜ト
ランジスターと該薄膜トランジスターでスイッチする画
素電極をもうけると共に、該データ線とタイミング線の
少なくとも一方の駆動回路を同一の透明絶縁基板上に構
成するドライバー内蔵アクティブマトリックス基板にお
いて、該駆動回路を導電膜の配線で囲うと共に、該基板
の周辺にも導電膜をもうけ、前記配線と短絡することを
特徴とするドライバー内蔵アクティブマトリックス基板
。(1) It has a plurality of data lines and a plurality of timing lines that are perpendicular to each other, and a thin film transistor and a pixel electrode to be switched by the thin film transistor are provided at the intersection of the data line and the timing line, and the data line and the timing line are provided at the intersection of the data line and the timing line. In an active matrix substrate with a built-in driver, in which at least one of the drive circuits is configured on the same transparent insulating substrate, the drive circuit is surrounded by wiring of a conductive film, and a conductive film is also provided around the substrate to prevent a short circuit with the wiring. An active matrix board with a built-in driver.
トランジスターのゲート配線層と同一層であることを特
徴とする特許請求の範囲第1項記載のドライバー内蔵ア
クティブマトリックス基板。(2) The active matrix substrate with a built-in driver according to claim 1, wherein the wiring layer surrounding the driver is the same layer as a gate wiring layer of a thin film transistor in the drive circuit.
層薄膜トランジスターのゲート配線層と同一層であるこ
とを特徴とする特許請求の範囲第1項記載のドライバー
内蔵アクティブマトリックス基板。(3) The active matrix substrate with a built-in driver according to claim 1, wherein the wiring layer surrounding the driver is the same layer as the gate wiring layer of the pixel electrode switch layer thin film transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61096301A JPH07114281B2 (en) | 1986-04-25 | 1986-04-25 | Driver-Built-in active matrix substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61096301A JPH07114281B2 (en) | 1986-04-25 | 1986-04-25 | Driver-Built-in active matrix substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62252964A true JPS62252964A (en) | 1987-11-04 |
JPH07114281B2 JPH07114281B2 (en) | 1995-12-06 |
Family
ID=14161207
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61096301A Expired - Lifetime JPH07114281B2 (en) | 1986-04-25 | 1986-04-25 | Driver-Built-in active matrix substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07114281B2 (en) |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02242230A (en) * | 1989-03-16 | 1990-09-26 | Matsushita Electron Corp | Liquid crystal display device |
JPH0728092A (en) * | 1993-07-08 | 1995-01-31 | Nec Corp | Production of driving circuit built-in type liquid crystal display device |
WO1999042897A1 (en) * | 1998-02-19 | 1999-08-26 | Seiko Epson Corporation | Active matrix substrate, electro-optic device, method of manufacturing active matrix substrate, and electronic device |
JP2004163493A (en) * | 2002-11-11 | 2004-06-10 | Sanyo Electric Co Ltd | Display device |
US6778231B1 (en) | 1991-06-14 | 2004-08-17 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical display device |
EP1533848A2 (en) | 2003-11-19 | 2005-05-25 | Samsung SDI Co., Ltd. | Electroluminescence display |
US6975296B1 (en) | 1991-06-14 | 2005-12-13 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method of driving the same |
JP2006191016A (en) * | 2004-12-30 | 2006-07-20 | Lg Philips Lcd Co Ltd | Thin film transistor array substrate and its manufacturing method |
US7154147B1 (en) | 1990-11-26 | 2006-12-26 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and driving method for the same |
JP2009020528A (en) * | 2008-08-27 | 2009-01-29 | Seiko Epson Corp | Electrooptical apparatus and electronic equipment |
JP2009163042A (en) * | 2008-01-08 | 2009-07-23 | Mitsubishi Electric Corp | Scanning line driving circuit for active matrix and image display |
US8355015B2 (en) | 2004-05-21 | 2013-01-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device and electronic device including a diode electrically connected to a signal line |
CN103033728A (en) * | 2011-10-08 | 2013-04-10 | 中芯国际集成电路制造(上海)有限公司 | Time dependent dielectric breakdown test circuit and test method |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60251665A (en) * | 1984-05-28 | 1985-12-12 | Seiko Epson Corp | Thin-film semiconductor device |
-
1986
- 1986-04-25 JP JP61096301A patent/JPH07114281B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60251665A (en) * | 1984-05-28 | 1985-12-12 | Seiko Epson Corp | Thin-film semiconductor device |
Cited By (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02242230A (en) * | 1989-03-16 | 1990-09-26 | Matsushita Electron Corp | Liquid crystal display device |
US7154147B1 (en) | 1990-11-26 | 2006-12-26 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and driving method for the same |
US7928946B2 (en) | 1991-06-14 | 2011-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method of driving the same |
US6975296B1 (en) | 1991-06-14 | 2005-12-13 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method of driving the same |
US6778231B1 (en) | 1991-06-14 | 2004-08-17 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical display device |
JPH0728092A (en) * | 1993-07-08 | 1995-01-31 | Nec Corp | Production of driving circuit built-in type liquid crystal display device |
WO1999042897A1 (en) * | 1998-02-19 | 1999-08-26 | Seiko Epson Corporation | Active matrix substrate, electro-optic device, method of manufacturing active matrix substrate, and electronic device |
US6891523B2 (en) | 1998-02-19 | 2005-05-10 | Seiko Epson Corporation | Active-matrix substrate, electro-optical device, method for manufacturing active-matrix substrate, and electronic equipment |
US6392622B1 (en) | 1998-02-19 | 2002-05-21 | Seiko Epson Corporation | Active-matrix substrate, electro-optical device, method for manufacturing active-matrix substrate, and electronic equipment |
JP2004163493A (en) * | 2002-11-11 | 2004-06-10 | Sanyo Electric Co Ltd | Display device |
EP1533848A2 (en) | 2003-11-19 | 2005-05-25 | Samsung SDI Co., Ltd. | Electroluminescence display |
EP1533848A3 (en) * | 2003-11-19 | 2005-10-19 | Samsung SDI Co., Ltd. | Electroluminescence display |
US7372438B2 (en) | 2003-11-19 | 2008-05-13 | Samsung Sdi Co., Ltd. | Electroluminescent display |
US10115350B2 (en) | 2004-05-21 | 2018-10-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having rectifying elements connected to a pixel of a display device |
US9536937B2 (en) | 2004-05-21 | 2017-01-03 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having a rectifying element connected to a pixel of a display device |
US8355015B2 (en) | 2004-05-21 | 2013-01-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device and electronic device including a diode electrically connected to a signal line |
US8917265B2 (en) | 2004-05-21 | 2014-12-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device and electronic device including a current source and a diode electrically connected at an output of the current source |
JP2006191016A (en) * | 2004-12-30 | 2006-07-20 | Lg Philips Lcd Co Ltd | Thin film transistor array substrate and its manufacturing method |
US8507301B2 (en) | 2004-12-30 | 2013-08-13 | Lg Display Co., Ltd. | TFT array substrate and the fabrication method thereof |
US8462285B2 (en) | 2008-01-08 | 2013-06-11 | Mitsubishi Electric Corporation | Scanning line driving circuit for active matrix and image display device |
JP2009163042A (en) * | 2008-01-08 | 2009-07-23 | Mitsubishi Electric Corp | Scanning line driving circuit for active matrix and image display |
JP2009020528A (en) * | 2008-08-27 | 2009-01-29 | Seiko Epson Corp | Electrooptical apparatus and electronic equipment |
CN103033728A (en) * | 2011-10-08 | 2013-04-10 | 中芯国际集成电路制造(上海)有限公司 | Time dependent dielectric breakdown test circuit and test method |
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JPH07114281B2 (en) | 1995-12-06 |
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