JPS62235890A - Display device - Google Patents

Abstract

PURPOSE:To make the titled device small in size, simple in structure, low in cost and to improve the reliability by constituting plural picture elements in a form of matrix, sequentially assigning three different colors to the picture elements of respective rows, and providing a display panel disposed by shifting vertically by 1.5 times of a line picth every one row, a line selection circuit and a two system row drive circuit. CONSTITUTION:In a color liquid crystal panel 32, the picture element array of R, G, B is constituted by shifting vertically by substantially 1.5 times of the line pitch every one row. A Y driver IC, 9' a is disposed on the upper side of the panel to drive the odd number row of the panel, a Y driver IC, 9'b is disposed on the lower side of the panel to drive the even number row of the panel. An X driver IC, 10 selects the line of the panel. A color filter of R, G or B is mounted on the upper part of an area constituted of TFT, T, LC, C consisting of a switching lement to constitute one picture element. Row and line electrodes Y1, Y3, Y5...e(X1,X2,X3...) are connected to the source bus (right ward (leftward) descending slashes) in the color liquid crystal panel.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a display device that uses a color liquid crystal panel or the like as a display element and can be used in a television receiver or the like.

2. Description of the Related Art In recent years, liquid crystal television receivers using liquid crystal panels as display elements have been developed. First, an overview of the operation of this liquid crystal television receiver will be explained.

FIG. 6 shows the general configuration of a liquid crystal television receiver. A television signal sent from a broadcasting station is received by an antenna 1 and frequency-converted by a tuner 2 to become an intermediate frequency. The television signal converted to the intermediate frequency is sent to the signal processing circuit section 3.
The signal is amplified and detected to obtain an audio signal and a video signal. The audio signal is output to the speaker 6 via the audio output circuit 4. The video signal is applied to the chroma section 6. The chroma section 6 has a chroma processing section and a chroma output section, and the video signal is demodulated into R, G, and B signals in the chroma processing section, and then converted into a signal whose polarity is inverted for each field at the chroma output section. It is converted and added to the Y driver IC9. The video signal applied to the Y driver IC 9 is sampled and held and applied to the source line of the active matrix color liquid crystal panel 8. The video signal is also applied to the control section 7, where various control pulses are obtained, and the X driver I
C10 and the control signal input terminal of the Y driver IC9. The X driver IC1o is only for scanning in the vertical direction, and its output is applied to the gate line of the active matrix color liquid crystal panel 8. Vertical scan pulse from X driver IC10 and Y
A television image is obtained on the active matrix color liquid crystal panel 8 using the video signal from the driver IC 9.

Next, in the configuration diagram of the liquid crystal television receiver shown in FIG. 6, a conventional example of the configuration of the liquid crystal panel display unit, that is, the color liquid crystal panel s, Y driver ICs, and X driver IC 10, is shown in FIG. In Figure 7, R and G of the color liquid crystal panel 8.

The B picture element array has a configuration in which each row is shifted horizontally by approximately 1.5 times the column pinch in order to improve the display quality. Y driver IC9 is color liquid crystal panel 8
The upper Y driver I
C19a and the lower Y driver IC19b. The output of the upper Y driver IC9a is sent to the odd-numbered S channel column electrodes Y1. Y3. Y6. ...°, and the output of the lower Y driver IC9b is connected to the even-numbered panel column electrodes Y2. Y4゜Y6. ······It is connected to the. The output of the X driver IC10 is a color liquid crystal spring.
・Disposed on one side of ・; Nell row electrode x4. x2. x3
．． ······It is connected to the.

FIG. 8 is an enlarged view of the upper left part of the color liquid crystal panel 8 shown in FIG. 7. In FIG. 8, T is a thin film transistor (hereinafter abbreviated as TPT) constituting a switching element, and when the gate G is at a positive potential (hereinafter referred to as high level),
The source S and the drain D are conductive (hereinafter referred to as on),
Gate G is at zero or negative potential (hereinafter referred to as low level)
When this happens, the source S and drain D are insulated (hereinafter referred to as off).

LC is a liquid crystal, C is a capacitance of 900M that exists in parallel with the liquid crystal, and is an alternating current ground line called a common electrode. Tr
, LC, and C, and an R, G, or B color filter is placed on top of the area composed of LC, C, and constitutes one picture element.

Column electrode Y1. Y3. . . . are connected to the source bus (indicated by diagonal lines on the lower right in the figure) inside the color liquid crystal panel, and the row electrodes x1. x2. x3. . . . is connected to a gate path inside the color liquid crystal panel (indicated by diagonal lines at the bottom left in the figure). The color liquid crystal panel shown in FIG. 8 may be simplified and represented as shown in FIG. 7 and 8.

FIG. 9 is a diagram showing a specific configuration of a conventional liquid crystal panel display unit. In Fig. 9, 8 is a color liquid crystal panel;
9a is the Y driver I located on the top of the panel 1111
C19blI'i Y driver IC arranged at the bottom of the panel, 11 is a color signal switching control signal generation circuit, 12.1
3 is a multiplexer that switches signals, 14, 16.16
17, 18, and 19 are color signal input terminals, 17, 18, and 19 are color signal data lines, and 20 is a sample hold circuit including a shift register. An example is shown below. 11A in the figure.

11B and 11C indicate D flip-flops (hereinafter abbreviated as DFF), D indicates a data input terminal of the D flip-flop, φ indicates a clock pulse input terminal of DFF, Q indicates an output terminal of DFF, and R indicates an OFF reset terminal. . 21-2
3 represents an OR circuit, 24 to 29 represent an AND circuit, and 30 to 31 represent an inverter circuit.

FIG. 11 is a timing chart for explaining the operation of FIG. 10, and when the R/L terminal is at H°i level, the figure a shows the R/L terminal. Indicates the case of level. Sv is a vertical scanning start pulse, and SH is a horizontal scanning start pulse.

Assuming that one period of horizontal scanning is 1H, SH is a pulse having a rising edge every 1H. Also, the pulse width of rust is 1
H, and in order to ensure the switching r'f:v, the rising edge of Sv is slightly advanced in phase with respect to the rising edge of SH. Q4
．． Q3 is a color signal switching control signal output pulse, which is used to control switching of multiplexers 12 and 13 shown in FIG.

Regarding the conventional display device shown in FIG. 7, FIGS.
The operation will be explained based on FIG. First, the Y driver IC9a located on the upper side of the panel will be explained.

The vertical start pulse Sv causes the picture element switching control signal output Q1. Q3 is reset and both are at the round level. 9a
Since the R/L terminal is at the Lo level, only the signal pulse Q3 becomes high level for a period of 1H from the rise of the next SH pulse after the Sv pulse becomes low level, and the multiplexer 13 is turned on, as shown in FIG. During the 0th-order 1H period, only the signal pulse Q1 is at a high level, and the multiplexer 12 is turned on. Thereafter, the signal pulse Q3 is at a high level, the signal pulse Ql is at a high level, and so on are repeated every 1H.

Upper Y driver I C9a color signal input terminal 14.1
G, R, and B color signals are applied to 6 and 16, respectively. During the 1H period from the rise of the next SH pulse after the vertical start pulse Sv has gone low (corresponding to the first row of the panel), the signal pulse Q3 is at a high level and the multiplexer 13 is turned on, so the color signal data line 17.18.19
G, R, and B color signal information are selected respectively.

Therefore, the output line of the upper Y driver I C9a /Y1
Color 1g information for R, B, and G is obtained at tY3tY6, respectively. Furthermore, during the next 1H period (corresponding to the second row of the panel), the signal pulse Q1 is at a high level and the multiplexer 12 is turned on, so the color signal data line 17.1
B and G on 8.19 respectively.

R color signal information is selected. Therefore, the outputs of the upper Y driver IC9a are Yl, Y3. G, R, and B color signal information is obtained for Y6, respectively. By repeating what has been described above, the desired color signal information is transferred to the output line Y1. of the upper Y driver IC9a. Y3. Y5.・
... can be obtained.

In the lower Y driver IC5b, the R/L terminal is H.
, level, so the output pulse Q of the color signal switching control signal
1. Q3 is as shown in Figure 11a.

That is, the operation is reversed from that of the upper Y-5-I C9a, such as Q1→Q3→... Color signal input terminals 14 and 15°1eK-th of the lower Y driver IC 9b apply hB, R, and G color signals.

When corresponding to the first row of the panel, the signal pulse Q1 is at a high level and the multiplexer 12 is turned on, so G, B, and R color signal information is selected for the color signal data lines 17, 18, and 19, respectively. Therefore, lower Y driver IC9b
Output line Y2. G, R, and Y4 and Y6 respectively.
B color signal information is obtained. Further, during the next 1H period, that is, when corresponding to the second row of the panel, the signal pulse Q3 is at H level and the multiplexer 13 is turned on, so the color signal data lines 17, 18, and 19 have B and R signals, respectively.

G color signal information is selected.

Therefore, the output line Y2 of the lower Y driver IC9b. Y
4. Color signal information of B, G, and R is obtained for Y6, respectively.

The following is the desired color 1 by repeating the above steps.
Ill output line Y2 of Y driver E C9b. Y4. Y6. ... can be obtained.

Problems to be Solved by the Invention However, the above configuration has the following problems. In other words, since the pixel arrangement of the display panel is horizontally shifted by approximately 1.5 times the column pitch for each row, adjacent three Y driver ICs arranged above and below the display panel The color signal information outputted to each output terminal is different in a certain 1H period. Therefore, three lines are required as signal data lines inside the Y driver IC, and the configuration of the color signal switching control signal generation circuit section is quite complicated. As a result, the chip size of the Y driver IC increases, the circuit configuration becomes more complex, and the size of the display device increases.

It had problems such as increased cost and decreased reliability.

In view of the above-mentioned problems, the present invention provides a display device that is miniaturized, simplified, cost reduced, and improved in reliability without impairing display image quality.

Means for Solving the Problems In order to solve the above problems, the display device of the present invention configures a plurality of picture elements in a matrix by dividing them into a plurality of rows in the vertical direction and into a plurality of columns in the horizontal direction. , three different colors are sequentially assigned to the picture elements in each column, and 1
A display panel arranged vertically shifted by approximately 1.5 times the row pitch for each column, a row selection circuit that applies a row selection signal to the panel, and three display panels for each odd-numbered column and each even-numbered column of the panel. It has a configuration including a two-system column drive circuit that sequentially applies color signals.

Effect: With the above-described configuration, the color signal information output to each output terminal of the column drive circuit (Y driver IC) for odd and even columns becomes the same signal during a certain 1H period. Only one signal data line is required inside the driver IC, and the configuration of the color signal switching side-inverted-1 signal generation circuit section is also simplified. As a result, the chip size of the Y driver IC 1 has been reduced and the circuit configuration has been simplified, making it possible to reduce the size and simplicity of the display device, reduce costs, and improve reliability without degrading the display image quality. Become.

Embodiment Hereinafter, a display device according to an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows the configuration of a display device in an embodiment of the present invention. In FIG. 1, numeral 32 is a color liquid crystal panel, and the R, G, and B picture elements are arranged at a row pitch of approximately 1. rsm in the vertical direction. 9'a is a Y driver IC arranged on the upper side of the panel and drives the odd numbered columns of the panel, and 9'b is a Y driver IC arranged on the lower side of the panel and drives the even numbered columns of the panel. 1° is an X driver IC that selects rows of the panel.

FIG. 2 is an enlarged view of the upper left part of the color liquid crystal panel 32 shown in FIG. 1. FIG. In FIG. 2, T is a TPT constituting a switching element, LC is a liquid crystal, C is a capacitor existing in parallel with the liquid crystal, and COM is an alternating current ground line called a common electrode. T.

R or G or B on the top of the area composed of LC and C
color filters are placed on it to form one picture element.

Column electrode Y1. Y3. Y5. . . . are connected to the source bus (indicated by diagonal lines on the lower right in the figure) inside the color liquid crystal panel, and the row electrodes x1. x2. x3. ...marked is the gate bus inside the color LCD panel (indicated by the diagonal line on the lower left in the figure)
It is connected to the.

Figure 1 is a simplified version of the color liquid crystal panel shown in Figure 2.
It may be expressed as

FIG. 3 is a diagram showing a specific configuration of the display device of the present invention. In Fig. 3, 32 is a color liquid crystal panel, and 9'a is a Y driver I C, 9' placed above the panel.
b is the Y driver IC located at the bottom of the panel, 14
, 15 and 16 are color signal input terminals, 20 is a sample hold circuit including a shift register, 33 is a color signal switching control signal generation circuit, 34, 35 and 36 are multiplexers for switching signals, and 37 is a color signal data line.

FIG. 4 shows an example of the color signal switching control signal generation circuit section 33 shown in FIG. 33A, 33 in the figure
B, 33C, and 33D indicate DFF, D is the data input terminal of DFF, φ is the clock pulse input terminal of DFF, and Q
indicates the output terminal of the DFF, and R indicates the reset terminal of the DFF. 38 is an OR circuit, Ql, Q2. Q3 is an output terminal of the color signal switching control signal generation circuit 33.

FIG. 6 is a timing chart for explaining the circuit operation of FIG. 4. In FIG. 5, sv is a start pulse for vertical scanning, and SH is a start pulse for horizontal scanning.

SH is a pulse with a rising edge every 1H;
v is a pulse with a pulse width of 1H. Further, in order to perform the switching operation reliably, the rising edge of Sv is slightly advanced in phase with respect to the rising edge of SH. Ql, Q2. Q3 is a color signal switching control signal output pulse, which is output by multiplexer 3 shown in FIG.
4.35.36 switching control.

The operation of the display device of the present invention shown in FIG. 1 will be explained based on FIGS. 3 to 6. The vertical start pulse Sv causes the picture element switching control signal output Q1. Q2. Q3
will be reset to a low level. Only the signal pulse Q1 becomes high level for a period of 1H from the rise of the next SH pulse after the Sv pulse becomes low level, and the multiplexer 34 is turned on. During the next 1H period, only the signal pulse Q2 becomes high level, and the multiplexer 35 is turned on.

Furthermore, during the next 1H period, only the signal pulse Q3 is at a high level, and the multiplexer 36 is turned on.

Thereafter, every 1H, the signal pulse Q1 is at a high V level, Q2 is at a high level, Q3 is at a high level, and so on.

First, the Y driver IC 9'a located on the upper side of the panel
0 Color signals of B, Q, and R are applied to color signal input terminals 14, 15, and 16, respectively. When the vertical start pulse Sv reaches the 1 degree level, the signal pulse Q is applied for a period of 1H from the rise of the next sH pulse (when corresponding to the first row of the panel).
1 is high level and multiplexer 34 is turned on,
R color information is selected for the color signal data line 37.

Therefore, the output line Y1 of the upper Y driver I C9'a
．． Y3. Y6. . . . R color signal information is obtained. During the next 1H period (corresponding to the second row of the panel), the signal pulse Q2 is at a high level, the multiplexer 36 is turned on, and G color information is selected for the color signal data line 37. Therefore, the output line Y1. of the upper Y driver IC9'a. Y3. Y6. . . . G color signal information is obtained.

Furthermore, during the next 1H period (corresponding to the third row of the panel), the signal pulse Q3 is at a high level, the multiplexer 36 is turned on, and the color information of B is selected for the color signal data line 37. Therefore, the upper Y dry node - I C9'a O out Karaia Yl, y3. y5t """Niha B color signal information is obtained.

By repeating the above-mentioned steps, the desired color signal information is transferred to the output line Y1 of the upper Y dry/<-I C9'a. Y3. Y5. Next, consider the lower Y driver IC9'b, which can be obtained in 0th order. R, B, and color signal input terminals 14, 16, and 16, respectively.
0 Upper Y Dry No.-I C9' that applies the G color signal
Based on the same idea as described in the operation explanation of a, the lower Y
Output line Y2 of driver I Cs'b. Y4. Y6
．． ......, G color signal information is obtained when the 1st line of the panel is supported, B color signal information is obtained when the 2nd line of the panel is supported, and R color signal information is obtained when the 3rd line of the panel is supported. If the color signal information is obtained below 0, repeat the above steps to obtain the desired color signal information (Ill Y Driver
Ce'b output line Y2゜Y4. Y6.・・・・・・
can be obtained.

As described above, according to the embodiment of the present invention, the pixel arrangement of the display panel is configured such that each column is shifted in the vertical direction by approximately 1.5 times the row pitch, and as a display device, the picture elements of the display panel are arranged in odd numbers. By providing a two-system column drive circuit that sequentially applies three color signals to each column and each even numbered column, the number of color signal data lines inside the column drive circuit, that is, the Y driver IC, is reduced to one (conventionally, three lines are used). I needed the book)
In addition, the configuration of the color signal switching control signal generation circuit section is simplified, and the chip size of the Y Drino (-C) is reduced.The two-circuit configuration is simplified. Miniaturization without compromising image quality
Simplification, cost reduction, and reliability improvement can be achieved.

In this example, a color liquid crystal panel was used as the display element, but other display elements (EL.

(plasma display, LED, etc.) may also be used.

Effects of the Invention As described above, the present invention configures a plurality of picture elements in a matrix by dividing them into a plurality of rows in the vertical direction and a plurality of columns in the horizontal direction.
In addition to sequentially assigning three different colors to the picture elements in each column, the display panel is arranged vertically shifted by approximately 1.6 times the row pitch for each column, and a row selection number 1M is applied to the panel. By adopting a configuration that includes a row selection circuit that performs It is now possible to reduce the number of color signal data lines to one (previously three lines were required), and the configuration of the color signal switching control signal generation circuit has been simplified, reducing the chip size of the Y driver IC and reducing the circuit size. The configuration can be simplified. As a display device, it is possible to achieve miniaturization, simplification, cost reduction, and improvement in reliability without deteriorating display image quality.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a display device according to an embodiment of the present invention, FIG. 2 is a partially enlarged plan view thereof, and FIG. 3 shows a specific configuration of the display device according to an embodiment of the present invention. 4 is a circuit diagram showing an example of the color signal switching control signal generation circuit shown in FIG. 3, and FIG. 6 is a timing chart for explaining the operation of the circuit shown in FIG. 4. FIG. 6 is a block diagram showing the general configuration of a liquid crystal television receiver. FIG. 7 is a block diagram showing the configuration of the display device in the conventional example, FIG. 8 is a partially enlarged plan view thereof, FIG. 9 is a circuit diagram showing the specific configuration of the display device in the conventional example, and FIG. FIG. 9 is a circuit diagram showing an example of the color signal switching control 4g generation circuit, and FIG. 11 is a timing chart for explaining the circuit operation of FIG. 10. 9'a...Top Y driver IC, s'b
...Lower arrangement 1Y driver IC,' 1o
...X driver IC, 32...Color liquid crystal panel. Name of agent: Patent attorney Toshio Nakao and one other person Y'
a---Top-11! IEIY￥lightt"c-IQ?'
b--Ikushita I regular distribution, tY)-Leiber IClθ--~X
Driver I
-I1, L---------J 4th figure + J-33 5th figure 1M,, Ugol''] Figure 7 dea Figure 8 Figure 9

Claims (3)

[Claims] (1) A plurality of picture elements are formed in a matrix by dividing the vertical direction into multiple rows and the horizontal direction into multiple columns, and three different colors are sequentially assigned to the picture elements in each column. A display panel is arranged vertically shifted by approximately 1.5 times the row pitch for each column, a row selection circuit applies a row selection signal to the panel, and three color signals are applied to each column of the panel. A display device comprising a column drive circuit that sequentially applies voltage. (2) The column drive circuit consists of a first circuit that applies color signals to odd columns and a second circuit that applies color signals to even columns, and each of the first and second circuits has three circuits. 2. The display device according to claim 1, further comprising a switch for sequentially selecting color signals. (3) The display device according to claim 2, wherein the first and second circuits are arranged separately on the upper side and the lower side of the display panel.