JPS62204406A - Rotary head type digital tape recorder - Google Patents

Abstract

PURPOSE:To prevent generation of abnormal reproduced sound by composing reproduced data of interleave pair mistaken when tracks are reproduced intermittently in the case where interleave of PCM signals is made over two tracks. CONSTITUTION:When making high speed reproducing operation, an interpolating control circuit 49 generates interpolating control signals as shown in the figure C or D responding to comparison output signals of a comparator 47. In the case where the comparison output signal of the comparator 47 indicates that data reproduced by a magnetic head 2A is better in the state of error than data reproduced by a magnetic head 2B, an interpolating control signal shown in the figure C is formed, and the interpolating control signal becomes '1' in the period of PCM signals reproduced by the magnetic head 2B, and the PCM signals are interpolated. On the other hand, when data reproduced by the magnetic head 2B are better in the state of error than reproduced data of the magnetic head 2A, PCM signals reproduced by the magnetic head 2A are interpolated by an interpolating control signal that becomes '1' in the period of PCM signals reproduced by the magnetic head 2A.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a rotary head type digital tape recorder for reproducing digital information signals such as digital audio signals and digital video signals.

[Summary of the invention]

In this invention, the PCM signal recorded on one track is encoded with an error correction code, and the PCM signal is interleaved on every two adjacent tracks. In a rotating head type digital tape recorder that plays alternately with a head,
During playback in which the magnetic tape is run at a faster speed than during recording, one of the first playback data and second playback data played back by a pair of rotary heads, which has a better error state. , and the missing PCM signal is interpolated using the reproduced data of one of them.
This prevents abnormal sounds from occurring in the reproduced sound.

[Conventional technology]

As an error correction code when a digital audio signal (referred to as a PCM signal) is recorded/reproduced by a pair of rotary heads, the PCM signals recorded/reproduced by one rotary head are arranged in a matrix, and this matrix arrangement is used as an error correction code. The error correction code C1 is encoded for each PCM signal arranged in the vertical direction of the matrix, and the error correction code C2 is encoded for each PCM signal arranged in the horizontal direction of the matrix arrangement. The PCM signal encoded with this error correction code is recorded/reproduced every time the check symbols of the error correction codes C1 and C2 are aligned in the vertical direction. Error correction of the reproduced signal is performed using an error correction code C.
1 decoding (C1 decoding) is performed, and then the error correction code C
2 decoding (C2 decoding) is performed.

Furthermore, in order to facilitate interpolation of error symbols when an uncorrectable error occurs, the even-numbered data and the odd-numbered data of the PCM signal are recorded separately on two adjacent tracks. is being carried out. When a pair of rotating heads are called magnetic head A and magnetic head B, in the case of a stereo PCM signal, the even numbered data Le of the L (left) channel and the odd numbered data Ro of the R (right) channel are transferred to the magnetic head. recorded on magnetic tape by A, L
The odd-numbered data LO of the channel and the even-numbered data Re of the L channel are recorded on the magnetic tape by the magnetic head B. A pair of tracks formed by each magnetic head in this way is called an interleave pair.

The data recorded on the interleaved pair tracks is
The frame addresses in the additional codes are made the same, and it is possible for the playback side to know the interleave pair from the frame address. The reproduced data is subjected to error correction processing as described above, and is converted into a PCM signal in which the respective reproduced data of the interleave pair are combined.

Furthermore, in order to increase the utilization rate of the magnetic tape, a recording method is used that does not require a guard band between tracks. That is, the extending direction of the gap of magnetic head A is made different from the extending direction of the gap of magnetic head B, and crosstalk from adjacent tracks is suppressed by azimuth loss.

[Problem that the invention seeks to solve]

A rotary head type digital tape recorder is capable of a variable speed reproduction operation in which the running speed of the magnetic tape is increased to twice or triple the recording speed.

During this variable speed reproduction, the reproduced tracks are intermittent as shown in FIGS. 7A and 7B.

In FIG. 7, TA indicates a track formed by magnetic head A, and T8 indicates a track formed by magnetic head B. In FIG. Track TA has magnetic head A.
The direction of the gap (+azimuth) is indicated, and the track T
Il indicates the direction (-azimuth) of the gap of the magnetic head B.

In addition, two adjacent tracks TA and T! l is an interleaved pair.

During double-speed playback, in which the magnetic tape 3 is run at twice the speed of recording, every other track is scanned, as shown by diagonal lines in FIG. 7A. Therefore, a problem arises in which the reproduction output signal of the consecutive magnetic heads A and the reproduction output signal of the magnetic head B are not reproduction output signals from the interleave pair.

During triple-speed playback, in which the magnetic tape 3 is run at three times the speed during recording, every second trunk is scanned, as shown by diagonal lines in FIG. 7B. Therefore,
As in the case of double-speed reproduction, the successive reproduction output signals of magnetic head A and magnetic head B are not reproduction output signals from an interleaved pair.

During double speed playback and triple speed playback, track TA
When magnetic head B scans track T3, or when magnetic head A scans track T3, due to azimuth loss,
Almost no playback signal can be obtained.

If the reproduction signal of one of the two tracks mistaken for interleaved bears is suppressed by the azimuth loss, relatively no problem occurs. However, if a reproduced signal is obtained even when the azimuths do not match due to tracking deviation, or if the azimuths of the reproduced signals from two tracks that are mistaken for interleaved bears match, mutually unrelated PCM signals are generated word by word. There is a problem in that a reproduced PCM signal that is alternately included in the PCM signal is obtained, and that a harsh and abnormal reproduced sound is generated.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a rotary head type digital tape recorder that can prevent abnormal sounds from occurring due to incorrect interleaving bears when playing tracks intermittently.

[Means for solving problems]

In this invention, an error correction code is encoded on a PCM signal recorded on each track formed diagonally on a magnetic tape, and the PCM signal is interleaved for every two adjacent tracks. In a rotary head digital tape recorder, a pair of rotating heads alternately reproduce recorded signals using a pair of rotating heads. A determining means for determining the error state of the first reproduced data and the error state of the second reproduced data respectively reproduced by the head, and an output signal of the determining means to determine the error state of the first and second reproduced data. A rotary head type digital device characterized in that it is equipped with means for validating one reproduced data with a better error state, invalidating the other reproduced data, and interpolating a missing PCM signal using one of the reproduced data. It's a tape recorder.

[Effect]

When a track is played back intermittently, such as during double-speed playback or triple-speed playback, the first playback data and second playback data that are played back by a pair of rotating heads do not become interleaved bare playback data. . Therefore, the error status of each of the first reproduced data and the second reproduced data is determined.

Of these two pieces of reproduced data, one piece of reproduced data with better errors is used, and the other piece of reproduced data with worse errors is not used. As a result, there is a shortage of PCM signals corresponding to the other reproduced data. This missing PCM signal is interpolated using one of the reproduced data. Therefore,
Even if the interleave bear is mistaken, the reproduced sound is prevented from becoming abnormal.

〔Example〕

Hereinafter, an embodiment in which the present invention is applied to a rotary head type digital tape recorder (abbreviated as RDAT) will be described with reference to the drawings.

The description of this one embodiment will follow in the following order.

a, overall configuration of the digital tape recorder, data configuration of the digital tape recorder C, error correction code of the digital tape recorder d, reproduced signal processing circuit a, overall configuration of the digital tape recorder.
Rotating head type digital tape recorder so-called RDAT
The overall configuration is shown below. 1 has a diameter of 30m5+ and is 200
It is a drum rotated by Orpm. 180 for drum 1
A pair of magnetic heads 2A and 2B are attached with an angular spacing of .degree.

The magnetic tape 3 (indicated by a dashed line) is wound diagonally around the circumferential surface of the drum 1 at a 90° angle. The magnetic tape 3 is spread between reel hubs 4A and 4B of the tape cassette, and is run at a speed of 8.15 (mm/5eC) by a capstan 5 and a pinch roller 6.

As the magnetic heads 2A and 2B alternately come into sliding contact with the magnetic tape 3, inclined tracks 7A and 7B are formed on the magnetic tape 3 as shown in FIG. The tape width A of the magnetic tape 3 is 3.81 mm. The magnetic gap of one rotary head 2A is tilted by +α with respect to the direction orthogonal to the trunk, and the magnetic gap of the other rotary head 2B is tilted by 1α with respect to the direction orthogonal to the track.

(α=20°). The angles of the magnetic gaps of the magnetic heads 2A and 2B are called +azimuth and -azimuth, respectively.

The magnetic heads 2A and 2B are operated by a head changeover switch 8.
terminal r of the record/playback switch 9.
A recording signal from the magnetic head 2 and 2B is supplied to the magnetic heads 2 and 2B via a rotating transformer (not shown), and a reproduction signal from each of the magnetic heads 2 and 2B is recorded/reproduced via a rotating transformer (not shown). It is taken out to terminal p of switch 9.

The analog audio signal from the input terminal 10 is supplied to the A/D converter 12 via the low-pass filter 11.
Sampling frequency 748 K11z.

The signal is converted into a digital audio signal using a 16-bit direct Attenuation. A digital audio signal from the A/D converter 12 is supplied to a recording signal processing circuit 13. The recording signal processing circuit 13 performs error correction encoding of the digital audio signal and conversion into a recording data format as described below. In this case, an ID signal (PCM
-ID) is added. Further, a subcode such as a program number and a time code of the signal to be recorded, and 10 signals (subcode 10) for the subcode are formed by a subcode encoder (not shown), and are output from a terminal 14 to a recording signal processing circuit. 13.

The recording signal processing circuit 13 generates serial recording data for each track in synchronization with the rotation of the magnetic heads 2A and 2B. Recorded data is supplied to the head changeover switch 8 through the recording amplifier 15 and the terminal r of the recording/reproduction switch 9.

Recorded data is alternately supplied to the magnetic heads 2A and 2B by the head changeover switch 8.

The signals reproduced by the magnetic heads 2A and 2B are sent to the terminal p of the head changeover switch 8 and the recording/reproduction switch 9.
The signal is supplied to the reproduction amplifier 16 through. Playback amplifier 1
6 is supplied to the PLL 17, and the PLL 17 extracts a clock synchronized with the reproduced signal. The reproduced signal undergoes processing such as error correction and interpolation in the reproduced signal processing circuit 18, and the reproduced digital audio signal is supplied to the D/A converter 19. A reproduced audio signal from the D/A converter 19 is taken out to an output terminal 21 via a low-pass filter 20. At the same time, the reproduced signal processing circuit 18 separates the subcode and the subcode (D) and outputs them to the output terminal 22. A subcode decoder is connected to the output terminal 22, and control data and the like are formed from the subcode.

Control signals for controlling the head changeover switch 8 and the recording/reproduction changeover switch 9 are generated by the timing control circuit 23. In addition, the timing control circuit 2
3 is a recording signal processing circuit 13 and a reproduction signal processing circuit 18
generates clock signals and timing signals required by each.

b. Data structure of digital tape recorder The entire data recorded on one trunk is called one segment. FIG. 3A shows 1 recorded by one rotating head.
← Shows the structure of component data. When the unit amount of recording data is one block, one segment includes 196 blocks (7500 μsec) of data.

A margin (11 blocks) is provided at each end of one segment corresponding to the end of the track. Subcode 1 and subcode 2 are recorded adjacent to each of these margins. These two subcodes are the same data and are recorded twice.

The subcode is a program number and a time code. PLL on both sides of the 8-block recording area of the subcode
A run-in section (2 blocks) and a post-7-run section (1 block) are arranged.

Also, inter-block blocks where no data is recorded
A gap is provided, and pilot signals for ATF are recorded over five blocks between three inter-block gaps. Within the 130 block length area at the center of one segment, two blocks of P
The PCM signal subjected to recording processing is recorded in an area having a length of 128 blocks excluding the run-in section of LL. This PCM signal is data corresponding to an audio signal during two rotations of the rotary head.

This PCM signal consists of a two-channel stereo PCM signal consisting of an L (left) channel and an R (right) channel and parity data of an error detection/correction code. Third
When one segment shown in FIG. A is recorded/reproduced by the magnetic head 2A, data Le is recorded in the left half of the PCM signal recording area, and data R is recorded in the right half.

is recorded. Data Le consists of even-numbered data on the L channel and parity data regarding this data, and data RO consists of odd-numbered data on the R channel and parity data regarding this data. The odd number and even number are the order counted from the beginning of the interleaved block.

The track formed by the other magnetic head has the same configuration as the one track described above, and one segment of data is recorded thereon. In the data section of one segment of data on this other track, data Re is placed in the left half.
is recorded, and data Lo is recorded in the right half. Data Re consists of even-numbered data of the R channel and parity data regarding this data. Data Lo consists of odd-numbered data of the L channel and parity data regarding this data. In this way, recording the even-numbered data and odd-numbered data of each channel separately on two adjacent tracks, and recording the L channel and R channel data on the same track is a method such as dropout etc. This is to prevent errors in consecutive data on the same channel.

FIG. 3B shows the data structure of one block of the PCM signal. An 8-bit (1 symbol) block synchronization signal is added to the beginning of one block, followed by an 8-bit PCM-ID.
is added. A block address is added next to PCM1D. Simple parity error correction encoding processing is performed on the two symbols (W1 and W2) of the PCM-ID and block address, and 8-bit parity is added next to the block address. The block address is the most significant bit (MSB) as shown in the third diagram.
The most significant bit is “
0'' indicates that it is a PCM block.

The 7-bit block address is (00) to (7F) (1
(in hexadecimal). Lower 3 of block address
The bit is (OOO) (010) (100) (1
10) The PCM-ID to be recorded in each block is determined. The lower 3 bits of the block address are (00
Each block address of 1) (011) (101) (111) can record an optional code of PCM-ID. The PCM-ID includes 2-bit ID1 to ID8 and a 4-bit frame address. Identification information is defined for each of 101 to ID7. A pack is made up of 32 108's. For example, IDI is a format ID. IDI identifies whether it is for audio or other purposes, ID2 identifies pre-emphasis on/off and pre-emphasis characteristics, and ID3 identifies the sampling frequency. .

The ID1 to ID7 and the frame address described above are the same data in the segments of the interleave pair.

FIG. 3C shows the data structure of one block of subcode. It has the same data structure as the PCM block described above. As shown in FIG. 3, the most significant bit of the symbol W2 of the subcode block is set to "l", indicating that it is a subcode block.
The bits are used as a block address, and the 8 bits of symbol w1 and the 3 bits excluding the MSB and block address in symbol W2 are used as a subcode ID.

2 symbols of subcode block (W 1 and W2)
Regarding the data, simple parity error correction encoding processing is performed and 8-bit parity is added.

Subcodes tD are those recorded at even numbered block addresses (the LSB (least significant bit) of the block address is “O”) and those recorded at the odd numbered positions (LSB of the block address is “1”). The data are said to be different. The subcode ID includes a control ID that specifies a reproduction method, a time code, and the like. The subcode data is subjected to error correction code processing using a Reed-Solomon code similarly to the PCM data.

C. Error correction code of digital tape recorder Error detection/correction code processing is performed for each 128 block of data recorded in one segment. Figure 4A is
The code structure of data recorded by one magnetic head 2A is shown, and FIG. 4B shows the code structure of data recorded by the other magnetic head 2B. Quantization bit number is 1
A 6-bit PCM signal consists of upper 8 bits and lower 8 bits.
The error detection/correction code is encoded using 8 bits as one symbol.

Data of (12BX32=4096 symbols) is recorded in one segment. As shown in Figure 4A, (L
O, L2. ... L 1438) even-numbered data Le of the L channel and (Rl,
The error detection code C1 and the error correction code C2 are encoded in the vertical and horizontal directions of the two-dimensional array of data consisting of the odd-numbered data Ro of the R channel (R3, . . . -R1439). The 28 symbols in the vertical direction are encoded with a CI code using a (32, 28, 5) Reed-Solomon code. Parity data P of four symbols of this CI code is arranged at the last position of the two-dimensional array. Further, 52 symbols in the horizontal direction are encoded with a C2 code using a (32, 26, 7) Reed-Solomon code. This C2 code is 5
This is done for every 26 symbols of 2 symbols, and parity data Q consisting of 6 symbols is generated for one code sequence. Parity data Q consisting of a total of 12 symbols of C2 code is arranged at the center of the two-dimensional array. The other 52 PCM data symbols located in the horizontal direction are similarly encoded with the 02 code, and their parity data Q is placed in the center.

The code configuration shown in FIG. 4B converts the even-numbered PCM signal of the L channel into the even-numbered PCM signal (RO) of the R channel in the code configuration of FIG. 4A.

R2, . . . R143B), and the odd-numbered PCM signals of the R channel are replaced by the odd-numbered PCM signals of the L channel (Ll, L3, . . . L1439).

As shown in FIG. 3B, for the 32 symbols arranged vertically in these code configurations, the synchronization signal,
One PCM block is configured by adding rD, block address, and parity.

d. Reproduction Signal Processing Circuit The present invention is applied to processing reproduction data during variable speed reproduction in the reproduction signal processing circuit 18 of the above-mentioned rotary head type digital tape recorder. FIG. 5 shows the configuration of the reproduced signal processing circuit 18, in which a reproduced signal is supplied to an input terminal indicated by 31.

The reproduced signal is supplied to the demodulation circuit 32, and one symbol 10
The bits are demodulated into 8 bits per symbol. When recording on the magnetic tape 3, the 8 bits of the ■ symbol are subjected to digital modulation processing in which they are converted into a preferred pattern of 10 bits in order to reduce the low-frequency components as much as possible.

The reproduced data from the demodulation circuit 32 is transferred to the data register 33.
and is supplied to the data bus 35 symbol by symbol via the buffer 34.

A buffer RAM 36 and an error correction circuit 37 are coupled to the data bus 35 . Reproduction data is taken from the data bus 35 into the buffer RAM 36, and in the error correction circuit 37, the data stored in the buffer RAM 36 is subjected to error correction processing (C1 decoding and C2 decoding) using Reed-Solomon codes. The error-corrected PCM signal is supplied to the interpolation circuit 3, and uncorrectable errors are interpolated, and a reproduced PCM signal is taken out to the output terminal 39. This reproduced PCM signal is supplied to the D/A converter 19 (see FIG. 1).

In addition, the subcode is processed by a subcode decoder (not shown)
The signal undergoes processing such as error correction, and is output to the subcode output terminal.

Further, a block address detection circuit 40 is provided in association with the demodulation circuit 32. Block address detection circuit 4
0 reads the playback block address. The reproduction block address is supplied to the reproduction address generation circuit 41. A reproduction address generated by a reproduction address generation circuit 41 is supplied to an address bus 42. The reproduced address sent via the address bus 42 is used as an address signal for the buffer RAM 36. The reproduction block address is an address for sequentially writing reproduction data of one segment (32 symbols x 128 blocks) (see FIG. 4) block by block from the 1st block to the 128th block.

43 is an address generation circuit for ECC (error correction circuit). The address generated by the ECC address generation circuit 43 is sent to the buffer RAM 3 via the address bus 42.
6. ECC address is C1 decoding and C
These are an address for reading data from the buffer RAM 36 for each of the two decodings, and an address for writing error-corrected data and a pointer to the buffer RAM 36.

At the time of C1 decoding, the CI series data (PCM signal and parity data P) previously written according to the reproduction address is read out from the buffer RAM 36 block by block, error corrected in the error correction circuit 37,
The corrected PCM signal and Cl pointer are stored in buffer RAM3.
6 is written to the same block address. The C1 pointer is written to the memory area where parity P was written. This error correction process is performed for all C1 sequences. The ECC address generation circuit 43 generates a read address and a write address in the above-mentioned C1 decoding. During C2 decoding, the C1 decoded PCM signal, Cl pointer, and parity data Q are read out every 02 series, and subjected to C2 decoding processing in the error correction circuit 37. The PCM signal and C2 pointer error-corrected by C2 decoding are stored in buffer RAM3.
6 is written. Also in this C2 decoding, the required read address and write address are generated by the ECC address generation circuit 43.

The PCM signals for which C1 decoding and C2 decoding have been completed are read out from the buffer RAM 36 in the original order.

In this case, the error-corrected P
A two-channel stereo signal is formed by the CM signal. P from buffer RAM3 G with error correction
In order to read the CM signal, the D/A address generation circuit 4
4 is provided.

The address generated by the D/A address generation circuit 44 is supplied to the buffer RAM 36 via the address bus 42, and the PCM signal read from the buffer RAM 36 is supplied to the interpolation circuit 38.

Further, the PCM-ID or subcode ID (Wl), block address (W2), and parity obtained from the demodulation circuit 32 are supplied to the error detection circuit 45, and error detection using simple parity is performed in the error detection circuit 45. be exposed. This error detection circuit 45 generates an error pulse indicating the presence or absence of an error. This error pulse becomes "1" when there is an error, and becomes "0" when there is no error.The error pulse is supplied to the counter 46.The counter 46 receives the error pulse, which becomes "O" when there is no error. Count for one segment of playback data.

The count value of the counter 46 is determined by the comparison circuit 47 and the register 48.
supplied to The count value of the counter 46 for one segment of reproduced data reproduced by the magnetic head 2A is taken into the register 48, and then the count value of the counter 46 and the register 48 for the reproduced data of the l segment reproduced by the magnetic head 2B. The count value of comparison circuit 4
7 is compared. In the comparator circuit 47, these count values are compared and a 1-bit comparison output signal corresponding to the magnitude of the count value is generated. This comparison output signal is supplied to an interpolation control circuit 49. The interpolation control circuit 49 is supplied with a reproduction mode determination signal from a terminal 50 . Further, timing signals LRCK and A/Bid generated in the D/A address generation circuit 44 are supplied to an interpolation control circuit 49.

Interpolation control circuit 49 generates an interpolation control signal for interpolation circuit 38. The interpolation circuit 38 performs average value interpolation, previous value hold, etc. for the word of the PCM signal that cannot be error corrected and is specified by the pointer among the PCM signals that have undergone error correction processing. Interpolation control circuit 4
For PCM signals for which the interpolation control signal from 9 is, for example, l'', the interpolation operation is forcibly performed. In other words, 6
The reproduced data with the worse error condition is interpolated between the reproduced data from the magnetic head 2A and the reproduced data from the magnetic head 2B, regardless of the pointer. Based on the reproduction mode determination signal, an interpolation control signal is generated that forces an interpolation operation only during high-speed reproduction such as double-speed reproduction or triple-speed reproduction.

The operation of the embodiment of the invention described above will be explained with reference to FIG. 6A and 6B are timing signals LRCK and A/Bid synchronized with the PCM signal supplied to the interpolation circuit 38. FIG. The timing signal LRCK is the sixth
As shown in Figure A, it is synchronized with the data of each channel of the stereo signal during normal playback. Also, the timing signal A
/Bid is a signal for distinguishing between the reproduced data of the magnetic heads 2A and 2B.

As shown in FIG. 4A, the magnetic head 2A records/reproduces even-numbered data Le on the L channel and odd-numbered data Ro on the R channel, and as shown in FIG. 4B,
The magnetic head 2B receives even-numbered data R of the R channel.
Record/reproduce odd-numbered data LO of e and L channels. Therefore, the timing signal A shown in FIG.
The period when /Bid is "0" is the period of reproduction data of the magnetic head 2A, and the period when the timing signal A/Bid is "1" is the period of reproduction data of the magnetic head 2B.

The interpolation control circuit 49 generates an interpolation control signal shown in FIG. 6C or FIG. When the comparison output signal of the comparison circuit 47 indicates that the error state of the data reproduced by the magnetic head 2A is better than that of the data reproduced by the magnetic head 2B, the interpolation control shown in FIG. 6C is performed. A signal is formed. In other words, the PCM signal reproduced by the magnetic head 2B (RO, Ll, R2°L3・
...), the interpolation control signal becomes "1", and this PC
The M signal is interpolated. On the other hand, if the reproduced data of the magnetic head 2B has a better error state than the reproduced data of the magnetic head 2A, as shown in Figure 6, the PCM signal (R1 ,L2.R3
, L4...), an interpolation control signal that becomes "1" is generated. This interpolation control signal interpolates the PCM signal reproduced by the magnetic herad 2A.

Unlike the above embodiment, the C1 pointer generated by C1 decoding may be used instead of using the parity check result to determine the error state of the reproduced data of the magnetic heads 2A and 2B. The present invention is also applicable to the case where each block of recorded data has a data structure in which errors can be detected using a CRC code. Furthermore, the error state of the reproduction signal of the magnetic head may be determined from the envelope of the reproduction signal of the magnetic head.

〔Effect of the invention〕

According to this invention, when PCM signals are interleaved over two tracks, abnormal playback sound is generated because the playback data of the wrong interleaved bear is synthesized when the tracks are intermittently played back. can be prevented.

[Brief explanation of drawings]

FIG. 1 shows the overall configuration of a rotary head type digital tape recorder to which the present invention can be applied.
Figure 2 is a route map showing the tape format of a digital tape recorder, Figure 3 is a route map used to explain the track format and block format of a digital tape recorder, and Figure 4 is an error correction code for a digital tape recorder. FIG. 5 is a block diagram of the main parts of an embodiment of this invention, FIG. 6 is a time chart used to explain the operation of an embodiment of this invention, and FIG. 7 is a double-speed playback operation. and a route map used to explain the triple speed playback operation. Explanation of main symbols in the drawings: 1 Ni drum, 2A, 2B: magnetic head, 3: magnetic tape, 13: recording signal processing circuit, 18: reproduction signal processing circuit, 32: demodulation circuit, 34: bath sofa, 35: data path, 36: Bathophore RAM,
37: Error correction circuit, 38: Interpolation circuit, 40
Ni block address detection circuit, 45; error detection circuit, 47: comparison circuit, 49: interpolation control circuit.

Claims (1)

[Scope of Claims] An error correction code is encoded on the PCM signal recorded on each of the tracks formed diagonally on the magnetic tape, and the PCM signal is encoded on each of the two adjacent tracks. In a rotary head type digital tape recorder that alternately reproduces interleaved recorded signals by a pair of rotary heads, the magnetic tape is run at a faster speed than during recording, and the tracks are intermittently reproduced. At the time of reproduction, using a determining means for determining an error state of the first reproduced data and an error state of the second reproduced data respectively reproduced by the pair of rotary heads, and an output signal of the determining means,
Means for validating one of the first and second reproduced data having a better error state, invalidating the other reproduced data, and interpolating the missing PCM signal using the one reproduced data. A rotary head type digital tape recorder characterized by: