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JPS62143489A - Semiconductor laser - Google Patents

Semiconductor laser

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Publication number
JPS62143489A
JPS62143489A JP28285385A JP28285385A JPS62143489A JP S62143489 A JPS62143489 A JP S62143489A JP 28285385 A JP28285385 A JP 28285385A JP 28285385 A JP28285385 A JP 28285385A JP S62143489 A JPS62143489 A JP S62143489A
Authority
JP
Japan
Prior art keywords
layer
type
buried
ion implantation
grown
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28285385A
Other languages
Japanese (ja)
Inventor
Akio Oishi
大石 昭夫
Takaro Kuroda
崇郎 黒田
Shinji Tsuji
伸二 辻
Motonao Hirao
平尾 元尚
Hiroyoshi Matsumura
宏善 松村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP28285385A priority Critical patent/JPS62143489A/en
Publication of JPS62143489A publication Critical patent/JPS62143489A/en
Priority to US07/325,123 priority patent/US4905057A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To easily form a current blocking layer with sufficient controllability, in the deep part of crystal layer, by performing ion implantation in a buried- growth layer to form a current blocking layer after a mesa containing an active layer is buried with the same conduction type layer and is grown. CONSTITUTION:After an InGaAsP active layer and a P-type InP clad layer 6 are grown on an N-type InP substrate, a whole part is eliminated by etching, while the active layer of 0.5-2mum thick is left thereon. Then the whole part containing a mesa is buried with a P-type InP layer, and an InGaAsP cap layer is grown on its surface. Ion implantation of S, Se or Si is performed excepting the part to be a current path, and an N-type InP layer is formed by an annealing treatment. Comparing with a burying structure wherein a P-type layer and an N-type layer are selectively grown on the both sides of a mesa in the time of buried-growth, a current blocking layer can be easily formed thereby. It is also easily achieved to form an N-type layer in a P-type layer applying ion implantation.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は埋込み型半導体レーザに係り、特に制御性のよ
い製法を導入するに適したものに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a buried semiconductor laser, and particularly to one suitable for introducing a manufacturing method with good controllability.

〔発明の背景〕[Background of the invention]

活性層を1回目の成長で形成し電流流路部具外を除去し
、その周囲を電流阻止層を含めて埋込み成長する埋込み
構造半導体レーザにおいては、活性層を含むメサ両側へ
p型、n型電流阻止層を選択成長することが必要である
が、この時各層の成長形状や厚みの制御性に問題があっ
た6 (北村他、昭和60年度電子通信学会半導体・材
料部門全国大会予稿第314番参照)。
In a buried structure semiconductor laser in which an active layer is formed in the first growth, the outside of the current flow path is removed, and the surrounding area is buried and grown, including a current blocking layer, p-type, n-type, and It is necessary to selectively grow a type current blocking layer, but at this time there were problems in controlling the growth shape and thickness of each layer6 (Kitamura et al., 1985 IEICE Semiconductor and Materials Division National Conference Proceedings, Vol. (See number 314).

〔発明の目的〕[Purpose of the invention]

本発明の目的は選択成長を用いて、イオン注入法を用い
て埋込み構造レーザの電流阻止層を得ることにより1、
制御性良く電流阻止層を形成し、高温、高出力動作が可
能な埋込み型半導体レーザを提供することにある。
The purpose of the present invention is to obtain a current blocking layer of a buried structure laser by using selective growth and ion implantation method.
An object of the present invention is to provide a buried semiconductor laser in which a current blocking layer is formed with good controllability and is capable of high temperature and high output operation.

〔発明の概要〕[Summary of the invention]

本目的を達成するためには、活性層を含むメサを同一導
伝型層で埋込み成長した後に、埋込み成長層内にイオン
打込みを行い電流阻止層を形成すれば良い。特にI M
 e V以上の高エネルギーイオン打込みを行うことに
より、結晶層内の深い位置に電流阻止層を容易に制御性
良く形成することができる。
In order to achieve this object, after a mesa including an active layer is buried and grown with a layer of the same conductivity type, ions may be implanted into the buried growth layer to form a current blocking layer. Especially IM
By performing high-energy ion implantation of eV or higher, a current blocking layer can be easily formed at a deep position within the crystal layer with good controllability.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の詳細な説明する。 The present invention will be explained in detail below.

実施例1 本発明の一実施例を第1図により説明する。第1図にお
いて1はn型InP基板、2はp型InP埋込み成長層
、3はS(イオン)または、Ss(セレン)またはSi
(ケイ素)イオン打込み後アニール処理することにより
2のp型InP層中に形成したn型層nP層、4はIn
GaAsPキャップ層、5は活性層、6はP型InPク
ラッド層を示す。本実施例に示したレーザ構造は、まず
n型InP基板上にInGaAsP活性層、p型層nP
クラッド層6を成長した後、活性層幅0.5〜2μmを
残して他の部分をエツチングにより除去し、メサを含め
て全体をp型層nP層で埋込み、表面にInGaAsP
キャップ層を成長し、電流流路となる部分を除いてS、
SsまたはSLイオン打込みを行いアニール処理するこ
とによりn型層nP層を形成することにより得られる。
Example 1 An example of the present invention will be described with reference to FIG. In FIG. 1, 1 is an n-type InP substrate, 2 is a p-type InP buried growth layer, and 3 is S (ion), Ss (selenium), or Si.
An n-type layer (nP layer) formed in the p-type InP layer 2 by annealing after (silicon) ion implantation; 4 is an InP layer;
A GaAsP cap layer, 5 an active layer, and 6 a P-type InP cladding layer. The laser structure shown in this example first consists of an InGaAsP active layer, a p-type nP layer, and an InGaAsP active layer on an n-type InP substrate.
After growing the cladding layer 6, the active layer width is 0.5 to 2 μm and the other parts are removed by etching, the entire area including the mesa is buried with a p-type nP layer, and the surface is covered with InGaAsP.
Grow the cap layer, S except for the part that will become the current flow path,
It is obtained by forming an n-type layer nP layer by performing Ss or SL ion implantation and annealing.

本実施例によれば埋込み成長時にPsn型両層を選択成
長によりメサ両側に成長する従来の理込み構造に較べ容
易に電流阻止層を形成することができる。またイオン打
込みを用いることにより従来の拡散法では困雅であった
p型層中へのn型層の形成が容易に行うことができた。
According to this embodiment, the current blocking layer can be formed more easily than in the conventional implanted structure in which both Psn type layers are selectively grown on both sides of the mesa during buried growth. Furthermore, by using ion implantation, it was possible to easily form an n-type layer in a p-type layer, which was difficult to do using conventional diffusion methods.

なお、本実施例において、n型層の厚みは少なくとも1
μm以上とすることが望ましい。これは活性層と表面層
の距離を1.5μm以上とし、加えて充分な電流狭窄効
果を得るため2層の接続部を0.5μm以下とするため
である。活性層と表面層の距離を1.5μm以上とする
のは、表面層上に形成する電極によるストレスや金属拡
散の影響によるレーザの寿命の低下を避けるためである
In this example, the thickness of the n-type layer is at least 1
It is desirable that the thickness be µm or more. This is because the distance between the active layer and the surface layer is 1.5 .mu.m or more, and in addition, the connection between the two layers is 0.5 .mu.m or less in order to obtain a sufficient current confinement effect. The reason why the distance between the active layer and the surface layer is set to 1.5 μm or more is to avoid shortening the life of the laser due to stress caused by electrodes formed on the surface layer or the influence of metal diffusion.

そのためには、SLイオンをInPに打込む場合で約I
 M e V以上の高エネルギーでイオン打込みを行う
ことが必要である。
For this purpose, when implanting SL ions into InP, approximately I
It is necessary to perform ion implantation at high energy of M e V or higher.

本実施例はn型基板を用いた構造を示したが、p型基板
を用いても同様の効果が得られる。この場合図1に示し
た各層の導電型はそれぞれ逆の導電型となる。またp型
層となる層3の打込むイオンとしてはZn、Cd、Be
、Mg等を用いる。
Although this embodiment shows a structure using an n-type substrate, similar effects can be obtained using a p-type substrate. In this case, the conductivity types of each layer shown in FIG. 1 are opposite to each other. In addition, the ions to be implanted into layer 3, which will become a p-type layer, include Zn, Cd, and Be.
, Mg, etc. are used.

また、本実施例はInP基板上のInGaAsP系レー
ザについて説明したが、G a A s基板上のAZG
 a A s系やG a A s基板上の(As)系の
レーザにも同様に用いることができる。
In addition, although this example describes an InGaAsP laser on an InP substrate, an AZG laser on a GaAs substrate
It can be similarly used for an aAs-based laser or an (As)-based laser on a GaAs substrate.

実施例2 第2図に本発明によるレーザ構造の一実施例を示す。1
〜6の各層および作製方法は実施例1の場合と同様であ
る。異なる点は層2のp型層nP層のキャリア密度と層
3のイオン打込みによるn型層nP層のドーズ量、打込
みエネルギーを調整することによりn型層 n P J
?? 3をP型層nP層2の中に島状に形成したことで
ある。−例としては、p型層nP中にSiを2.7 M
 e Vで打込むと深さ2μm近傍にピークを有する不
純物分布が得られる。ドーズ量をI X 10 ”at
om/ dとした時の不拘濃度分布を図3に示す。P型
層nP層2のキャリア濃度を5 X 1017cm−”
にすると、深さ1.7〜2.3μmの領域がn層に反転
し島状のn型層 n P M 3が得られる。この時、
充分な電流狭窄効果を得るためには、活性層5と層3が
接触せず、加えて活性層5と層3の距離を1μm以下に
することが望ましい。また、電流阻止層に充分な1圧を
持たせるために層3の厚みは0.5μm以上とすること
が望ましい。本実施例によれば、選択埋込み成長も行う
ことなしに、容易に同様の構造を得ることができ、高温
、高出力動作可能なレーザを容易に形成できる。
Embodiment 2 FIG. 2 shows an embodiment of a laser structure according to the present invention. 1
The layers and the manufacturing method in Examples 1 to 6 are the same as in Example 1. The difference is that by adjusting the carrier density of the p-type layer nP layer of layer 2, the dose of the n-type layer nP layer by ion implantation of layer 3, and the implantation energy, the n-type layer nP J
? ? 3 is formed in the form of an island within the P-type layer nP layer 2. - For example, 2.7 M Si in the p-type layer nP
When implanted at eV, an impurity distribution having a peak near a depth of 2 μm is obtained. The dose is I x 10” at
Figure 3 shows the unconstrained concentration distribution when om/d. The carrier concentration of the P-type layer nP layer 2 is 5 x 1017 cm-”
When this is done, the region with a depth of 1.7 to 2.3 μm is inverted to the n-layer, and an island-shaped n-type layer n P M 3 is obtained. At this time,
In order to obtain a sufficient current confinement effect, it is desirable that the active layer 5 and layer 3 do not contact each other, and in addition, the distance between the active layer 5 and layer 3 is 1 μm or less. Further, in order to provide the current blocking layer with a sufficient voltage of 1, the thickness of the layer 3 is desirably 0.5 μm or more. According to this embodiment, a similar structure can be easily obtained without performing selective buried growth, and a laser capable of high-temperature, high-output operation can be easily formed.

なお、本実施は実施例1と同様にp型InP基板を有す
る半導体レーザや、G a A s基板を始めとした■
−■族の化合物または混晶基板を有する埋込み型半導体
レーザ一般に用いることが可能である。
Note that, like in Example 1, this embodiment uses a semiconductor laser having a p-type InP substrate, a GaAs substrate, etc.
-It can be used in general buried type semiconductor lasers having group compound or mixed crystal substrates.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、埋込み型半導体レーザにおいてメサ両
側へのPan層の選択成長を行うことな ・しに1μm
以上の深さに3μm以下の狭い電流流路を有する電流狭
窄層を容易に形成することができ、ウェハ全面に均一性
が良く、耐圧の高い電流狭窄層を得ることができる。こ
のため、本発明によればウェハ内でのしきい値電流およ
び電流阻止層の耐圧の分散を20%以上小さくすること
ができる。
According to the present invention, in a buried semiconductor laser, it is possible to selectively grow a Pan layer on both sides of a mesa to a thickness of 1 μm.
A current confinement layer having a narrow current flow path of 3 μm or less at the above depth can be easily formed, and a current confinement layer with good uniformity and high breakdown voltage can be obtained over the entire wafer surface. Therefore, according to the present invention, the dispersion of the threshold current and the breakdown voltage of the current blocking layer within the wafer can be reduced by 20% or more.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はレーザ構造の断面図、第2図はレーザ構造の断
面図、第3図はInP層中へのSi打込みを行ったとき
の不純物濃度と深さの関係を示す図である。 1・・・n型InP基板、2・・・p型層nP層、3・
・・イオン打込みにより形成されたn型層nP層、4・
・・InGaAsPキャップ層、5−InGaAsP活
性層、6−p第 1 (2) 石 2 図
FIG. 1 is a sectional view of the laser structure, FIG. 2 is a sectional view of the laser structure, and FIG. 3 is a diagram showing the relationship between impurity concentration and depth when Si is implanted into an InP layer. 1... n-type InP substrate, 2... p-type layer nP layer, 3...
... n-type layer nP layer formed by ion implantation, 4.
...InGaAsP cap layer, 5-InGaAsP active layer, 6-p 1st (2) Stone 2 Figure

Claims (1)

【特許請求の範囲】 1、活性層の周囲を活性層より屈折率の小さい結晶で埋
込んだ埋込み型半導体レーザにおいて、該結晶中に、イ
オン打込み法による半導体層を形成することにより電流
阻止層となるPm接合を設けたことを特徴とする半導体
レーザ。 2、上記イオン打込み法を1MeV以上の高エネルギー
のイオン打込み方法とすることにより、1μm以上の深
い結晶中にPm接合を形成したことを特徴とする特許請
求の範囲第1項記載の半導体レーザ。 3、上記イオン打込み法による半導体層が、上記結晶中
に島状に形成されていることを特徴とする特許請求の範
囲第1もしくは2項に記載の半導体レーザ。
[Claims] 1. In a buried semiconductor laser in which the active layer is surrounded by a crystal whose refractive index is smaller than that of the active layer, a current blocking layer is formed by forming a semiconductor layer in the crystal by ion implantation. A semiconductor laser characterized by having a Pm junction. 2. The semiconductor laser according to claim 1, wherein the ion implantation method is a high energy ion implantation method of 1 MeV or more to form a Pm junction in a deep crystal of 1 μm or more. 3. The semiconductor laser according to claim 1 or 2, wherein the semiconductor layer formed by the ion implantation method is formed in the form of an island in the crystal.
JP28285385A 1985-12-18 1985-12-18 Semiconductor laser Pending JPS62143489A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP28285385A JPS62143489A (en) 1985-12-18 1985-12-18 Semiconductor laser
US07/325,123 US4905057A (en) 1985-12-18 1989-03-17 Semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28285385A JPS62143489A (en) 1985-12-18 1985-12-18 Semiconductor laser

Publications (1)

Publication Number Publication Date
JPS62143489A true JPS62143489A (en) 1987-06-26

Family

ID=17657918

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28285385A Pending JPS62143489A (en) 1985-12-18 1985-12-18 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPS62143489A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006100369A (en) * 2004-09-28 2006-04-13 Sharp Corp Semiconductor laser device and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006100369A (en) * 2004-09-28 2006-04-13 Sharp Corp Semiconductor laser device and its manufacturing method

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