JPS6180294A - Multiscreen display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a multi-screen display device that displays a plurality of screens in an overlapping manner.

[Technical background of the invention]

One of the image display methods is a method in which a plurality of screens are displayed in an overlapping manner according to their priority order, so-called overlay display. Figure 5 shows three screens (A).

This shows the case where (B) and (2) are displayed in an O-Gray display.The display priority is highest on screen (A), next on screen (B), and lowest on screen). Indicate the case.

In this overlay display, the screen with the highest priority is displayed at the top, and the screen with the highest priority is displayed. If all screens are transparent, the background color is displayed. This background color display □ is, for example, a black screen (display of odor. Note that each screen (A)
# (B).

The transparent designation (D) is generally made for each pixel on the screen.

FIG. 6 shows the configuration of a conventional multi-screen display device.

In the figure, 11 to 13 are screens (A), respectively.

(B) , 01) image data DA, D, , D
This is an image data generation circuit that generates D. 14 is a timing generation circuit that generates a horizontal synchronization signal HD and a vertical synchronization signal VD for rask scanning. Image data D in image data generation circuits 11-13.

The generation of DI and DD is controlled by control signals s, , Slssm outputted from the timing generation circuit 14, and are generated one dot at a time in synchronization with the raster gyan.

Image data DA, DB, and DD in units of one pixel are luminance data Y and three color data R and G of red, green, and blue.

Consists of B. Here, image data CR*G*B
5y=o, o, o, o) is data that displays black with reduced brightness, and this display corresponds to transparent. Image data [:R,G,B,Y=0.0,0.1]
is a pig that displays black with increased brightness. Since actual black is displayed with increased brightness, the image data for displaying black is [R.

G, B, Y=0.0,0,1). In this case, the other image data [R, G, B, Y=0.0IO1
0] is used to specify transparency.

(However, image data other than this image data may be used for transparent designation.) That is, the image data generation circuit 11-13 generates image data D□, D, , D
In addition to the generation of D, when all four pits of the image data are '0', transparent designation data (a) l (b), (d) of '1', for example, is output. This transparent specification data (a) I (b) l (
When d) is '1', the pixel is not displayed.

Figure 7 is a diagram showing a truth table for transformer 4 arent designation when the priority is A:) B:) D (here, the symbol :〉 indicates that the left side has a higher priority than the right side). . The display mode indicates that all transparent specification data is '0#', all screens (~e (e) e) is not transparent. In this case,
Both sides (A) having the highest priority are displayed. That is, in FIG. 6, when transparent designation data (a) given as a control signal is '01, selector 15 selects image data D from among image data DA and DB. Furthermore, when the transparent designation data (a) and (b) given as control signals via the AND circuit 17 are 0'', the selector 16 outputs the image data DA from the selector 15 and the image data DD from the image data generation circuit 13. Of these, the former is selected. Therefore, the image data DA is output from the selector 16, and the image is displayed accordingly.Similarly, when the image data DA is designated as transparent, the image data DIl The image data DA,
When D is specified as transparent, the image data DD
is displayed. When all of the image data DA, Dm, and DD are designated as transparent, the output of the AND circuit 18 becomes '1'. At this time, the NOR circuit 19 is given a signal S4 of '1#' from the timing generation circuit 14. Therefore, the output of the NOR circuit 19 varies from 1" to '
Changes to 0#. As a result, the AND circuits 20 to 22 close the dart, and the level of the terminals 24.25°26 becomes @'0''
becomes. The terminal 27 provided in the OR circuit 23 to which the output of the NOR circuit 19 is given as a negative input becomes 1" level. As a result, the black image data (R, G, B, Y=0
．． 0,0.1) and a black background is displayed.

[Problems with background technology]

In the conventional multi-screen display device described above, the screen (A)
, (B), O)), the microprocessor MPU exchanges image data between the image data storage image RAMs provided in each image data generation circuit 11, 12.13. Ta. That is,
When changing the priority order from the priority order shown in FIG. 7 to D:>B:>A, the microprocessor 28 first transfers the image data D to the 1-work RAM, and then transfers the image data DD to the image data DA. Transfer to the stored image RAM,
Next, the image data DA stored in the work RAM is transferred to the image RAM in which the image RAM DD was stored.

However, in this configuration in which the priority order is changed by exchanging data in the image RAM, the priority order cannot be changed instantaneously, and there is a problem that the displayed image deteriorates during the priority order change operation.

[Purpose of the invention]

The present invention was made in order to cope with the above-mentioned circumstances, and an object of the present invention is to provide a multi-screen display device that can instantly change the priority order.

[Summary of the invention]

This invention fixes data in a memory that stores image data, outputs priority designation data that shows different values depending on the type of priority, and selects one of multiple screens according to this and transparent designation data. 1. To selectively display image data on one screen. It is something that

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention. In FIG. 1, the same parts as in FIG. 6 are given the same reference numerals.

In the figure, the microprocessor 31 is displayed on screen (A) #(
B) Output priority order designation data DP that can set a plurality of different priorities for 1(2).

The screen selection signal generation circuit 32 has a register, which will be described in detail later, and this register contains the microprocessor 3.
Priority designation data DP output from 1 is given via the data bus. This screen selection signal generation circuit 32 also includes transparent designation data 6L),
(b).

(d) is given. This screen selection signal generation circuit 3
2 is a screen for selecting image data of any one of the screens (~, (B), O) according to the priority order designation data DP and the transparent designation data (a), (b) e (d). Selection signal AIf #BI
Output IW I DBw. Here, the screen selection signal A
gw I B8W ID13w each image data r
), , D, , DD.

The image data selection circuit 33 receives the screen selection signal Aswt.
According to Bsw + Dgw, screen (A), (B
), O)) is selected and applied to a dart circuit consisting of AND circuits 20 to 22 and an OR circuit 23.

Like now, three screens (A) e (B) #(2)
When displaying an overlay, there are a maximum of six types of priorities that can be changed, as shown in FIG.

Below, a case will be explained in which all of these six priority orders (1) to (2) are changed.

FIG. 3 shows an example of a specific configuration of the screen selection signal generation circuit 32 shown in FIG. 1. In the figure, a register 321 to which priority designation data D is set by the microprocessor 31 outputs this data DP as 3-pit data. By setting the priority order designation data DP to 3 pits, the above-mentioned 6 types of priority order ■~
■All can be specified. In this case, the data contents corresponding to each priority order ■ to ■ will be as shown in FIG. 2 above.

For example, if data D is 'o, o, o' from the MSB, the priority is ■, that is, A:>B:>D:>.

The screen selection signal generation circuit 32 uses this priority order designation data D.
, and transparent specification data (a).

(b) and (d) are used to perform logical operations as shown in the following equations (1) to (3), and the screen selection signal Aaw*Bsw
t Output Dsw.

AIW = a・(■+■)-1-a-b-d(■+■)
+i fist b ・■＋゛;1゛・d ・■
・・・・・・ (1)B,, = b-(e)-■)+
a-b-d (■10■)-1-a a b・■+b-d・
■...Song (2) D, w=end・(■＋■)10a
-b-7 (■+■)+&ad・■+b-complete・■
(3) Here, each of equations (1) to (3) represents a logical operation for selecting the screen selection signal AaWtBiwsDsw.

Now, considering the display on screen (A), the priority order.

In (2), when screen (A) is not designated as transparent, screen (A) is displayed. This is determined by the first term D・(■+■) on the right side of equation (1), and when the transparent designation data (a) is '0#, the screen selection signal A8W becomes 1'', and the screen (A ) is selected by the image data selection circuit 33.

If screen (A) has the second priority as shown in priority order ■, ■, screen (A) is not designated as a trans ), and screen (A) is displayed when screen 0) is designated as transparent. This is expressed by the third term d·b·■ and the fourth term ad·■ on the right side of equation (1). For priority ■, transparent specification data (a) and (b) are each 'O'.

1#, the screen selection signal Asw becomes '1' and the image data DA is selected.Similarly, in the priority order ■, the transparent designation data (a) l (
d) are respectively 0" and 1", the screen selection signal A8w
becomes "1", and image data DA is selected.

As shown in priority order ■, screen (A) is selected.This is determined by the second term m-bed(
■+■).

That is, in this case, when the transparent designation data (IL) is ``0'' and the data structure (4) are both ``1'', the screen selection signal A11w becomes 1#, and the selection of the image data DA is It will be done.

Here, the logical operation of equation (1) will be explained with reference to FIG. In FIG. 3, a suffix attached to (■) indicates an inverter circuit, a suffix attached to a ring indicates a NAND circuit, and a suffix attached to (O) indicates an AND circuit.

First, to explain the first term d·(■10■) on the right side of equation (1), ■ and ■ are obtained by the NAND circuit N11 t N1m, respectively, and ■+■ are obtained by the NAND circuit N21. By passing this and i obtained from the inverter It1 through the NAND circuit N31, a+(■10■) is obtained. By passing this through the NAND circuit N61,
The above first term i·(■10■) is obtained.

Next, to explain the second term 1-b-d (■+■) on the right-hand side,
■ respectively by NAND circuit N14 + Nta.

Yellow is obtained, and ■10■ is obtained by the NAND circuit N41. By passing this and the output @@bmd of the AND circuit A11 to the NAND circuit N51, (a+b+d)+■・■
is obtained. Is this a Nando circuit? 'The second term mobed(■+■) is obtained by passing it through Jst.

Next, explaining the third term on the right side; ·b·■, ■ is obtained from the NAND circuit N31. This and Nando circuit N? By passing the output a+b of 1 through the OR circuit 01IK, (p-
1-a-1-b is obtained. This is NAND circuit N61
By passing it through, the third term amb·■ is obtained.

Next, explaining the fourth term i-d·■ on the right side, ■ is obtained from the NAND circuit Nts. This and NAND circuit N7. By passing the output a + d through the OR circuit 012,
-1-d is obtained. Is this a Nando circuit? 'By passing it through Jst, the fourth term d, d, and ■ can be obtained.

From the above, the screen selection signal Asw shown in equation (1) above is output from the NAND circuit N11l.

FIG. 4 shows an example of a specific configuration of the image data selection circuit 33. It should be noted that the reference numerals assigned to each component in FIG. 4 are the same as in FIG. 3 above.

In this Fig. 4, when the screen selection signal 'mW becomes 1#,
S/D circuit for screen (4) Nll s N91 wNI
The OI e N11l opens the r-t, and the image data DA of the screen (~, that is, the color data R, G, B, and the luminance data Y are each a NAND circuit?'Jail N111 #N
101 s NAND circuit NIH# N through N11l
tgz # Nl 鵞 m t Given to N124. And this NAND circuit N11l e N112 sN1
23e This is applied to the dart circuit consisting of AND circuits 20, 21, 22 and OR circuit 23 shown in FIG. 1 beyond N1114.

Note that the calculation of the screen selection signal Bsw+Dsw and the image data DIl, D based on these signals BswsDsw
The selection of D is based on the calculation of screen selection signal A8W and this signal A.
Since this is done in the same way as the selection of image data DA by gw, we will omit the explanation here.

In the above configuration, for example, if the priority order of screen selection signal B of equation (2)
8w is output. Therefore, in this case, the seventh
The ammonium water mode shown in the figure is obtained.

As described in detail above, in this embodiment, the data in the image RAM is fixed, and the image data selection circuit 3
3 selection operations can be switched.

According to such a configuration, since the priority order can be changed instantaneously, it is possible to prevent image deterioration due to this change.

In the above explanation, the present invention is applied to a system in which transparency is specified in units of one pixel, but it goes without saying that this invention can also be applied to a system in which transparency is specified in units of multiple pixels. be.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to provide a multi-screen display device that can instantly finish changing the priority order.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention, and FIG.
The figure is a diagram for explaining the operation of FIG. 1, FIG. 3 is a circuit diagram showing an example of a specific configuration of the screen selection signal generation circuit shown in FIG. 1, and FIG. 4 is a diagram for explaining the image data shown in FIG. 1. FIG. 5 is a circuit diagram showing an example of a specific configuration of the selection circuit, FIG. 5 is a diagram for explaining overlay display, FIG. 6 is a circuit diagram showing a conventional multi-screen display device, and FIG. FIG. 3 is a diagram for explaining the operation. 11-13... Image data generation circuit, 14... Timing generation circuit, 18. 20-22... AND circuit,
19...NOR circuit, 23...OR circuit, 31...
Microprocessor, 32... Screen selection signal generation circuit, 33... Image data selection circuit.

Claims (1)

[Scope of Claims] Image data output means that outputs image data of a plurality of screens that are displayed in an overlapping manner; and a transparent device that outputs transparency specification data for specifying the transparency of each of the plurality of screens in units of predetermined pixels. Specification data output means; Priority specification data output means for outputting priority specification data having different values depending on priority types of the plurality of screens; Transparent specification data output from the transparent specification data output means; and image data selection means for selecting image data of any one of the plurality of screens according to the priority order designation data outputted from the priority order designation data output means.