JPS6118045A - Detecting system of program runaway - Google Patents

Abstract

PURPOSE:To detect easily a program runaway by using a counter, etc. and with a reset instruction to decide whether or not the processing time for a prescribed number of instructions to be executed is set within time needed for normal execution of said instructions. CONSTITUTION:An information processor is started and the clocks are supplied to a CPU1 and a counter 4 from a clock generator 3. Then the program of a memory 2 is executed by the CPU1. Thus an instruction of a program instruction area is fetched and executed by the CPU1. Then it is checked whether a counter overflow signal is supplied from the counter 4 or not. When no counter overflow signal is delivered, an instruction is read to the CPU1 out of a program. If this instruction is equal to a counter resetting instruction, the counter 4 is reset. Otherwise the corresponding instruction is processed as usual. Furthermore the generation of the counter overflow signal is checked. When an overflow signal is produced, it is decided that the program processing has an abnormality. Thus an abnormal end of program is decided.

Description

[Detailed description of the invention] 1' Industrial application field] The present invention relates to an improvement in a program runaway detection method.

Data processing in a conventionally known Neumann type computer is performed under the control of a program stored in its main memory.

As long as the program is correctly executing the instruction area in which it is stored, no problems will occur, but if for some reason the program is not executing the instruction area normally, this should be detected as early as possible. It is necessary to keep the range of program errors to a minimum for the normal operation of the computer.

[Conventional technology]

Conventional methods for determining runaway programs include protecting the data area of memory and prohibiting access to that area in instruction load mode, and ensuring that the beginning of the instruction code always starts at a specific address, such as an even address. To do this, there is a method that prohibits access from odd addresses in the instruction load mode.

[Problem that the invention seeks to solve]

However, these methods not only inevitably complicate the required hardware due to the nature of the means for prohibiting access to the area, but also, especially in the latter method, restrictions are imposed on the design of the instruction code set. There is a drawback.

[Means for solving problems]

The present invention provides a program runaway detection method that can solve the above-mentioned technical problem, and the method is to count a predetermined value for each processing unit of the system in an information processing system controlled by a program. means capable of monotonically changing the value and generating a count set value exceeded signal, and a reset instruction placed in the program to reset the means, wherein generation of the count set value exceeded signal causes the program to be terminated. It is designed to detect abnormalities.

[Effect]

According to the method of the present invention, as a means for checking whether the elapsed execution time of a predetermined number of instructions of a program is within the time required for normal execution of those instructions, Since it is configured to include a determination means and a reset instruction, runaway of a program can be detected with simple hardware.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 shows an embodiment of the invention. In this figure, 1
is a central processing unit (hereinafter abbreviated as CPU), to which is connected a memory 2 that stores program instructions (machine language) and data for arithmetic processing therein; The clock output of clock generator 3 is connected. The clock output of the clock generator 3 is connected to the count amplifier 4A of the counter 4. The counter 4 also has a reset input 4B and a counter overflow signal output 4C, which are connected to the CPUI.

In addition to this, a predetermined number within the above program,
For example, a counter reset instruction that returns the counter 4 to the initial setting value, for example, zero, is embedded every 10 instructions, and the JU
A program is stored in the memory 2 with a counter reset instruction embedded before and after an instruction such as an MP instruction or a BRANCH instruction that causes a process outside the sequential execution process of the program's instructions.

How a program runaway is detected under such a configuration will be described below.

When the information processing device enters the operating state and the clock generator 3 supplies the clock (1) to the CP IJ 1 and the counter 4, and the program in the memory 2 starts to be executed on the CPUI, the instructions in the program instruction area are transferred to the CPUI. After the command is fetched and executed, it is checked whether there is a counter overflow signal from the counter 4, and if the counter overflow signal has not arrived (N in step S in Figure 2), the command is executed from within the program. Load it into the CPUI (step S2).

Then, it is checked whether the instruction is a counter reset instruction, and if so (Y in step S3).
) Reset counter 4 (step 34).

If the instruction read into CP [J l is not a counter reset instruction (N in step S3), normal processing of that instruction is performed (step S5).

Step S4. After the process in S5, the process returns to step S1 to check whether a counter overflow signal has arrived or not, and repeats the processing order. However, if a counter overflow signal has been generated (Y in step SI), program processing is performed. Assuming that an abnormality has occurred, the program terminates abnormally (step S6).

For example, the counter 4 is incremented by 1 every 1 clock of the clock generator 3, and a counter reset instruction is embedded in every 10 instructions of the program, so that each instruction is always equal to 1.
Assuming that it completes within 0 clocks, the counter will be 10 if the instructions in the program instruction area are executed normally.
It never exceeds 0. Therefore, if the counter becomes 101 or more, it can be detected that the instructions in the program instruction area are not being executed normally.

Although the example in which the incrementing means of the counter in the above embodiment is a clock generator has been described, it is also possible to use a clock generator which can supply an increment signal to the counter every unit processing time that can measure the elapsed processing time of the program. May be substituted. Further, the counter may be decremented from the initial value.

〔Effect of the invention〕

As described above, according to the present invention, whether or not the processing time of a predetermined number of instructions to be executed is within the time required for normal execution of those instructions is determined by a counter or the like and its reset instruction. Since the configuration is configured to make a determination based on the following, program runaway can be detected using relatively simple hardware.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a flowchart for explaining the operation of the embodiment of FIG. In the figure, I is CP[J, 2 is a memory, 3 is a clock generator, and 4 is a counter.

Claims (4)

[Claims] (1) In an information processing system controlled by a program, a means for monotonically changing a count value by a predetermined value for each processing unit of the system and generating a count set value excess signal, and a means for generating a count value excess signal; A program runaway detection method, comprising: a reset command placed in the program to reset the program; and an abnormality in the program is detected by generation of the count setting value excess signal. (2) The program runaway detection method according to claim 1, wherein the means is a counter that is incremented by a clock of the system. (3) The program runaway detection method according to claim 1 or 2, wherein the reset instruction is provided for each predetermined number of instructions. (4) The reset instruction is placed every predetermined number of instructions before and after an instruction that causes the execution of an instruction that is out of the sequential execution of instructions in the program. A runaway detection method for a program according to the first or second item of the scope.