JPS61175783A - Picture processor - Google Patents

Abstract

PURPOSE:To write the notice area of high image resolution and the whole screen of low image resolution to a picture memory having small capacity of a single picture processor, by providing a thinning degree setting circuit which produces a fixed thinning degree and a thinning circuit which thins the image pickup data sampling clocks in response to said thinning degree and sends those thinned clocks to a processing circuit. CONSTITUTION:The center point (notice point) X of a notice area X1 is set to an area signal producing circuit 2. The circuit 2 sends the distance information based on the point X to a thinning degree setting circuit 4. The circuit 4 set the thinning degree to a thinning circuit 3 in response to the distance from the point X. The circuit 3 thins the image pickup data sampling clocks (c) in response to the thinning degree and produces a write clock (d) to send it to a processing circuit 1. The circuit 1 writes the image pickup data (a) to a picture memory by the clock (d). In such a way, the whole screen shown by an area X5 is written to the picture memory with the image resolution corresponding to the distance from the point X.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing device that performs certain processing on imaged data or an image processing device used in a visual system.

[Conventional technology]

FIG. 2 is a block diagram showing a conventional image processing device.
In the figure, 1 is a processing circuit that performs object recognition, etc., 2 is an area signal generation circuit that generates a signal indicating the area set by the processing circuit 1, and 3 is an imaging data sampling clock C that is set by the processing circuit 1. This is a thinning circuit that thins out data at a thinning level.

FIG. 6 shows the imaging data writing area in the conventional device on the screen, including a horizontal start end address (hereinafter referred to as HL), a horizontal end address (hereinafter referred to as HU), and a vertical start end address (hereinafter referred to as VL). , the area XI surrounded by the vertical end address (hereinafter referred to as ■U) is an area written into the image memory of the processing circuit 1 at a resolution according to the thinning degree set by the processing circuit 1, and other areas Z indicates an area that is not written to the image memory at all.

Next, the operation will be explained.

The processing circuit 1 sets the area X1 surrounded by 7Fres HL, HU, VL, and VU to the area signal generation circuit 2, and the area signal generation circuit 2 returns the area signal S to the processing circuit 1. On the other hand, the processing circuit 1 sets a thinning degree in the thinning circuit 3, and the thinning circuit 3 returns to the processing circuit 1 a write clock d created by thinning out the imaging data sampling clock C. The processing circuit 1 receives the imaged data a according to the area signal S and the write clock d.
is written to its image memory. In this way, as shown in FIG. 6, the area X1 surrounded by HL, HU, VL, and VU is written to the image memory at an arbitrary resolution,
The other area Z is not written to the image memory and becomes an ignored area.

[Problem that the invention seeks to solve]

Conventional image processing devices are configured as described above, so if you use a small-capacity image memory, if you try to write image data at high resolution, there will be an ignored area.
There is a problem in that it cannot respond to changes in the area, and if a perfect screen is to be written, the resolution must be lowered, and it cannot respond to minute changes in the area of interest. To solve this problem, using multiple devices can process a high-resolution region of interest or the entire low-resolution screen, but this increases cost and board area, and a single device is sufficient to process large images. When memory is used, the entire screen can be written at high resolution, but there are problems such as increased cost, increased writing time, and increased data processing time.

This invention was made to solve the above-mentioned problems, and provides an image processing device that can write a high-resolution region of interest and a low-resolution entire screen into a small-capacity image memory of a single device. The purpose is to obtain.

[Means for solving problems]

The image processing device according to the present invention includes a thinning level setting circuit that generates a thinning level or a constant thinning level for areas other than the focused area according to the distance from the focused area, and an image pickup circuit that generates a thinning level depending on the distance from the focused area, or a constant thinning level. A thinning circuit is provided which thins out the data sampling clock and sends the thinned out clock to the processing circuit as a write clock.

[Effect]

In this invention, since the thinning level setting circuit generates a thinning level or a constant thinning level for areas other than the focused area according to the distance from the focused area, the writing clock is used in areas other than the focused area. frequency is lowered and lower resolution data is written to the processing circuit.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows a block configuration of an image processing apparatus according to an embodiment of the present invention, and in the figure, the same reference numerals as in FIG. 2 indicate the same parts. Reference numeral 4 denotes a thinning degree setting circuit that generates a thinning degree according to the distance from the region of interest based on a signal from the area signal generating circuit 2. In this embodiment, the thinning circuit 3 is set by the thinning degree setting circuit 4. The imaging data sampling clock C is thinned out at the thinning level determined, and the thinned out clock is supplied to the processing circuit 1 as the write clock d.

FIG. 3 shows the resolution on the screen of the image processing device according to an embodiment of the present invention, and shows the horizontal center address (hereinafter referred to as HC) and the vertical center address (hereinafter referred to as V
A region X1. X2. X3. X4. X5
Shows the tail.

Next, the operation will be explained.

The processing circuit 1 sets the center point (hereinafter referred to as the point of interest) X of the region of interest X1, which is the intersection of the addresses HC and VC, in the area signal generation circuit 2. The area signal generation circuit 2 sends distance information centered on the point of interest X to the thinning degree setting circuit 4, and the thinning degree setting circuit 4 sets the thinning degree according to the distance from the point of interest Set to . The thinning circuit 3 thins out the imaging data sampling clock C according to the set thinning degree to generate a write clock d, and sends this to the processing circuit 1.

The processing circuit 1 writes the image data a into its image memory using the write clock d. In this way the third
As shown in the figure, the entire screen indicated by area X5 is written into the image memory with the focus point X as the center and the resolution according to the distance.

In this way, in this embodiment, data is written to the image memory at a resolution that corresponds to the distance from the point of interest, so data for the entire screen can be captured in the small capacity memory of a single device. Not only can the region be processed with high resolution, it can also respond to changes outside the region of interest, and since the total amount of data is small, it has the effect of increasing speed and reducing cost. Furthermore, like human vision, areas near the point of interest have a higher resolution, and there is also the effect that processing can be focused on areas near the area of interest to be processed.

In the above embodiment, the image data is written into the image memory at a resolution corresponding to the distance from the point of interest, but as shown in FIG.
A region of interest X1 surrounded by VU may be set, and the resolution may be changed depending on the distance from the frame, and the same effect as in the above embodiment can be achieved.

In addition, in the above embodiment, the thinning dust setting circuit generates thinning dust according to the distance from the region of interest, but it generates a fixed thinning dust for areas other than the region of interest. , as shown in FIG. 5, the entire screen X except the region of interest X1
2 may be made uniform, and this embodiment also has the effect of being able to store the entire screen in a small capacity memory.

In addition, although the above embodiment did not specifically mention the thinning dust in the region of interest, it is sufficient that it is lower than the thinning dust in regions other than the region of interest. It is okay to write .

〔Effect of the invention〕

As described above, according to the image processing device according to the present invention,
The structure is configured so that data is written to the processing circuit in areas other than the area of interest by thinning dust according to the point of interest or the distance from the area of interest, or by thinning dust at a constant rate. This has the effect of being able to write data for the area of interest in high resolution and the entire screen in low resolution.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an image processing device according to an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional image processing device, and FIG. FIGS. 4 and 5 are diagrams showing the resolution of each area of the screen according to another embodiment of the present invention, and FIGS.
The figure is a diagram showing the resolution of each area of a screen by a conventional image processing device. In the figure, 1 is a processing circuit, 2 is a region signal generation circuit, and 3 is a processing circuit.
4 is a thinning circuit, and 4 is a thinning dust setting circuit.

Claims (3)

[Claims] (1) A region signal generation circuit that generates a region signal for setting a point of interest or region of interest (hereinafter referred to as region of interest) in imaging data, and a region other than the region of interest using information from the region signal generation circuit. A thinning degree setting circuit that generates a thinning degree according to the distance from the region of interest or a constant thinning degree, and a sampling clock for imaged data at the thinning degree set by the thinning degree setting circuit. What is claimed is: 1. An image processing apparatus comprising: a decimation circuit that decimates data to generate a write clock; and a processing circuit that stores and processes imaging data using the write clock. (2) The image processing apparatus according to claim 1, wherein the thinning level setting circuit lowers the thinning level as the region of interest approaches. (3) The thinning level setting circuit generates a constant thinning level so that areas other than the area of interest have lower resolution than the area of interest, as set forth in claim 1. image processing device.