JPS61165889A - Multiplex space memory system - Google Patents

Abstract

PURPOSE:To attain unitary application and control by forming a loop-shaped signal transmission line among plural artificial satellites and combining plural space memories which perform delay storage by means of the signal transmission time of said signal transmission line for each space memory and then connecting these space memories in series to form a single space memory. CONSTITUTION:Links are formed between an artificial satellite 1 of the 1st space memory and artificial satellites 4 and 6 of the 2nd space memory. Then a loop signal line is formed among those satellites 1 2 3 1 6 5 4 1. Here a formed delay line has the length (P12+P23+P31+P16+P54+P41). Thus an integrated large space memory is obtained. The carrier frequencies used for transmission/reception of each satellite are changed for each type of the remote side, e.g., four frequencies are used with a 2GHz interval between 16 and 22GHz.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a memory used in an information processing system, etc., and in particular, a memory that utilizes the delay time that occurs when a radio signal propagates in outer space. It relates to spatial memory that performs storage.

[Conventional technology]

The present invention is based on an earlier patent application filed by the same applicant
This is an improvement of the invention disclosed by the present inventor in 72644 (Japanese Patent Laid-Open No. 54-163632) R-Space Memory System.

The invention of the above patent application (hereinafter referred to as the prior invention) is
It uses the long spatial distances that exist between multiple artificial satellites deployed in outer space or artificial stars such as artificial stars as a delay line for radio wave signals, and each artificial wind is equipped with a transmitting and receiving device, It is a spatial memory that stores information by cyclically propagating radio waves by creating a loop-shaped signal transmission path between stars.

Figure 2 schematically shows a specific example.

20 is the earth, 21.22.23 is the sky above the earth 20 35.
It is a geostationary artificial satellite placed at appropriate intervals at a height of 8001 um. Assuming that these satellites are located at the vertices of an equilateral triangle, the length of one side is 6.2X10
'l1m, so the distance around the three sides is 18.6
X 10' km.

When the loop-shaped space thus formed is used as a delay line, the storage capacity is proportional to the delay time of the delay line.

T is the time it takes for the radio signal to go around the delay line.

If the clock pulse interval is to, the maximum storage capacity N
teeth.

N=T/lo (bit)----111---
-----(It becomes 11. Now 10 as a clock pulse
If we take 0ns, the speed of light is 30 x 10' km
/sec.

What is the time T required for one round trip between the artificial satellites 21, 22, and 23 shown in Figure 2?

T = (18,6X10' km) ÷ (30X10'
km) #, 0.62 (sec). Since the clock pulse interval t0 is 100 nanoseconds, t, =too xto-''.

Therefore, the maximum capacity N that can be stored in the delay line between these satellites is N=0.62/100 Xl0-''=6.2 Xl06 from the above equation (1).
(bit), or 6.2 megabytes.

In this way, a spatial memory configured by placing a plurality of satellites on the earth is used for one international computer network, for example, as shown in FIG.

Can provide convenient shared memory.

In FIG. 3, 30 is a spatial memory located in the center;
This is an outer space memory composed of a plurality of artificial satellites shown in FIG. 31-1 to 31-8 are CPUs of central processing stations located around the world, with 3.1-1 in Japan and 31-2 in the United States.

31-3 represents those placed in Brazil, 31-4 in England, 31-5 in West Germany, 31-6 in Australia, 31-7 in India, and 31-8 in Canada.

An independent memory access mechanism is provided between the spatial memory 30 and the CPUs 31-1 to 31-8 of the central processing stations in each country. , it is possible to freely write and read information. The memory access mechanism is basically the same as that used in general delays such as ultrasonic delay line memories using mercury or quartz as a medium.

In this way, it becomes possible to freely store information in the spatial memory 30 from central processing stations provided in each country, and to retrieve information stored in the memory.

Furthermore, it is also possible to launch multiple artificial planets around the sun in the same orbit as the Earth, and use the space between these artificial planets as memory.

[Problem that the invention seeks to solve]

With the prior invention described above, it is possible to realize a large number of spatial memories in outer space, but since these spatial memories each constitute a closed storage system, it is not possible to use them in parallel. Stay.

Unified use was not possible.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention multiplexes a plurality of spatial memories and connects the delay lines in each spatial memory in series to form a large single-loop delay line. The configuration is such that a loop-shaped signal transmission path is formed between a plurality of artificial legs each equipped with a transmitting/receiving device, and a spatial memory is used as a unit to perform delayed storage using the signal propagation time in the loop-shaped signal transmission path. It is characterized in that a plurality of spatial memories are combined and the signal transmission paths in each spatial memory are connected in series to be used as a single spatial memory.

[Action of the invention]

With the configuration of the present invention described above, a single large-capacity spatial memory is realized, and it becomes possible to centrally use and manage information that has conventionally been distributed and stored.

〔Example〕

The details of the present invention will be explained below based on examples.

FIG. 1 is a schematic diagram of one embodiment of the present invention, and in FIG. 2, 1 to 6 represent artificial satellites and 7 represents the earth.

Further, Pij represents a delay line between artificial satellites i and j. In the illustrated example, there are two independent spatial memories such that one satellite 1.2.3 constitutes the first spatial memory and one satellite 4, 5.6 constitutes the second spatial memory. This is what I used to do. However, in this embodiment, the first spatial memory is the artificial satellite 1.

A link is provided between the second spatial memory and the artificial satellite 4.6, and a loop-shaped signal path is formed that goes 1→2-3→1→6→5→4→1.

FIG. 4 shows this in an easy-to-understand diagram.

The length of the delay line formed in this way is:

P1□+P23↓P31+Pl&+P6S+Psa+P
a+, and one integrated large spatial memory is realized.

The carrier frequency used for transmission and reception in each artificial satellite is set differently for each satellite.

In the illustrated example, 2GHz from 16GHz to 22GHz
Four z-spaced frequencies are used.

Next, a specific example of the storage capacity obtained by the configuration of the embodiment shown in FIG. 1 will be shown below.

In Figure 1, 1 artificial satellite 1 to 6 are all 3 above the earth.
It has been launched into a geostationary orbit of 5,800km.

Among them, the artificial satellite 1゜2.3 that constitutes the first spatial memory
It is assumed that the artificial satellite 4°5.6 constituting the second spatial memory are respectively located at the vertices of an equilateral triangle, as in the example of FIG.

At this time, the delay line PIZ+P2 on each side of the equilateral triangle:
The length of l+P3+, P hsr P 54 is 6.
2 XIO' km.

Therefore +PI□= P Z:l= P 3I= P
6S=P54=6.2×104−.

Also, the length of the delay line Pl& and Pd2 linking the first spatial memory and the second spatial memory is 3.5 X10
4kII+.

Furthermore, for the sake of simplicity, it is assumed that the carrier frequency of the radio wave signals propagating on each delay line is all the same and that 8GH2 is used, and the interval t0 between the black and white pulses is 100 ns (1
00xto-9).

Calculating based on the above preconditions, the first spatial memory
(P + z + P 23 + P i +) and the respective delay times 'r of the second spatial memory (p6.+P54+P4i,).

and T2 and storage capacities N1 and N2 according to the example of FIG.

T+=Tz=6.2 xlO'°km X 3/30
X 10' km # 0.62 (sec) Nl=NZ
=TI(=TZ) /lo =0.62/100Xl
0-9=6.2 x 106 (bits).

And what are the delay time T3 and storage capacity N when making one round of one artificial satellite 1.6.5.4?

T3#((6,2X10'1uax 2)+(3,5
X10'kmX2)) /30X10'km #0.64(sec) N:+=Tz/lo''=0.64/100 Xl0-9
'=, 6.4 XIO'' (pit).

Therefore, the overall memory capacity IN is.

N = Nl + N3 = 12.6 x 10' bits or 12.6 megabytes, which is approximately 2 of N or N3.
Double the storage capacity. However, in this case it should be noted that due to the nature of delay line memory, the average access time will be longer as a reflex of the increased storage capacity.

Furthermore, the locations where multiple spatial memories are linked are:

Although it may be fixedly determined in advance, it can be made variable by appropriately specifying one transmitting side (originating point) element and one receiving side (end point) element using a spatial memory control table as shown in Fig. 5. can be controlled. The example shown in the control table of FIG. 5 corresponds to the arrows in FIG. 1, that is, FIG.
2→3-1→6-5-4-1 is expressed cyclically.

Next, the operating principle of a space memory using outer space as a delay line will be explained with reference to FIG.

In FIG. 6, 61, 65, 66 are gate circuits, 62
is an OR circuit, 63 is a delay line using space, 64
is an amplifier, and 67 is an inverter circuit.

68 is a comparator.

If input information to be stored is currently being applied to the input terminal of the gate circuit 61, a write control signal is applied to the other input terminal of the gate circuit 61.

The gate circuit 61 is opened, and the input information applied from the input terminal is guided to the delay line 63° via the OR circuit 62. The output of the delay line 63 is applied to an amplifier 64, and the output of the amplifier 64 is applied to one input terminal of a gate circuit 65. A clock pulse is applied to the other input terminal of the gate circuit 65, and the output of the amplifier 64 is rectified by this clock pulse, so that the distortion caused when passing through the delay line 63 is corrected.

The output of the gate circuit 65 is transmitted to a gate circuit 66. A cent reset signal is applied to the other input terminal of the gate circuit 66 via an inverter circuit 67, and the gate circuit 66 is configured to close when a reset ON signal is applied to the inverter circuit 67. . Therefore, the information once sent from the input terminal of the gate circuit 61 is transmitted through the OR circuit 62 - delay line 63 - amplifier 64 -
The data is stored while circulating in the loop of gate circuit 65-gate circuit 6 low-OR circuit 62. This storage state is determined by applying a reset-on signal to the inverter circuit 67,
It continues until the gate circuit 66 is closed, but once the gate circuit 66 is closed.

Only the information that could not pass at that time will be erased.

Note that the information stored in the spatial memory shown in FIG. 6 is selected by applying an address signal of the information to a comparator from the right end of FIG.

It can be taken out.

Next, one embodiment of the transmitting/receiving device mounted on each artificial satellite, which is an element of the spatial memory, will be described with reference to FIG.

In FIG. 7, 70 is a transmitting/receiving device, 71 is a ground station, and ?
2,73.74. '75 is an antenna, 76°87 is a decoder, 77.88 is a synchronization circuit, 78, 81.86, 89.
92.98 is a clock generator.

79.90 is an amplifier, 80.91 is a rectifier circuit, 82.9
3 is a control processor, 83.95 is a gate circuit, 84.
96 is an encoder, 85.97 is an original oscillator, 94 is a line exchanger, and 99 is a communication/control command system.

The transmitting/receiving device 70 is a multi-channel transmitting/receiving system for transmitting data between the transmitting/receiving devices of the artificial satellites on both sides in the loop, and a communication system for transmitting and receiving data and commands with the ground station 71. - Equipped with a control command system 99. The former multi-channel transmission/reception system is used in satellites located at branch points for linking two or more spatial memories, such as satellite 1 in Figure 1, but it is not used in other satellites. Only one channel transmitting/receiving system is used.

The illustrated transmitting/receiving circuit for one channel includes transmitting/receiving circuits for two lines, that is, two stages of circuits on the upper and lower sides of the figure, in order to perform signal transmission in both left and right directions.

Note that a transmittable signal and a receivable signal are used to control signal transmission. The transmitting/receiving device is in the receiving state ≧
When the device is in a transmittable state, the receivable flag is turned ON and a receivable signal is transmitted to the transmitting device, and when the transmitter is in a transmittable state, the transmittable flag is turned ON and a transmittable signal is transmitted.

For example, the antenna 72 receives a transmittable signal and a data signal from a transmitting/receiving device on a satellite that is a front-stage element in a delay line loop that constitutes a spatial memory.

It is then used to transmit a receivable signal.

On the other hand, the antenna 73 is used to transmit a transmittable signal and a data signal to a transceiver on a satellite at a later stage in the loop, and to receive a receivable signal. in this case,
The data signal will be transferred from left to right on the upper line of the illustrated device. If the data signal transfer direction is set from right to left, the roles of antennas 72 and 73 are reversed.

Antennas 74 and 75 are used for signal transmission of data and control commands between transceiver equipment 70 on nine artificial satellites and ground station 71.

Hereinafter, the operational functions of each element in the transmitter/receiver will be explained using an example in which a data signal is transmitted from left to right.

The radio signal from the preceding artificial satellite is received by antenna 72 and then guided to decoder 76 . The decoder 76 includes
A clock generator 78 controlled by a synchronization circuit 77 for synchronizing with the received signal is connected. The signal decoded by the decoder 76 is amplified by an amplifier 79, and the output of the amplifier 79 is shaped in a rectifying circuit 80 to which a clock pulse generated by a clock generator 81 is applied. This reshapes the attenuation and waveform distortion that occur while the signal is propagating through space, in the same way as the initial transmitted waveform.

The shaped signal is sent to control processor 82 . Gate circuit 8
3 and an encoder 84 on a carrier wave of, for example, 8 GHz, and is transmitted from the antenna 73 to the subsequent artificial satellite.

The detailed operation of the control processor 82 will be described later according to the flowchart of FIG. 8, but basically it controls signal transmission using a transmittable signal and a receivable signal, and transmits and receives data based on a control table. It consists of routing control that specifies the side device, processing in the event of a failure, etc.

The gate circuit 83 writes or reads data according to a command from the ground station 71. The communication control command system 99 generates a timing pulse corresponding to the memory address to be accessed and applies it to the gate circuit 83.

Gate control is performed to insert data to be stored, extract stored data, or erase data at a predetermined address position in a data string circulating in a loop.

The encoder 84 includes an original oscillator 85 and a clock generator 86
The external circuit continuously encodes the data string output from the gate circuit 83 based on the clock signal supplied by the circuit. The encoded data signal is further modulated using a carrier wave of 8 GHz, for example, in a modulation circuit (not shown).

It is radiated and output from the antenna 73.

The upper line and lower line circuits of the transmitter/receiver have symmetrical configurations, and the lower line circuit performs the same operation as described above when transmitting a data signal from right to left.

A single line exchanger 94 is provided between the upper line control processor 82 and the lower line control processor 93, and data or control signals are exchanged as necessary. For example, control processor 82.

When transmitting a receivable signal to a preceding device or receiving a receivable signal from a subsequent device.

Signal transfer between the two lines is performed via line exchanger 94 and control processor 93.

Next, the operation of the control processor will be explained according to the flowchart of FIG. In this embodiment, it is assumed that the links between the satellites and the direction in which data signals flow, that is, the routing, are variable and are determined based on the spatial memory control table shown in FIG. 9 or FIG. 1O.

The spatial memory control table in FIG. 9 is an example of a case where data signal transmission is controlled by only one control processor.On the other hand, the spatial memory control table in FIG. When the control processors (identified as 1 and 2) of the transmitting and receiving circuits of different systems are functioning, for example, as in the transmitting and receiving device of the artificial satellite 1 shown in Fig. 1, two spatial memories are used. To link.

This is an example in which two control processors of different systems within the transmitter/receiver are functionalized at the same time. Because it is necessary to identify each control processor, “1°”, “2°” are included in Table 9.
' Two types of numbers are used.

Let the number of transmitting/receiving device elements of the space memory that constitutes the space memory control table be K, the start address of the 9th table is 11°, and the end address is ! , , and the ID of the own device, that is, the relative address, r
,given that.

I = I, + I s + (n-1) K (
N=1.2. -, K) is a table address that provides information on the other device connected to the own device.

In the flow of FIG.

■ A control processor receives signals sent from earlier elements of the loop and decodes them to identify whether they are control signals or data.

■ Check the transmission enable flag of the own device, and if transmission is possible, go to ■; if transmission is not possible, go to ■.

■ If transmission is possible, check the receivable signal from the receiving device, and if it is receivable, go to ■; if it is not receivable, go to ■.

■ Send the data in the spatial memory by being able to receive it.

■ Since reception is not possible, return the transmittable flag to o'' and go to ■.

■ Due to the transmittable flag being “O”.

T,,1. , Is, and go to ■.

■ Calculate r=ta+rs and go to ■.

■ I:l11. Check if it is Yes, that is, it is in the table, go to ■, and if No, mark it as a failure.

■Read the ■address of the control table and check whether the contents exist. If there is content, it recognizes the connected device and goes to [phase]; if there is no content, it goes to 0.

[Phase] Check whether the content of the I address is "1" or not.

“'1”, that is, if it is a self-control unit processor, it goes to 0,
If not, it is assumed that the other side processor is responsible for the processing and the process goes to 0.

■ Set the sendable flag to l'', which means sendable, and go to @.

@ Check the receivable signal from the receiving device, and if it is receivable, go to ■; if it is not receivable, it is considered a failure.

◎ Set T=I+ and further search the control table.

Go to ■.

On the other hand, for the receivable flag, if it is receivable, “
1'', the previous stage element is similarly recognized from the spatial memory control table, and a receivable signal is transmitted.

In this way, the transmitter/receiver of each element constituting the spatial memory recognizes the elements before and after the loop based on the spatial memory control table, and notifies whether transmission/reception is possible and transmits/receives data signals. Circular data transmission within the network is possible.

By rewriting the contents of the spatial memory control table using commands, it is possible to arbitrarily change the link status between the unit spatial memories.For example, if a failure occurs in a certain element device, that element device It is possible to separate the spatial memory of the unit containing the unit from the multiple spatial memory, or to change the capacity of the multiple inter-room memory as necessary.

However, it is not necessary for the present invention to change the connection between spatial memories as a unit using a spatial memory control table, and the connection relationship may be fixed in advance.

〔Effect of the invention〕

As described above, the present invention connects a plurality of spatial memories using artificial stars such as artificial satellites or artificial malign stars placed in outer space to form a large-capacity multi-spatial memory, and provides a unified It is possible to make use of the information.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram of one embodiment of the present invention, FIG. 2 is an explanatory diagram of a spatial memory, FIG. 3 is an explanatory diagram of a specific usage example of the spatial memory, and FIG. 4 is an example of the embodiment of FIG. 1. 5 is an explanatory diagram of the spatial memory control table, FIG. 6 is a circuit diagram for explaining the operating principle of the spatial memory, and FIG.
The figure is a configuration diagram of an example of a transmitting/receiving device used in this embodiment.
FIG. 8 is a control flow diagram of the control processor in the transmitting/receiving device of FIG. 7, and FIGS. 9 and 1θ are explanatory diagrams of examples of spatial memory control tables used in this embodiment. In the figure, 1 to 6 represent artificial satellites, and 7 represents the earth. Figure 4 $521 4 Cape Tsu^ 1! , 6[21

Claims (1)

[Claims] A loop-shaped signal transmission path is formed between a plurality of artificial stars each equipped with a transmitting/receiving device, and the spatial memory is a unit of spatial memory that performs delayed storage using the signal propagation time in the loop-shaped signal transmission path. A multiple spatial memory method characterized by combining a plurality of spatial memories and connecting the signal transmission paths in each spatial memory in series to be used as a single spatial memory.