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JPS6077489A - Hybrid ic substrate - Google Patents

Hybrid ic substrate

Info

Publication number
JPS6077489A
JPS6077489A JP18638583A JP18638583A JPS6077489A JP S6077489 A JPS6077489 A JP S6077489A JP 18638583 A JP18638583 A JP 18638583A JP 18638583 A JP18638583 A JP 18638583A JP S6077489 A JPS6077489 A JP S6077489A
Authority
JP
Japan
Prior art keywords
board
substrate
ceramic substrate
circuit
hic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18638583A
Other languages
Japanese (ja)
Inventor
炳人 岡本
鷹尾 健
山川 正己
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Idec Corp
Original Assignee
Idec Izumi Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Idec Izumi Corp filed Critical Idec Izumi Corp
Priority to JP18638583A priority Critical patent/JPS6077489A/en
Publication of JPS6077489A publication Critical patent/JPS6077489A/en
Pending legal-status Critical Current

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  • Combinations Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (a)産業上の利用分野 この発明は、小形電子機器などに組み込まれるハイブリ
ッドIC基板(以下HIC基板という)に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention relates to a hybrid IC board (hereinafter referred to as an HIC board) that is incorporated into a small electronic device or the like.

(b)従来技術 一般にHIC基板は抵抗や配線パターンを印刷したセラ
ミック基板にICやトランジスタ等の電子部品チップを
取着して形成しているが、基板の両面を利用してHXC
基板を形成すれば基板の小形化という点で非常に有効と
なるものである。ところがセラミック基板の両面に電子
部品チップを搭載する場合には、載置時の基板の不安定
さや炉などの熱源方向が一方向であることなどからはん
だ付は作業が非常vC薙しくまた作業性も悪い。それ故
片面のみを利用したHIOIC基板用して−るのが現状
であり、基板の小形化という点からは問題が残っていた
(b) Prior art In general, HIC boards are formed by attaching electronic component chips such as ICs and transistors to ceramic boards on which resistors and wiring patterns are printed.
If the substrate is formed, it will be very effective in reducing the size of the substrate. However, when mounting electronic component chips on both sides of a ceramic board, the soldering process is very slow and difficult due to the instability of the board when mounted and the fact that the heat source such as a furnace is oriented in one direction. Too bad. Therefore, at present, HIOIC substrates using only one side are used, and there remains a problem in terms of miniaturization of the substrate.

(C1発明の目的 この発明は上記問題点をM消するために提案さ7−1.
たもので、両面に電子部品の搭載を可能とするHIC基
板を構成して基板の小形化を図るようにした両面使用の
HIC基板の提供を目的としている。
(C1 Purpose of the Invention This invention was proposed to eliminate the above problems 7-1.
The object of the present invention is to provide a HIC board that can be used on both sides and is configured to allow electronic components to be mounted on both sides, thereby reducing the size of the board.

(d)発明の構成 この発明に、表面用および裏面用として形成さノtた2
枚のセラミック基板にそカぞれ所定の電子部品チップを
搭載後、重ね合わせて、挿入ピンあるいに導電性のフレ
ームにより表裏の回路バクーンを電気的に接続するとと
もに両基板を接着して両面利用のHIC基板を構成した
ものである。
(d) Structure of the Invention In this invention, there is a notch formed for the front surface and the back surface.
After mounting predetermined electronic component chips on each ceramic substrate, they are stacked one on top of the other, and the front and back circuit boards are electrically connected using insertion pins or conductive frames, and both substrates are bonded to form a double-sided structure. This is the configuration of the HIC board used.

(θ)実施例 第1図は、その片面のみに抵抗や配線パターンが印刷さ
力、さらにlCやトランジスタ等の電子部品チップTが
搭載さhたセラミック基板Pを示したもので、中央にふ
・いて左半分のセラミック基板pAと右半分のセラミッ
ク基板pBとに2分割さ力。
(θ) Example Figure 1 shows a ceramic substrate P on which resistors and wiring patterns are printed on only one side, and electronic component chips T such as IC and transistors are mounted.・The force is divided into two: the left half of the ceramic substrate pA and the right half of the ceramic substrate pB.

るが、回路構成にこの2枚の基板PAIPBによって一
つの電子回路が構成されている。このようなセラミック
基板Pは、第2図に示す工うlセラミック基板原板pc
から複数枚取り得るもので、同じ回路バクーンが多数印
刷さ力、たものを切断して用いている。ところで基板p
cは次のような製造工程を経て作製される。捷ずセラミ
ック基板に配線7′+ターンが印刷さ力、焼結炉を介し
て焼結さね、た後、基板にクリームはんだ用パターンが
印刷される。
However, in the circuit configuration, one electronic circuit is constructed by these two boards PAIPB. Such a ceramic substrate P is manufactured using a ceramic substrate original plate PC as shown in FIG.
It is possible to take multiple sheets from the same circuit, and the same circuit board is printed in large numbers and then cut out. By the way, the board p
c is manufactured through the following manufacturing process. After printing the wiring 7'+turn on the ceramic substrate without cutting and sintering it in a sintering furnace, a cream solder pattern is printed on the substrate.

そして電子部品チップを所定の位置に載置して、リフロ
ー法によるはんだ付は工程を行い、基板への電子部品チ
ップの搭載が行わ力、る。この段階で回路チェッカ等で
各基板P毎の給電ポイント間にプローグを当てて回路の
状態のチェックが行ワ力。
Then, the electronic component chip is placed in a predetermined position, and a reflow soldering process is performed to mount the electronic component chip on the board. At this stage, use a circuit checker or the like to apply a probe between the power supply points of each board P to check the state of the circuit.

る。このチェックにより基板PAIPBの内いず力、か
の基板のみが不良であわば一方を廃棄するだけで他方を
残して使用できるので歩留捷りを良くすることが可能と
なる。このようにして作製されたセラミック基板原板p
cは基板pAと基板pBとに分割切断さ力、そしてさら
に第3図に示すように基板PAと基板pBの部品搭載側
面を外面にして互いに重ね合わせそ力、ぞ力切断さ力た
基板PA (11]の回路パターンと基jfipB側の
回路バク−ンとを挿入ビン1あるいは導電性フレーム2
などによって電気的に接続する。挿入ビン1に予め両基
板PAr PB間に渡る工うに設けら力た貫孔に嵌挿し
た後、その両端においてはんだ付けが行わ力る。捷た導
電性フレーム2ばその峡着邪の形状が断面路口字形で基
板側面から峡谷さ力た後、バクーン上において(はんだ
付けが行われる。このような挿入ビン1や導電性フレー
ム2などの接続部桐にエリ、基板pAおよび基板PBは
回路の接続が行わ力、るとともに両基板の接着が行われ
ている。このようにして両面に電子部品を搭載したHI
C基板pnが形成される。
Ru. By this check, if only one of the substrates PAIPB is defective, one can be discarded and the other can be kept and used, thereby improving the yield. Ceramic substrate original plate p produced in this way
c is the force used to cut the board pA and the board pB, and then, as shown in Figure 3, the board PA and the board pB are superimposed on each other with their component mounting sides facing outward, and the force used to cut the board PA Insert the circuit pattern of (11) and the circuit backing on the base jfipB side into the bin 1 or the conductive frame 2.
Connect electrically by etc. After fitting into a through hole previously provided in the insertion bin 1 in a hole extending between both substrates PAr and PB, soldering is performed at both ends thereof. After the bent conductive frame 2 has a cross-section with a cross-section of a cross section and is bent from the side of the board, it is soldered onto the board. At the connection part paulownia, the circuits are connected to the board pA and the board PB, and both boards are bonded together.In this way, the HI with electronic components mounted on both sides is connected.
A C substrate pn is formed.

(f+発明の効果 以上のようにこの発明によりば、片面にのみ配線パター
ンを形成し電子部品を搭載して構成した表面用基板と裏
面用基板をそ−hぞ力作製し、この2枚の基板を重ね合
わせて接続部桐にエリ両基板の回路パターンを電気的に
接続するとともに両基板を接着して両面利用のHIC基
板として構成しており、簡単な作朶工程で小形のHIC
基板を実現できるものである。
(F+ Effects of the Invention As described above, according to the present invention, a front board and a back board each having a wiring pattern formed on only one side and mounted with electronic components are manufactured by themselves, and these two The circuit patterns of both boards are electrically connected to the connection part paulownia by overlapping the boards, and both boards are glued together to form a double-sided HIC board.A small HIC board can be created with a simple manufacturing process.
It is possible to realize a substrate.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明に係るHIC基板を形成するための元
となるセラミック基板のIICIC部平面図2図は前記
セラミック基板を;ダ数形成したセラミック基板原板の
概略平面図、第3図にこの発明に係るHIC基板の形成
状態を示す概略断面図である。 PAIPB・・・@瞼セラミック基板 pH+・・・・
HIC基板、T・・・・・電子部晶子ツブ、1・・・・
・挿入ビン、2・・・・・導電性フレーム。 第1図 芋 第2図 第3図 P。
FIG. 1 is a plan view of the IICIC portion of a ceramic substrate that is a source for forming an HIC substrate according to the present invention. FIG. 2 is a schematic plan view of a ceramic substrate original plate on which the ceramic substrate is formed. FIG. 1 is a schematic cross-sectional view showing a state of formation of an HIC substrate according to the invention. PAIPB...@eyelid ceramic substrate pH+...
HIC board, T...Electronic part crystal tube, 1...
- Insertion bottle, 2... Conductive frame. Figure 1 Potato Figure 2 Figure 3 P.

Claims (1)

【特許請求の範囲】[Claims] 2分割さ力、た電子回路に対応してそれぞ力片面にのみ
回路パターンが形成された2つのセラミック基板を設け
、前記両基板を挿入ピンなどの接続部材により#井両考
*棲接着するとともに電気的に接続し、両面基板として
構成したことを特徴とするハイブリッドxa基ffi。
Two ceramic substrates each having a circuit pattern formed on only one side are provided corresponding to the electronic circuit that is divided into two parts, and both substrates are bonded together using connecting members such as insertion pins. A hybrid xa-based ffi characterized in that it is electrically connected to a double-sided substrate.
JP18638583A 1983-10-04 1983-10-04 Hybrid ic substrate Pending JPS6077489A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18638583A JPS6077489A (en) 1983-10-04 1983-10-04 Hybrid ic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18638583A JPS6077489A (en) 1983-10-04 1983-10-04 Hybrid ic substrate

Publications (1)

Publication Number Publication Date
JPS6077489A true JPS6077489A (en) 1985-05-02

Family

ID=16187460

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18638583A Pending JPS6077489A (en) 1983-10-04 1983-10-04 Hybrid ic substrate

Country Status (1)

Country Link
JP (1) JPS6077489A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004138704A (en) * 2002-10-16 2004-05-13 Seiko Epson Corp Display body structure, method for manufacturing the same and electronic equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004138704A (en) * 2002-10-16 2004-05-13 Seiko Epson Corp Display body structure, method for manufacturing the same and electronic equipment

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