JPS6020695A - Magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To maintain the continuity of phase for a synchronizing signal and to avoid a synchronizing separation mistake by avoiding the time axis compression given to a part or whole of the flyback time when the time division multiplex is applied between the luminous and color signals and at the same time correcting a phase shift through a delay circuit. CONSTITUTION:A luminance signal Y is led to the 1st A/D converter 17 from the 1st low-pass filter 15, and the digital luminance signal is written alternately to the 1st and 2nd memories 19 and 20. While a color signal is led to the 2nd A/D converter 18 from the 2nd low-pass filter 16 and then written to the 3rd memory 21. The digital signals written to memories 19-21 are read out at higher frequencies than the input mode to undergo the time axis compression. In this case, the same frequency is set between the writing and reading modes at a point near a vertical flyback time with no time axis compression carried out. A phase shift produced to a synchronizing signal between a period when the time axis compression is carried out and a period when no said compression is carried out is delayed and corrected by a shift register 35.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a magnetic recording/reproducing device that records video signals by time-base compression processing, and particularly relates to synchronization signal processing during blanking period suitable for recording/reproducing. It is something.

[Background of the invention]

In conventional magnetic recording and reproducing devices, a color video signal is separated into a luminance signal and a carrier color signal, the luminance signal is angularly modulated, the carrier color signal is frequency-converted to the lower frequency side of the angularly complimented luminance signal, and
They were frequency-multiplexed and recorded. However, this conventional technique has a drawback in that the carrier color signal that has been low-frequency converted during reproduction is affected by jitter and the like, resulting in color unevenness. As a technique for solving this drawback, for example, there is a technique in which the luminance signal and the chrominance signal are time-base compressed and recorded by time-division multiplexing, respectively. This will be explained.

FIG. 1 is an example of a circuit for time-division multiplexing of luminance signals and color signals, and FIG. 2 is a time chart illustrating the operation of the circuit shown in FIG. A luminance signal shown in FIG. 2(a) is input through the input terminal 1 and is converted into a digital signal by the first converter 3.

The digital signal is sent to the first memory 5 and the second memory 96.
will be written to. The 'H1gh'' period in FIG.
gh” period is the writing period of the second memo 96.

A color signal is inputted from the input terminal 2, converted into a digital signal by the second A, b converter 4, and written into the third memo 97. The 'gigh''' period in Figure 2 (, i) is the writing period of the third memo 9. Figure 2 (e),
'H1gh' in (f) and (g) is the reading period of the first to third memos 95.6.7, respectively.

In accordance with FIG. 2 (eL (fL (g)), the digital signals read from the first to third notes 9-5.6.7 at a higher frequency than when writing are time-division multiplexed by the switch 8, The signal is input to the D/A converter 9.

The signal shown in Fig. 2 (h) is D/A converted and output terminal 1.
This is an example of output as 0. 11 is a color signal compressed to approximately 115 in the time axis, and 12 is a luminance signal compressed to approximately 415 in the time axis. When such time division multiplexing is performed, a problem arises with the synchronization signal during the vertical retrace period.

This problem will be explained using FIG. 3. FIG. 6(a) shows the luminance signal of the original signal to be time-axis compressed, and FIG. 6(b) shows the first luminance signal.
The signal ((L) is the vertical synchronization period of the original signal (a), and (θ) is the vertical synchronization period of the time division multiplexed signal Cb) is time-division multiplexed by the circuit shown in FIG. 2 according to the timing chart of FIG. Let's focus on the synchronization signal between the original signal (a) and the time division multiplexed signal (b). Although the synchronization signal of the time division multiplexed signal (b) has a delay time with respect to the synchronization signal of the original signal (a), this delay time is shorter than 1H-τ, that is, 1H by τ. This T represents the phase shift of the synchronization signal caused by time compression.

In this time-division multiplexed signal, the vertical retrace period is also time-division multiplexed with time axis compression, so the period of the synchronization signal should originally be ψ in the 'equalization period and vertical synchronization period of the vertical retrace period. The disadvantage is that the image is compressed and becomes discontinuous as shown in Figure 6(e). Therefore, the separation of horizontal and vertical synchronization during this vertical retrace period is difficult, resulting in horizontal and vertical synchronization errors and the inconvenience that normal recording and reproduction cannot be performed.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems and provide a magnetic recording and reproducing apparatus suitable for time-division multiplexing and recording and reproducing luminance signals and color signals.

[Summary of the invention]

In order to achieve the above object, the present invention records part or all of the retrace period without time axis compression. Further, a delay circuit is provided for at least one of the R axis compressed signal and the time axis uncompressed signal.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 4 is a block diagram showing an embodiment of the magnetic recording/reproducing apparatus of the present invention. In FIG. 4, reference numerals 15 and 14 are input terminals to which a luminance signal Y and line sequential color difference signals R-Y/B-Y are input, respectively. The low-pass filters 15 and 16 limit the band in order to suppress the backlash component during ψ conversion. The #open signal is guided from the first low-pass filter 15 to the first A/D converter 17 and converted into a digital signal. The luminance signals converted into digital signals are stored alternately in the first memory 19 and the second memo 920. The color signal is led from the second low-pass filter 16 to the second A/D converter 18 and converted into a digital signal. The color signal converted into a digital signal is written in the memo 921 of O3.

The digital data written in the memories 19 to 21 is read out at a high frequency and compressed in time axis while waiting for input. However, near the vertical retrace period, the writing frequency and the reading frequency are made the same and the time axis is not compressed.

This will be explained using FIG. 5. Figure 5 shows compression/
FIG. 3 is a diagram illustrating an example of switching to non-compression.

A signal input from an input terminal 40 is converted into a digital signal by a converter 41 and written at a writing frequency of 1. 46 is a write black input terminal. 47 is the read clock when not compressing, the input terminal of ri, 48 is the read clock when compressing, the read clock R wave number when not compressing is the same fl as the write clock frequency, and when compressing The read clock frequency is 2 at a higher frequency than the pledge clock frequency. Two readout clocks input from input terminals 47 and 48,
The output signal is led to a switch y-45 and is switched by a control signal input from an input terminal 49.

Normally, the switch f45 is connected to the white circle side and the second read clock input to the input terminal 48 is inputted to the memory 42 as a read clock, but during the non-compression period of the vertical retrace period, the switch 45 is connected to the black circle side. connected to,
A read clock having the same frequency f1 as the write clock is input to the memo 942 as the read clock.

The control signal inputted from the input terminal 49 is for switching between compression and non-compression, but it is convenient if this signal is generated from a vanosus used for switching between, for example, a magnetic recording and reproducing device. good.

As a means of decompression, an example of switching the read clock of the memory 42 is mentioned. Non-compression can also be achieved by switching both read clocks.

FIG. 6 f1 is an example of a vertical retrace period in which the time axis is not compressed. (d) is the vertical retrace period of the original signal (=L).

The synchronization signal during the vertical retrace period (f) without time axis compression performs memory writing and reading, so it has a delay time of 1H with respect to the synchronization signal during the vertical retrace period (d) of the original signal. Vertical retrace period (f) without time axis compression from
The phase shift of the synchronization signal is eliminated.

The outputs of the first memo 919 and the second memo 920 are input to the switch-y-22, and the memo! The read signals of 119 and 20 are guided to switch 24.

In addition, the output of the third memo 921 and the code generator 23
The outputs are inputted to the switch and f24, time-division multiplexed, and guided to the D/A converter 26, respectively. The code generator generates information to be time-division multiplexed in addition to the luminance signal and the chrominance signal, such as a zero-level digital code of the chrominance signal. D
The time division multiplexed signal converted into an analog signal by the /A converter 26 has high 4-wave components removed by a third low-pass filter 27 and is input to a gain control amplifier 28 . The output of the gain control amplifier 28 is input to a pre-emphasis circuit 29,
High frequencies are emphasized. Pre-emphasis circuit 29
The output is subjected to angle modulation by an angle modulator 60, multiplexed with a signal input to the input terminal 31 (for example, an audio signal, a pilot signal, etc.), and input to the recording amplifier 32Vc. The output of the recording amplifier is recorded on a magnetic tape 34 via a head 33.

In this way, in the present invention, by not compressing the time axis of all or part of the vertical R-line period, a synchronization signal that maintains wash continuity as shown in Fig. 3(f) can be obtained, as seen in (, 3). Discontinuity in the synchronization signal is eliminated.

This makes it easy to separate the horizontal synchronization signal and vertical synchronization signal near the vertical retrace period, for example, during playback.
No problems such as loss of vertical synchronization occur. Furthermore, compatibility with conventional magnetic recording and reproducing devices can be achieved.

However, as shown in Figure 3, while the synchronization signal of the time division multiplexed signal (b) has a time difference of 1-t with respect to the synchronization signal of the original signal (a), the vertical blanking period As mentioned above, the synchronization signal (f) obtained by not compressing the time axis of the synchronization signal (f) has a time difference of 1H from the synchronization signal of the original signal. A phase shift, T, occurs between the synchronization signal and the period (f) in which no time-base compression processing is performed. Therefore, this τ is set to 0, that is, the time division multiplexed signal (b) is By creating a time division multiplexed signal such as (0) with no synchronization signal phase shift τ, a time division multiplexed signal that is more suitable for recording and reproducing in a magnetic recording and reproducing device, in which the continuity of the synchronization signal is completely maintained, can be obtained. can get.

Figure 6 shows the phase shift T of the synchronization signal of the time division multiplexed signal as O
FIG.

In the figure, 65 is a shift register and 36 is a switch. Switch y-36 is usually connected to the white circle side,
The output signal of the switch 24 is delayed by a shift register 35 and input to the D/A converter 26. The delay time caused by this shift register 35 is T. During the period in which the time axis is not compressed near the vertical retrace period, the switch 36 is connected to the black circle side, and the output signal of the switch 24 is directly input to the D/A converter 26 without delay.

Generally, when time-division multiplexing is attempted as shown in FIG. 3, the phase of the horizontal synchronization signal in the vertical retrace period, which is not time-base compressed, is delayed by r compared to the horizontal synchronization signal in the video signal domain. Therefore, in the video signal domain, the time-base compressed signal from the switch 24 is transferred to the shift register 3.
5 and is delayed by T and is led to the D/A converter 26.

On the other hand, during the vertical R range period, the signal from the switch f-24 that is not time-base compressed is sent to the D/F without passing through the shift register 65.
It leads to the A converter 26. By doing so, the phase difference (time difference) between the horizontal synchronization signal of the time-base compressed signal and the time-base uncompressed signal in the vertical retrace period is exactly 1H, and the horizontal synchronization phase is continuous.

In addition, in FIG. 6, as a control signal for the switch 36 that switches the signal led to the D/A converter 261C, for example, nH (however, 6<71≦60
) During this period, a signal that does not pass through the shift register is guided to the D/A converter 26. The vanosis generator 52 is a circuit that generates this control signal. , head switching signal and 1
H pulses with an H period are guided, the H pulses are counted every time the head is switched, and the above control signal is generated.

Although the detailed explanation of the present invention has been given for the case where the shift register 35 and the switch 36 are provided at the front stage of the D/A converter 26, it is also possible to set the D/A converter 26 at the rear stage of the switch 25 instead of the shift register 35. A similar effect can be obtained by switching in the analog domain using a delay line.

Next, a different embodiment will be described in which the phase shift T of the horizontal synchronization signal of the time division multiplexed signal is made zero.

The off-line diagram is a diagram explaining the example.

In the figure, 37 is the memo y 138 of the fangs 3, the fourth memory 39 is the second switch.

In this way, the color signal compression memo 9 is also converted into two channels.

FIG. 8 is a time chart explaining the circuit operation in the OFF diagram. The circuit operation in the OFF diagram will be explained with reference to FIG.

The luminance signal is converted into a digital signal by the first A-power converter 17 and written into the first memory 19 and the second memory 20.

FIG. 8(b) shows the writing period of the first memo 919, (C
) is the writing period of the second memo 920. The color signal is converted into a digital signal by the second A/D converter 18 and written into the third memory 67 and the fourth memory 38.

FIG. 8(d) shows the look period of the third memory 67, (e
) is the write period of the fourth memory 38. At the time of output, the write frequency is also read out at a frequency that is different from the write frequency at the time of input, but in the vicinity of the vertical period, the write frequency and read frequency are made the same, and the time axis is read without compressing the time axis.

FIG. 8(f) shows the reading period (g) of the first memo 919.
) is the reading period of the second memo 920. however,
In a period near the vertical blanking period in which time axis compression is not performed, the reading period of the memos 919 and 20 is expanded to 1H.

Figure 8 (h) is the third memo! I37 read period, (
1) is a read period of the fourth memory.

By writing to and reading from memories 19, 20, 37, and 38 at the timing shown in FIG. 8, continuity of the synchronization signal of the time division multiplexed signal can be maintained.

FIG. 9 is a diagram illustrating an embodiment in which time axis compression/expansion is switched as the output of the A/'[) converter 17, which is the input of the register implemented in FIG. 5
0 is a shift register, and 51 is a switch. Swish,
%31 is normally connected to the white circle, and leads to the D/A converter 26 for the time-axis compressed time division multiplexed signal, and the vertical R# is connected to the black circle for the period when the time axis is not compressed. The output of the A/'D converter 17, that is, the signal that is not time-domain compressed, is sent to the D/'D converter 17 via the shift register 50.
The time-base compressed signal that is led to the A converter 26 has a delay time compared to a signal that is not time-base compressed because it is once stored in the memory and then read out. The shift register 50 adjusts the delay time of the synchronization signal, so that the time division multiplexed signal output from the D/A converter 26 becomes a signal in which the continuity of the synchronization signal is maintained.

In this embodiment, the shift register 50 must be larger in scale than the shift register 65 in FIG. Therefore, the embodiment shown in FIG. 6 also has the advantage that the drive circuit 25 can be simplified.

Furthermore, similar effects can be expected by using an analog delay element in place of the shift register 500.

The analog slow g-line input signal is passed through the first low-pass filter 15.
The output signal of the switch 510 and the input signal of the D/A converter 2
6 output and analog delay line output and low pass filter 2
70 input signal becomes the output of switch 51. Therefore,
The output of switch 24 is led directly to D/A converter 26.

〔Effect of the invention〕

According to Himi BAK, the phase continuity of the synchronization signal in the time-base compressed time division multiplexed signal is maintained, synchronization separation errors can be eliminated, and a time division multiplexed signal suitable for recording/reproduction by a magnetic recording/reproducing device can be obtained.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a conventional time division multiplexing circuit that performs time division multiplexing, Figure 2 is a time chart explaining the circuit operation of Figure 1, and Figure 6 is the timing of the original signal and time division multiplexed signal. FIG. 4 is a block diagram showing an embodiment of the magnetic recording/reproducing apparatus of the present invention, and FIG.
A block diagram of the non-compression circuit, Figure 6 and Figure 8 are block diagrams showing other embodiments of the present invention, Figure 8 is a time chart explaining the circuit operation of the Figure 9, and Figure 9 is a diagram showing the circuit operation of the Figure 9. FIG. 3 is a block diagram showing another embodiment. 3, 4, 17. 18...A/D converters 5-7.
19-21, 37, 38. 42...Memory 2B
, 30, 42. 45...Switch 32...D
/A converter 8, 22, 24, 36, 39, 45. 51
...Sui, f35, 50...Shift register. Wharf 1 Figure $ 2 Figure 3 Figure 4 Kuraya left Gondaito Otsu Bun 1 Figure 7 Houki? Figure 1

Claims (1)

[Claims] A magnetic recording/reproducing device for recording and reproducing a signal obtained by time-division multiplexing a luminance signal, a chrominance signal, and a synchronization signal, characterized in that the synchronization signal is recorded without time axis compression in the vicinity of the vertical retrace period. Device.