JPS60171815A - Output data calibrating circuit - Google Patents

Abstract

PURPOSE:To calibrate a level and an amplitude of an output signal to a reference value by adding an input signal and a calbrating signal and inputting the result to an input signal terminal of a comparison amplifer circuit. CONSTITUTION:A reference level Va is connected to one input (g) of two inputs (f), (g) of a comparison amplifier Q via a resistor Ra. An input signal S is given to the input terminal (f) via a variable resistor Rs. A feedback resistor Rf connects an output O and the input terminal (f) to which an input signal S and a a calibratig signal C are connected. A signal whose DC component is zero is used as the calibrating signal C. The average value <S> of the calibrating signal C and the input signal is divided by resistors Rs, Rc and inputted to the input terminal (f). A maximum value Cmax and a minimum value Cmin of the calibrating signal C are specified in advance and the variable resistors Rs, Rc, the offset of the amplifier circuit Q or the amplification factor is adjusted while observing an output waveform so that the relation of <S>=(Smax+Smin)/2 is obtained at the output O.

Description

[Detailed description of the invention] (7) Technical field The present invention relates to a signal output calibration circuit.

When a digital signal is input to a comparator or an amplifier circuit including a comparator, a shaped and amplified digital signal appears at the output.

The output may also be monitored on an oscilloscope.
It may also be recorded on a recorder. Furthermore, the output may be used as an input to a subsequent electrical circuit.

What the output is connected to varies, but in some cases the voltage range of the output must be within a certain value. The minimum value '/min of the output signal and the maximum value V m
ax must be constant even if there are variations in signal input.

The reason why the minimum value Vmin and maximum value Vmax of the output signal fluctuate is as follows.

(1) The reference level voltage connected to the comparator varies.

(2) There are variations in the amplification factors of the amplifier circuits.

(3) There are variations in the level and amplitude of the signal input.

(b) Conventional technology and its problems The output signal calibration circuit will be explained with reference to FIG.

The amplifier circuit Q has input terminals f, g and a power terminal 0. The voltage between the input terminals is amplified by a certain factor and given to the output 0.

Input terminals f and g correspond to either inverting inputs or non-inverting inputs.

Input terminal gKIi, constant DC reference level Vay)x
It is connected.

The other input terminal f is connected to the C contact of the changeover switch Sw. Let S and C be the changeover contacts of the changeover switch.

The signal input S enters the input terminal f of the amplifier circuit Q through the S contact and the C contact of the changeover switch Sw.

Under normal conditions, a digital signal of 0.1 is input to the signal input in this state, and compared with the reference level) v Va, S and VaO
The amplified difference will appear at the output 0.

That is, the output 0=(Va,-3)Q+R(1) is generated. Q is the amplification factor, a is Va = S
This is the value (intermediate value) of the output O when .

The output O fluctuates between a minimum value and a maximum value.

Vmin (0(Vnbax (j2) this Vmin,
The output voltage is calibrated so that Vmax is constant for all circuits.

For calibration, a constant voltage pulse waveform is input to the f terminal of the amplifier circuit Q as a calibration signal input C. This switch switch Sw is switched to C contact.

A pulse signal also appears at output 0.

Adjust the amplification factor Q and output offset voltage R while watching the output.

Conventionally, the output was calibrated by operating the changeover switch Sw in this manner and inputting a different calibration signal input C.

However, the reference levels of the signal input S and the calibration signal human power C do not necessarily match.

This has a double meaning.

One is the simple average of each maximum and minimum value <S>
, <C> do not necessarily match. Here, <,,,> means simple average, and (S) = −(S
max+Sm1n). Since it is a digital signal, only the values of Smax and Sm1n are taken. Hereafter, the same definition will be used for other values.

Another problem is that since it is a digital signal, there are two values of 0.1, but the voltage difference between these two values does not necessarily match.
That's what it means.

The calibration signal gives the correct voltage, but the signal input S does not. Similarly, the voltage corresponding to % Q I/ can also be +0.5'/, 4p, +o, and av. Depending on the situation, it may be 10.5V. The same applies to the voltage corresponding to %1".

In this way, if there is a discrepancy between the reference values of the calibration signal C and the signal input S, even if the output O is calibrated using the calibration signal C,
This does not mean that the signal input S has been correctly calibrated.

(1) Structure of the invention The present invention will be explained in detail with reference to FIG.

One of the two inputs f1g of the amplifier circuit Q is connected to a reference voltage VVa via a resistor Ra.

The signal input S is connected to the input terminal f via a variable resistor Rs.

A feedback resistor Rf' connects the output 0 and the input terminal f to which the signal input S1 calibration signal input C is connected.

This determines the amplification factor, but it can be omitted.

In this way, at the input terminal f of the amplifier circuit Q during calibration work,
It is important that the two signals, signal input S and calibration signal input C, are tied together.

Under normal conditions, the calibration signal input C is grounded.

The calibration signal is a pulse signal with a duty of 50%.

This is generated by a calibration signal generator (not shown).

Although it is convenient to use a rectangular pulse with a duty of 50%, it does not have to be 50%.

An example of 50% will be explained. The calibration signal C has a DC component of 0, that is, <C>=0.

Then, the signal input S is the average value of the signal, <S> to be entered. This is called the reference value of the signal S.

Then, the average of the signal input <S> and the calibration signal input C
is divided by the resistors Rs and Re and applied to the f input terminal.

The maximum value Cmax and minimum value Cm1n of the calibration signal human power C are accurately defined in advance.

Adjust the offset, amplification factor, etc. of the variable resistors Rs and Rc or the amplifier circuit Q while watching the digital waveform of the output so that the output 0 satisfies the inequality (2).

In other words, the minimum value of output 0, maximum value 0m1n, Oma
x is adjusted to 0m1n - * Vmin Omax - + Vmax so that x is equal to the maximum values Vmax and Vmin requested in advance.

With this adjustment, when the average value <S> of the signal human power S is input, the value of the output O becomes 0>. Therefore, when the signal input fluctuates with equal amplitude above and below <S>, the output O will fluctuate equally upward and downward from the average value <0><O> == (Vmin +Vmax) (8) .

Calibration can be done in this way.

The simple average <C> of the calibration signal inputs does not necessarily have to be O. Let co be a non-zero constant <C> = co(4
) The present invention is applicable even in the case where However, in this case, the calibration signal C is maintained at a constant voltage CO during normal operation (non-calibration).

Usually Rs = Rc, but if the ratio of the amplitudes of the calibration signal and the signal input is not 1:1, this ratio and Rs /
It suffices to take Re as equal.

(b) Since the calibration is performed using the operating signal human power S as a reference value, the offset included in the signal input can be completely removed.

In other words, calibration that matches the signal level is possible.

The above explanation is an example in which the amplifier circuit Q is used as a comparator, and it is assumed that the digital signal S is input to one input terminal f. In this case, the feedback resistor Rf' is often absent.

Furthermore, the same thing applies when an analog signal is input to the signal input S. In this case, the amplifier circuit Q functions not as a comparator but as an amplifier.

In this way, the present invention is applicable even to the case of analog signal input.

FIGS. 3 to 5 show voltage waveforms at each part of the signal input S1, the calibration signal input C1, the input terminal f, and the output 0. FIG. 3 is a waveform diagram during calibration according to the present invention. FIG. 4 is a waveform example diagram of the circuit of the present invention during normal (non-calibration) operation. In FIG. 4, when the input S takes the minimum value and the maximum value, the output O takes two values, Vmin and Vmax. As the amplitude of the input S decreases, the amplitude of the output 0 also decreases, but it decreases equally in the upper and lower regions, so the intermediate value remains <V>. <V> is the simple average of VmaX and Vmin.

FIG. 5 shows examples of pulse waveforms during calibration (left half) and non-calibration (right half) in the conventional circuit shown in FIG. 2. This shows that there may be a deviation in the reference for output 0 when calibration is not performed.

I wrote the calibration input and signal input side by side on the third row.

If there is a level difference Δ between the two, the calibration output will reach the specified value (Vm
in, Vmax), the signal output is biased above and below 0.

(2) Applications This invention can be applied to measuring instruments, data output devices, etc.

[Brief explanation of drawings]

FIG. 1 is an output data calibration circuit diagram of the present invention. FIG. 2 is a diagram of an output data calibration circuit according to a conventional example. Figure 3 shows the signal input S during calibration work in the circuit of the present invention.
, calibration signal input C1 input terminal f, and a waveform example diagram of output 0. FIG. 4 is a waveform example diagram of the signal human power S, the calibration signal human power C1 input terminal f, and the output 0 during non-calibration work (normal time) in the circuit of the present invention. Figure 5 shows the signal input S and calibration signal input 01 input terminal f during calibration (on the left) and non-calibration (on the right) in a conventional circuit.
A waveform example diagram of 1 output and 0. S...Signal input C...Calibration signal input Va . . . . . . . Reference Bell O
......Output flg...Input terminals Rs, R of the amplifier circuit
c%Ra, Rf ・・・・・・Resistance Q・・・・・・Amplifier circuit inventor Mibe Uekobayashi Sho Nobuzaka Moto Fukuuma Kumamoto Hirofumi Patent applicant Toyota Motor Corporation Sumitomo Electric Industries, Ltd. Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] The signal input S and the calibration signal input C are connected to the input terminal to which the signal input S is to be input of the amplifier circuit Q which compares and amplifies the signal input S and the reference level) v Va and gives an output signal. An output data calibration circuit characterized in that the level and amplitude of an output signal are calibrated by adding (6) a calibration signal human power C to a reference value.