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JPS60107840A - Manufacture of semiconductor element - Google Patents

Manufacture of semiconductor element

Info

Publication number
JPS60107840A
JPS60107840A JP58213941A JP21394183A JPS60107840A JP S60107840 A JPS60107840 A JP S60107840A JP 58213941 A JP58213941 A JP 58213941A JP 21394183 A JP21394183 A JP 21394183A JP S60107840 A JPS60107840 A JP S60107840A
Authority
JP
Japan
Prior art keywords
water content
oxygen
moisture
quartz
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58213941A
Other languages
Japanese (ja)
Inventor
Hideo Honma
本間 秀男
Naohiro Monma
直弘 門馬
Masami Naito
正美 内藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58213941A priority Critical patent/JPS60107840A/en
Publication of JPS60107840A publication Critical patent/JPS60107840A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain an oxide film having uniform film thickness with excellent reproducibility by heating a semiconductor substrate in an oxidizing atmosphere gas containing a very small amount of water content in quantity more than maximum water content discharged from an oxidizing atmosphere system and less than 1,000ppm when the oxide film is formed on the surface of the substrate. CONSTITUTION:A quartz jig 3 on which a large number of Si substrates 1 are erected at intervals is received in a quartz pipe 2 surrounded by a heating furnace 12, oxygen to which a very small amount of water content is added is flowed into the quartz pipe 2 and the substrates 1 are heated at approximately 1,000 deg.C, and SiO2 films are formed on the surfaces of the substrates. In the constitution, a purifier 4 for oxygen is disposed outside the quartz pipe 2, oxygen from the purifier is bubbled in a quartz vessel 6 receiving pure water 7 fitted in a thermostatic chamber 5, and water content is regulated by a water content densitometer while a very small amount of water content is made to be contained in oxygen and oxygen is flowed into the quartz pipe 2. Water content is regulated in quantity more than maximum water content discharged from the quartz pipe 2 and less than 1,000ppm.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は半導体素子の製造法に係シ、特に酸化膜厚の均
一性、再現性が良好な半導体基体の酸化法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for oxidizing a semiconductor substrate with good uniformity and reproducibility of oxide film thickness.

〔発明の背景〕[Background of the invention]

近年、MO8/LSIの高集積化、高速化に伴い、ゲー
ト酸化膜の薄膜化が進んでいる。周知のとうりゲート酸
化膜厚は、しきい値電圧(VTII)等、MOSの電気
的特性を決定する重要なパラ゛メータであシ、前記酸化
膜厚のばらつきがそのままVTR等のばらつきとしてあ
られれる。これは酸化膜厚が薄い場合に特に顕著であシ
、MO8/LSIにおけるゲート酸化膜形成プロセス上
の大きな問題となってきている。ゲート酸化膜の形成法
は、一般に酸化性の乾燥雰囲気ガス中で半導体基体を熱
処理する、いわゆる熱酸化法によるドライ酸化が用いら
れている。これは、他の方法に比べて膜厚の均一性、再
現性が優れているからである。熱酸化法における薄膜化
への対応としては、酸化温度を低下する方法や酸素中に
窒素などの非酸化性ガスを混合させ酸化雰囲気中の酸素
分圧を低下させる方法が一般的である。しかしこの方法
では高集積、高速化されるMO8/LSIへの対応とし
ては、膜厚の均一性、再現性の点で不十分であるという
問題があった。
In recent years, as MO8/LSIs have become more highly integrated and faster, gate oxide films have become thinner. As is well known, the gate oxide film thickness is an important parameter that determines the electrical characteristics of the MOS, such as the threshold voltage (VTII), and variations in the oxide film thickness can be directly reflected in VTR variations. It will be done. This is particularly noticeable when the oxide film is thin, and has become a major problem in the gate oxide film formation process in MO8/LSI. As a method for forming a gate oxide film, dry oxidation is generally used, which is a so-called thermal oxidation method in which a semiconductor substrate is heat-treated in an oxidizing dry atmospheric gas. This is because the film thickness uniformity and reproducibility are superior to other methods. In order to reduce the thickness of the film in thermal oxidation methods, common methods include lowering the oxidation temperature and mixing non-oxidizing gas such as nitrogen into oxygen to lower the oxygen partial pressure in the oxidizing atmosphere. However, this method has a problem in that it is insufficient in terms of film thickness uniformity and reproducibility in response to MO8/LSI, which is becoming more highly integrated and faster.

〔発明の目的〕[Purpose of the invention]

それゆえ、本発明の目的は、酸化膜厚の均一性、再現性
の良好な半導体素子の製造法を提供するととにある。
Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor element with good uniformity and reproducibility of oxide film thickness.

〔発明の概要〕[Summary of the invention]

かかる目的を達成する本発明の特徴とするところは、従
来用いられていた酸化性の乾燥雰囲気ガス中に微量に制
御された水分を添加した雰囲気ガス中で半導体基体を加
熱処理することにある。
The present invention is characterized in that a semiconductor substrate is heat-treated in an atmospheric gas in which a controlled amount of moisture is added to a conventionally used oxidizing dry atmospheric gas.

以下、本発明について更に詳しく説明する。The present invention will be explained in more detail below.

一般にMO8/LSI等のゲート酸化膜は酸素又は酸素
と窒素の混合気体中で半導体基体を加熱処理することに
よって形成される。しかしこの方法では酸化のロット毎
に膜厚がばらつき、均一性再現性が十分ではないという
問題があった。この原因を詳しく調べた結果、酸化性雰
囲気中に含まれる微量水分が関与していることがわかっ
た。酸化性雰囲気中に含まれる微量水分は、導入される
酸素又は窒素中に含まれるもの及び加熱時に石英管、半
導体基体及び半導体基体を支える治具類から放出される
ものとが考えられる。前者の導入される酸素又は窒素中
の水分濃度を分析した結果、0.5〜0.6pI)m 
で一定値を保っていることを確認した。従って、酸化時
に石英管、半導体基体及び半導体基体の支持体から放出
される水分が膜厚をばらつかせる原因と考えられる。こ
れらの放出水分は直接分析する手段がないため定量化が
難しい。そこで酸素中に任意の微量水分を添加して水分
量と膜厚の関係を詳しく調べた。その結果を第1図に示
す。図かられかるように約21)pm よシ水分が多い
範囲では酸化膜厚towと水分濃度Nvx2oは直線関
係(toxoc 10gNa2o )にあるが、約2p
pm以下ではばらついてしまう。この結果から、前述し
た石英管、半導体基体及び半導体基体の支持体から放出
される水分が最大2 pI)mでこれ以下の範囲でロッ
ト毎にばらついていることが推察できる。これらの放出
水分をなくすこと及び一定値に保つことは極めて困難で
ある。そこで不可制御なこれら放出水分が変動してもほ
とんど膜厚に影響を及ぼさない程度の水分をあらかじめ
酸素中に添加してやること、すなわち第1図忙おいてt
ox6c logN■2Gの関係が成シ立っている範囲
で酸化を行なえばばらつきはなくなる。
Generally, a gate oxide film of MO8/LSI or the like is formed by heat-treating a semiconductor substrate in oxygen or a mixed gas of oxygen and nitrogen. However, this method has the problem that the film thickness varies from oxidation lot to lot, and the reproducibility of uniformity is insufficient. A detailed investigation into the cause revealed that trace amounts of moisture contained in the oxidizing atmosphere were involved. The trace amount of moisture contained in the oxidizing atmosphere is thought to be contained in the introduced oxygen or nitrogen, and released from the quartz tube, the semiconductor substrate, and the jigs supporting the semiconductor substrate during heating. As a result of analyzing the moisture concentration in the former introduced oxygen or nitrogen, it was found to be 0.5 to 0.6 pI)m
It was confirmed that the value remained constant. Therefore, the moisture released from the quartz tube, the semiconductor substrate, and the support for the semiconductor substrate during oxidation is considered to be the cause of the variation in film thickness. It is difficult to quantify this released moisture because there is no way to directly analyze it. Therefore, we added a small amount of water to oxygen and investigated the relationship between water content and film thickness in detail. The results are shown in FIG. As can be seen from the figure, there is a linear relationship between the oxide film thickness tow and the water concentration Nvx2o (toxoc 10gNa2o) in the range where there is a lot of moisture, but about 2p
It varies below pm. From this result, it can be inferred that the moisture released from the quartz tube, the semiconductor substrate, and the support for the semiconductor substrate described above varies from lot to lot within a maximum range of 2 pI)m or less. It is extremely difficult to eliminate these released moisture and keep it at a constant value. Therefore, it is necessary to add moisture to the oxygen in advance to the extent that even if the uncontrollable released moisture fluctuates, it will hardly affect the film thickness.
If oxidation is performed within a range where the relationship ox6c logN2G holds true, variations will disappear.

本発明はこのような考えに基づいて案出したものである
The present invention was devised based on this idea.

なお石英管、半導体基体及び半導体基体の支持体等の酸
化雰囲気系からの放出水分の最大値は、−例として約2
1)pmであったと記したが、この値は石英管の内径、
長さ、材質及び乾燥状態又は半導体基体の乾燥状態、投
入数量あるいは導入ガスの流量など様々な要因で変わっ
てぐる。従って導入酸化性ガスに添加すべき水分量は、
それぞれの酸化系での前記放出水分の最大値以上でなけ
れば本発明の効果は得られない。また添加水分が多いと
酸化膜の生成速度が大きくな勺、薄膜への対応が難しく
なるので実用的には11000pp以下が望ましい。
Note that the maximum value of moisture released from an oxidizing atmosphere system such as a quartz tube, a semiconductor substrate, and a support for a semiconductor substrate is - for example, about 2
1) Although it was stated that it was pm, this value is based on the inner diameter of the quartz tube,
It varies depending on various factors such as length, material and drying state or drying state of the semiconductor substrate, quantity of input, and flow rate of introduced gas. Therefore, the amount of water that should be added to the introduced oxidizing gas is:
The effects of the present invention cannot be obtained unless the amount of water released is equal to or greater than the maximum value in each oxidation system. In addition, if the amount of added water is large, it becomes difficult to handle thin films with a high rate of oxide film formation, so it is practically desirable that the amount of water is 11,000 pp or less.

以上説明したように本発明によれば不可制御の放出水分
の影響がなくなるので生成酸化膜厚の均一性が極めて大
きく向上する。
As explained above, according to the present invention, the influence of uncontrolled released water is eliminated, so the uniformity of the thickness of the produced oxide film is greatly improved.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例について説明する。 Examples of the present invention will be described below.

第2図は本発明の一実施例の酸化系全体を示したもので
ある。用いた半導体基体は面方位(100)n型導電性
、抵抗率的20Ωm、直径76w1厚み500μmのシ
リコンウエノ51(20枚)である。まずシリコンウエ
ノS1を900Cに保たれた石英管2内に石英−治具3
と共に挿入する。石英管2内に水分を100 ppm含
んだ酸素を3t/−流し、10〇−保持した後、シリコ
ンウエノ・1を石英管2から取シ出した。石英管10は
加熱炉12内に配備されている。なお水分100 [)
I)mは次のようにして添加した。まず酸素をガス精製
装置4を通して水分濃度を0.5ppm程度にする。
FIG. 2 shows the entire oxidation system of one embodiment of the present invention. The semiconductor substrates used were silicon wafers 51 (20 pieces) having a plane orientation of (100), n-type conductivity, resistivity of 20 Ωm, diameter of 76 w, and thickness of 500 μm. First, silicon Ueno S1 is placed in a quartz tube 2 kept at 900C and a quartz jig 3 is placed inside the quartz tube 2.
Insert with. After flowing 3 tons of oxygen containing 100 ppm of moisture into the quartz tube 2 and holding it at 100, Silicon Ueno-1 was taken out from the quartz tube 2. A quartz tube 10 is placed inside a heating furnace 12 . In addition, moisture 100 [)
I)m was added as follows. First, oxygen is passed through the gas purifier 4 to a moisture concentration of about 0.5 ppm.

次にこの乾燥酸素を2つに分枝させ、その一方は直接石
英管2内に入るようにして、他の一方は恒温槽5で10
Cに保った石英容器6内の純水7の表面を前記乾燥酸素
が通るようにした。石英管20手前には、水分濃度計8
がアシ、これで水分量をチェックし、バルブ9〜1工で
水分濃度が1100ppになるように調整した。
Next, this dry oxygen is branched into two parts, one of which goes directly into the quartz tube 2, and the other part of which is kept in a constant temperature bath 5 for 10 minutes.
The dry oxygen was allowed to pass through the surface of the pure water 7 in the quartz container 6 which was maintained at a temperature of 2.5 °C. In front of the quartz tube 20, there is a moisture concentration meter 8.
Now I checked the water content and adjusted the water concentration to 1100 pp with valve 9-1.

シリコンウエノ・1に形成された酸化膜厚の評価にはエ
リプソメータを用いた。膜厚の測定箇所は、各ウェハに
ついて中心1点及び周辺4点(クリコンウェハの端から
10mmの点で相互に90°の角度をもつ位置)の計5
点である。このようにして全ウェハ(20枚)を測定し
た。さらに同様の実験を10ロツトに行ない、再現性を
確認した結果を第3図中の曲線Aで示した。また比較の
ために、水分を添加しない従来法での実験(導入酸素中
の水分濃度は0,5〜0.6ppm)も10ロット行な
い、第3図中に曲線Bで示した。なお本発明の実施例と
酸化膜厚を揃えるため従来法での実験では900G、1
20−の熱処理をした。この結果、第3図の曲線A、B
から明らかなように本発明の実施例は従来法に比ベロシ
ト間のばらつきが極めて小さく、本発明の効果が確認さ
れた。
An ellipsometer was used to evaluate the thickness of the oxide film formed on Silicon Ueno-1. The film thickness was measured at a total of 5 points for each wafer: 1 point in the center and 4 points on the periphery (points 10 mm from the edge of the Crycon wafer and at 90° angles to each other).
It is a point. All wafers (20 wafers) were measured in this manner. Furthermore, similar experiments were conducted on 10 lots, and the reproducibility was confirmed. The results are shown by curve A in FIG. For comparison, 10 lots were also conducted using the conventional method without adding water (water concentration in introduced oxygen was 0.5 to 0.6 ppm), and are shown as curve B in FIG. In order to match the oxide film thickness with the example of the present invention, in the experiment using the conventional method, 900G, 1
A heat treatment of 20- was carried out. As a result, curves A and B in Figure 3
As is clear from the above, the variation between velocities in the example of the present invention was extremely small compared to the conventional method, and the effect of the present invention was confirmed.

また酸素と窒素の混合気体(酸素流量0.3t/−・窒
素流量2.7t/m)中に50 ppmの水分を添加し
た雰囲気中でシリコンウェハ・を100OC。
In addition, silicon wafers were heated at 100 OC in an atmosphere containing 50 ppm of water in a mixed gas of oxygen and nitrogen (oxygen flow rate: 0.3 t/-, nitrogen flow rate: 2.7 t/m).

100順の熱処理(他の条件は前記実施例と同様)した
結果を第4図の曲線Cで示した。また第4図の曲線りは
1000C,115−の熱処理をした従来法の結果を示
す。これらの結果から明らかなように本発明の実施例は
従来法に比べばらつきが極めて小さくなっておシ、本発
明の効果が確認できた。さらに酸化温度、時間、酸素分
圧及び添加水分量を種々変えて実験してみても結果は同
様で本発明の効果が確認できた。
The results of heat treatment in the order of 100 (other conditions were the same as in the previous example) are shown by curve C in FIG. Moreover, the curved line in FIG. 4 shows the result of the conventional method in which heat treatment was performed at 1000C and 115-degrees. As is clear from these results, the variation in the examples of the present invention was extremely small compared to the conventional method, and the effects of the present invention were confirmed. Furthermore, even when experiments were carried out by varying the oxidation temperature, time, oxygen partial pressure, and amount of added water, the results were similar, confirming the effect of the present invention.

なお上記の実施例では、乾燥酸素あるいは酸素と窒素の
混合気体中に微量の水分を添加する方法に、主も簡単な
方法として手動パルプによるバイパス法を用いたが、微
量水分量が精度よく制御できる方法であれば他のどの様
な方法であっても本発明の効果を奏することができる。
In the above example, a bypass method using manual pulp was mainly used as a simple method to add a small amount of moisture to dry oxygen or a mixed gas of oxygen and nitrogen, but it is possible to control the amount of small amount of moisture with precision. The effects of the present invention can be achieved by any other method as long as it is possible.

第5.第6図に微量水分制御システムの一例を示した。Fifth. Figure 6 shows an example of a trace moisture control system.

まず第5図について説明する。第5図のシステムはガス
精製装置4、水分添加装置13、水分センサー14から
なる。ガス精製装置4によp1原料ガス中の炭化水素な
どの不純物や不要水分等を除去し、次に水分添加装置1
3によシ所定量の水分を添加する。水分添加装置13を
出たガスの水分濃度を水分センサー14にて検知し、所
望の水分濃度になるように水分添加装置13にフィード
バックをかけて添加水分を精度よくコントロールしてい
る。
First, FIG. 5 will be explained. The system shown in FIG. 5 includes a gas purification device 4, a moisture addition device 13, and a moisture sensor 14. The gas purification device 4 removes impurities such as hydrocarbons and unnecessary moisture from the p1 source gas, and then the moisture addition device 1
Add a predetermined amount of water to step 3. The moisture concentration of the gas exiting the moisture addition device 13 is detected by a moisture sensor 14, and feedback is applied to the moisture addition device 13 to accurately control the added moisture so that the desired moisture concentration is achieved.

次に第6図について説明する。第6図のシステムはガス
精製装置4、水分添加装置13、水分除去装置15、水
分センサー14からなる。まず第5図の場合と同様に原
料ガスを精製した後、水分添加装置13によシ、所望の
水分濃度よシ高い濃度の一定量の水分を添加する。水分
添加装置13から出たガスを水分除去装置15に通し、
所定量の水分を除去する。水分除去装置15から出たガ
スの水分濃度を水分センサー15にて検知して水分除去
装置15にフィードバックをかけて水分除去量を制御す
ることによシ、所望の水分濃度に精度よくコントロール
している。また第6図において、水分添加装置13にも
フィードバックをかけて水分添加量をも同時に制御して
もよい。
Next, FIG. 6 will be explained. The system shown in FIG. 6 includes a gas purification device 4, a moisture addition device 13, a moisture removal device 15, and a moisture sensor 14. First, the raw material gas is purified in the same manner as in the case of FIG. 5, and then a certain amount of water at a concentration higher than the desired water concentration is added using the water addition device 13. The gas emitted from the moisture addition device 13 is passed through the moisture removal device 15,
Remove a predetermined amount of moisture. By detecting the moisture concentration of the gas emitted from the moisture removal device 15 with the moisture sensor 15 and controlling the amount of moisture removed by applying feedback to the moisture removal device 15, the moisture concentration can be precisely controlled to a desired moisture concentration. There is. Further, in FIG. 6, feedback may also be applied to the water addition device 13 to control the amount of water added at the same time.

〔発明の効果〕〔Effect of the invention〕

このように本発明によれば酸化膜が薄い領域でも膜厚の
均一性、再現性が極めてよい酸化法が実現できるのでM
O8/LSI等の特性及び製造歩留を大幅に向上できる
In this way, according to the present invention, an oxidation method with extremely good film thickness uniformity and reproducibility can be realized even in areas where the oxide film is thin.
The characteristics and manufacturing yield of O8/LSI etc. can be greatly improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は導入酸素中に含まれる水分濃度とこの雰囲気ガ
ス中で熱処理したシリコン、ウェハの酸化膜厚の関係を
示す図、第2図は本発明の一実施例における酸化系を示
す図、第3図、第4図は本発明によシ酸化した一実施例
の酸化膜厚のばらつき状況と従来法のばらつき状況を示
す図、第5図。 第6図は微量水分の制御システムの例を示す図である。 1・・・シリコンウェハ、2・・・石英管、3・・・ウ
ェハホルダー、4・・・ガス精製装置、5・・・恒温槽
、6・・・純水用石英容器、7・・・純水、8・・・水
分溌度計、9〜11・・・パルプ、12・・・加熱炉、
13・・・水分添加装第1目 4\両(系中+:當−3:+It 3L’if** N
Hzo(F’Pm )も3目 口・ソト1115 0ット者ド3 亮6図
FIG. 1 is a diagram showing the relationship between the moisture concentration contained in introduced oxygen and the oxide film thickness of silicon and wafers heat-treated in this atmospheric gas, and FIG. 2 is a diagram showing the oxidation system in one embodiment of the present invention. FIGS. 3 and 4 are diagrams showing variations in oxide film thickness in an example of oxidation according to the present invention and variations in the conventional method, and FIG. FIG. 6 is a diagram showing an example of a trace moisture control system. DESCRIPTION OF SYMBOLS 1... Silicon wafer, 2... Quartz tube, 3... Wafer holder, 4... Gas purification device, 5... Constant temperature chamber, 6... Quartz container for pure water, 7... Pure water, 8... Moisture permeability meter, 9-11... Pulp, 12... Heating furnace,
13... Moisture addition device 1st eye 4\both (in the system +: -3: +It 3L'if** N
Hzo (F'Pm) also 3rd mouth, soto 1115 0t person do 3 Ryo 6 figure

Claims (1)

【特許請求の範囲】 1、微量の水分が添加された酸化雰囲気中ス中で半導体
基体を加熱処理して半導体基体上に酸化膜を形成するこ
とを特徴とする半導体素子の製造法。 2、第1項において、添加される微量の水分量は酸化雰
囲気中が放出する最大水分量以上で、11000pp 
以下の量であることを特徴とする半導体素子の製造法。
[Scope of Claims] 1. A method for manufacturing a semiconductor device, which comprises heating a semiconductor substrate in an oxidizing atmosphere to which a trace amount of moisture is added to form an oxide film on the semiconductor substrate. 2. In item 1, the trace amount of water added is greater than the maximum amount of water released in the oxidizing atmosphere, and is 11,000 pp.
A method for manufacturing a semiconductor device, characterized in that the amount is as follows.
JP58213941A 1983-11-16 1983-11-16 Manufacture of semiconductor element Pending JPS60107840A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58213941A JPS60107840A (en) 1983-11-16 1983-11-16 Manufacture of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58213941A JPS60107840A (en) 1983-11-16 1983-11-16 Manufacture of semiconductor element

Publications (1)

Publication Number Publication Date
JPS60107840A true JPS60107840A (en) 1985-06-13

Family

ID=16647578

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58213941A Pending JPS60107840A (en) 1983-11-16 1983-11-16 Manufacture of semiconductor element

Country Status (1)

Country Link
JP (1) JPS60107840A (en)

Cited By (4)

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Publication number Priority date Publication date Assignee Title
US5880041A (en) * 1994-05-27 1999-03-09 Motorola Inc. Method for forming a dielectric layer using high pressure
US6239041B1 (en) 1997-03-05 2001-05-29 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US7049187B2 (en) 2001-03-12 2006-05-23 Renesas Technology Corp. Manufacturing method of polymetal gate electrode
US7053459B2 (en) 2001-03-12 2006-05-30 Renesas Technology Corp. Semiconductor integrated circuit device and process for producing the same

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5880041A (en) * 1994-05-27 1999-03-09 Motorola Inc. Method for forming a dielectric layer using high pressure
US6962881B2 (en) 1997-03-05 2005-11-08 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US7053007B2 (en) 1997-03-05 2006-05-30 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6518201B1 (en) 1997-03-05 2003-02-11 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6518202B2 (en) 1997-03-05 2003-02-11 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6528431B2 (en) 1997-03-05 2003-03-04 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit drive using an oxygen and hydrogen catalyst
US6569780B2 (en) 1997-03-05 2003-05-27 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US6596650B2 (en) 1997-03-05 2003-07-22 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US7008880B2 (en) 1997-03-05 2006-03-07 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US7799690B2 (en) 1997-03-05 2010-09-21 Renesas Electronics Corporation Method for fabricating semiconductor integrated circuit device
US6962880B2 (en) 1997-03-05 2005-11-08 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6855642B2 (en) 1997-03-05 2005-02-15 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6239041B1 (en) 1997-03-05 2001-05-29 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US7250376B2 (en) 1997-03-05 2007-07-31 Renesas Technology Corp. Method for fabricating semiconductor integrated circuit device
US6417114B2 (en) 1997-03-05 2002-07-09 Hitachi, Ltd. Method for fabricating semiconductor integrated circuit device
US7144766B2 (en) 2001-03-12 2006-12-05 Renesas Technology Corp. Method of manufacturing semiconductor integrated circuit device having polymetal gate electrode
US7053459B2 (en) 2001-03-12 2006-05-30 Renesas Technology Corp. Semiconductor integrated circuit device and process for producing the same
US7300833B2 (en) 2001-03-12 2007-11-27 Renesas Technology Corp. Process for producing semiconductor integrated circuit device
US7049187B2 (en) 2001-03-12 2006-05-23 Renesas Technology Corp. Manufacturing method of polymetal gate electrode
US7632744B2 (en) 2001-03-12 2009-12-15 Renesas Technology Corp. Semiconductor integrated circuit device and process for manufacturing the same
US7375013B2 (en) 2001-03-12 2008-05-20 Renesas Technology Corp. Semiconductor integrated circuit device and process for manufacturing the same

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