Nothing Special   »   [go: up one dir, main page]

JPS6482646A - Connection of integrated circuit element - Google Patents

Connection of integrated circuit element

Info

Publication number
JPS6482646A
JPS6482646A JP62241716A JP24171687A JPS6482646A JP S6482646 A JPS6482646 A JP S6482646A JP 62241716 A JP62241716 A JP 62241716A JP 24171687 A JP24171687 A JP 24171687A JP S6482646 A JPS6482646 A JP S6482646A
Authority
JP
Japan
Prior art keywords
bumps
lead
electrodes
integrated circuit
circuit element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62241716A
Other languages
Japanese (ja)
Inventor
Fumiaki Yamada
Hiroaki Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62241716A priority Critical patent/JPS6482646A/en
Publication of JPS6482646A publication Critical patent/JPS6482646A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To easily connect the electrodes of an integrated circuit element to opponent conductors by forming by plating outer and inner lead bumps at both ends of a finger lead. CONSTITUTION:A tape carrier 1 is formed by laminating in advance the patterns of finger leads 2 to be connected to the electrodes 5 of an IC chip 4 on both side polyimide films. Windows are opened on both side faces to expose both ends of the lead 2. The exposed both ends are Ni-plated as diffusion preventive layers 21, then Au-plated on the Ni films, one of which becomes outer lead bumps 91 and the other of which becomes inner lead bumps 92. The electrodes 5 of the chip 4 are superposed on the bumps 91, conductors 8 to be connected are positioned on the bumps 92, and simultaneously connected by applying heat and pressure thereto by a bonding tool.
JP62241716A 1987-09-25 1987-09-25 Connection of integrated circuit element Pending JPS6482646A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62241716A JPS6482646A (en) 1987-09-25 1987-09-25 Connection of integrated circuit element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62241716A JPS6482646A (en) 1987-09-25 1987-09-25 Connection of integrated circuit element

Publications (1)

Publication Number Publication Date
JPS6482646A true JPS6482646A (en) 1989-03-28

Family

ID=17078472

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62241716A Pending JPS6482646A (en) 1987-09-25 1987-09-25 Connection of integrated circuit element

Country Status (1)

Country Link
JP (1) JPS6482646A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0878472A (en) * 1994-09-05 1996-03-22 Hitachi Cable Ltd Semiconductor device and base body therefor
US5504035A (en) * 1989-08-28 1996-04-02 Lsi Logic Corporation Process for solder ball interconnecting a semiconductor device to a substrate using a noble metal foil embedded interposer substrate
EP0683517A3 (en) * 1994-05-09 1997-04-02 Nec Corp Semiconductor device having semiconductor chip bonded to circuit board through bumps and process of mounting thereof.
KR100236885B1 (en) * 1996-02-01 2000-01-15 다니구찌 이찌로오 Semiconductor device and fabrication method thereof
CN105491643A (en) * 2014-09-15 2016-04-13 酷派软件技术（深圳）有限公司 Dynamic network selection method and device, and terminal equipment

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5504035A (en) * 1989-08-28 1996-04-02 Lsi Logic Corporation Process for solder ball interconnecting a semiconductor device to a substrate using a noble metal foil embedded interposer substrate
EP0683517A3 (en) * 1994-05-09 1997-04-02 Nec Corp Semiconductor device having semiconductor chip bonded to circuit board through bumps and process of mounting thereof.
JPH0878472A (en) * 1994-09-05 1996-03-22 Hitachi Cable Ltd Semiconductor device and base body therefor
KR100236885B1 (en) * 1996-02-01 2000-01-15 다니구찌 이찌로오 Semiconductor device and fabrication method thereof
CN105491643A (en) * 2014-09-15 2016-04-13 酷派软件技术（深圳）有限公司 Dynamic network selection method and device, and terminal equipment

Similar Documents

Publication Publication Date Title
TW395032B (en) Semiconductor device and its manufacturing method
HK46992A (en) Integrated circuit device having stacked conductive layers connecting circuit elements therethrough
JPS6428930A (en) Semiconductor device
JPS5731166A (en) Semiconductor device
AU2002353894A1 (en) A method of stacking layers containing encapsulated integrated circuit chips with one or more overlying interconnect layers
JPS6480032A (en) Semiconductor device and manufacture thereof
EP0559384A3 (en) Devices with tape automated bonding
JPS6482646A (en) Connection of integrated circuit element
JPS6419737A (en) Multilayer interconnection tape carrier
EP1041618A4 (en) Semiconductor device and manufacturing method thereof, circuit board and electronic equipment
JPS5571052A (en) Substrate for semiconductor device
JPS57107059A (en) Semiconductor package
EP0264128A3 (en) Jumper chip for semiconductor devices
JPS6477136A (en) Tape carrier for semiconductor device
JPS5487173A (en) Semiconductor device
JPS5643816A (en) Structure of bonding pad part
JPS57133651A (en) Semiconductor integrated circuit device
JPS57164552A (en) Lead-frame for semiconductor device
JPS5778146A (en) Integrated circuit device
JPS6464332A (en) Manufacture of tape carrier type semiconductor device
JPS6414935A (en) Semiconductor device
JPS6477135A (en) Semiconductor device
JPS56148856A (en) Film carrier
JPS57165275A (en) Thermal head device
JPS6468935A (en) Face-down bonding of semiconductor integrated circuit device