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JPS6480075A - Bipolar type integrated circuit - Google Patents

Bipolar type integrated circuit

Info

Publication number
JPS6480075A
JPS6480075A JP62237679A JP23767987A JPS6480075A JP S6480075 A JPS6480075 A JP S6480075A JP 62237679 A JP62237679 A JP 62237679A JP 23767987 A JP23767987 A JP 23767987A JP S6480075 A JPS6480075 A JP S6480075A
Authority
JP
Japan
Prior art keywords
integrated circuit
insulator layer
bipolar type
collector
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62237679A
Other languages
Japanese (ja)
Inventor
Akira Yoshino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62237679A priority Critical patent/JPS6480075A/en
Publication of JPS6480075A publication Critical patent/JPS6480075A/en
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To accelerate the operational speed of an integrated circuit by a method wherein an insulator layer is provided between a buried impurity layer and a single crystal Si substrate in a bipolar type transistor while an isolating region is structured of a groove in depth reaching the insulator layer. CONSTITUTION:An insulator layer 103 is provided between a buried impurity layer (collector) 104 and a single crystal substrate 101 in an ordinary bipolar type transistor. An isolating region 115 between respective transistors is groove isolation-structured in depth reaching the insulator layer 108. In such a constitution, the capacitance between a collector 126 and a substrate 101 existing in an ordinary bipolar transistor as well as the other capacitance between a high concentration impurity region 110 for channel stopper below an element isolating region 115 and the collector 126 can be reduced notably to accelerate the operational speed of an integrated circuit.
JP62237679A 1987-09-21 1987-09-21 Bipolar type integrated circuit Pending JPS6480075A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62237679A JPS6480075A (en) 1987-09-21 1987-09-21 Bipolar type integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62237679A JPS6480075A (en) 1987-09-21 1987-09-21 Bipolar type integrated circuit

Publications (1)

Publication Number Publication Date
JPS6480075A true JPS6480075A (en) 1989-03-24

Family

ID=17018899

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62237679A Pending JPS6480075A (en) 1987-09-21 1987-09-21 Bipolar type integrated circuit

Country Status (1)

Country Link
JP (1) JPS6480075A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5323055A (en) * 1990-08-27 1994-06-21 Fujitsu Limited Semiconductor device with buried conductor and interconnection layer
JPH0883837A (en) * 1994-09-09 1996-03-26 Nec Corp Semiconductor device and manufacturing method thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61114571A (en) * 1984-11-09 1986-06-02 Fujitsu Ltd Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61114571A (en) * 1984-11-09 1986-06-02 Fujitsu Ltd Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5323055A (en) * 1990-08-27 1994-06-21 Fujitsu Limited Semiconductor device with buried conductor and interconnection layer
JPH0883837A (en) * 1994-09-09 1996-03-26 Nec Corp Semiconductor device and manufacturing method thereof

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