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JPS6451639A - Bump forming method for electronic part - Google Patents

Bump forming method for electronic part

Info

Publication number
JPS6451639A
JPS6451639A JP20818987A JP20818987A JPS6451639A JP S6451639 A JPS6451639 A JP S6451639A JP 20818987 A JP20818987 A JP 20818987A JP 20818987 A JP20818987 A JP 20818987A JP S6451639 A JPS6451639 A JP S6451639A
Authority
JP
Japan
Prior art keywords
bump
pad
solder
ferromagnetic film
onto
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20818987A
Other languages
Japanese (ja)
Inventor
Toshiko Suwa
Takashi Kanamori
Masaru Kimura
Yoshiro Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP20818987A priority Critical patent/JPS6451639A/en
Publication of JPS6451639A publication Critical patent/JPS6451639A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11334—Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3478—Applying solder preforms; Transferring prefabricated solder patterns
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To form a ball-shaped bump simply at an arbitrary position, and to conduct bump connection free from short-circuit accident due to a solder flow by shaping a pad to a bump forming section for connecting an electronic part by a ferromagnetic film, magnetizing the pad and attracting a metallic ball coated with solder onto the pad. CONSTITUTION:A conductor wiring layer 12 is shaped onto a substrate 11 through an arbitrary method, and a ferromagnetic film pad 13 composed of a material having high holding power is formed to a section requiring a connecting bump on the conductor wiring layer 12 to a ring shape through a method such as sputtering, evaporation, plating, etc. The ferromagnetic film pad 13 is magnetized uniformly. An iron ball 15 coated with solder 14 is attracted onto the magnetized ferromagnetic film pad 13'. Accordingly, since the quantity of solder used for connection may be reduced, no short-circuit accident is generated by a solder flow with an adjacent bump, thus connecting the bump with high reliability.
JP20818987A 1987-08-24 1987-08-24 Bump forming method for electronic part Pending JPS6451639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20818987A JPS6451639A (en) 1987-08-24 1987-08-24 Bump forming method for electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20818987A JPS6451639A (en) 1987-08-24 1987-08-24 Bump forming method for electronic part

Publications (1)

Publication Number Publication Date
JPS6451639A true JPS6451639A (en) 1989-02-27

Family

ID=16552137

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20818987A Pending JPS6451639A (en) 1987-08-24 1987-08-24 Bump forming method for electronic part

Country Status (1)

Country Link
JP (1) JPS6451639A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6803664B2 (en) * 2001-04-27 2004-10-12 Shinko Electric Industries Co., Ltd. Semiconductor package
KR100659527B1 (en) * 2003-10-22 2006-12-20 삼성전자주식회사 Semiconductor chip having three dimension type ubm for flip chip bonding and mounting structure thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6803664B2 (en) * 2001-04-27 2004-10-12 Shinko Electric Industries Co., Ltd. Semiconductor package
KR100896026B1 (en) * 2001-04-27 2009-05-11 신꼬오덴기 고교 가부시키가이샤 Semiconductor package
KR100659527B1 (en) * 2003-10-22 2006-12-20 삼성전자주식회사 Semiconductor chip having three dimension type ubm for flip chip bonding and mounting structure thereof

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