Nothing Special   »   [go: up one dir, main page]

JPS6442889A - Metallic wiring structure on printed substrate - Google Patents

Metallic wiring structure on printed substrate

Info

Publication number
JPS6442889A
JPS6442889A JP20040687A JP20040687A JPS6442889A JP S6442889 A JPS6442889 A JP S6442889A JP 20040687 A JP20040687 A JP 20040687A JP 20040687 A JP20040687 A JP 20040687A JP S6442889 A JPS6442889 A JP S6442889A
Authority
JP
Japan
Prior art keywords
wirings
substrate
space
adjacent
groove
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20040687A
Other languages
Japanese (ja)
Inventor
Masahiro Eda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20040687A priority Critical patent/JPS6442889A/en
Publication of JPS6442889A publication Critical patent/JPS6442889A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To improve the breakdown strength without widening the space between adjacent wirings by a method wherein a groove is provided between the adjacent wirings. CONSTITUTION:A groove 3 V-shaped in cross section is provided between adjacent metallic wirings 1 and 2 on a substrate 4. The dielectric breakdown takes place when a high voltage is impressed on between the adjacent wirings 1 and 2, where the breakdown occurs mainly due to the attachment such as moisture, dust, or the like deposited between the wirings 1 and 2 on the substrate 4 and the breakdown strength is proportional to the superficial space between the wirings 1 and 2 on the substrate 4. A groove 3 is provided between the metallic wirings 1 and 2, whereby the superficial space between the wirings 1 and 2 along the surface of the substrate 4 is made to increase without widening the space between the wirings 1 and 2, so that the breakdown strength is improved.
JP20040687A 1987-08-11 1987-08-11 Metallic wiring structure on printed substrate Pending JPS6442889A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20040687A JPS6442889A (en) 1987-08-11 1987-08-11 Metallic wiring structure on printed substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20040687A JPS6442889A (en) 1987-08-11 1987-08-11 Metallic wiring structure on printed substrate

Publications (1)

Publication Number Publication Date
JPS6442889A true JPS6442889A (en) 1989-02-15

Family

ID=16423787

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20040687A Pending JPS6442889A (en) 1987-08-11 1987-08-11 Metallic wiring structure on printed substrate

Country Status (1)

Country Link
JP (1) JPS6442889A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5408080A (en) * 1993-02-09 1995-04-18 Opticon Inc. Electronically triggered bar code scanner
JP2013131719A (en) * 2011-12-22 2013-07-04 Toyota Industries Corp Inductive element and induction device
JP2018093339A (en) * 2016-12-01 2018-06-14 住友電気工業株式会社 Driver circuit for optical transmitter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5408080A (en) * 1993-02-09 1995-04-18 Opticon Inc. Electronically triggered bar code scanner
JP2013131719A (en) * 2011-12-22 2013-07-04 Toyota Industries Corp Inductive element and induction device
JP2018093339A (en) * 2016-12-01 2018-06-14 住友電気工業株式会社 Driver circuit for optical transmitter

Similar Documents

Publication Publication Date Title
AU4680285A (en) Multilayer wiring substrate
FI883075A0 (en) Thermosetting silicone composition and method for coating the substrate with the composition
EP0180222A3 (en) Surface roughening method
DE3570945D1 (en) Electrical double layer capacitor and production of the same
EP0357088A3 (en) Multilayer wiring substrate
GB8406376D0 (en) Substrate having one finewired conductive layer
GB2198151B (en) Metallic coating on an inorganic substrate
GB8530151D0 (en) Coating metallic substrate
JPS6442889A (en) Metallic wiring structure on printed substrate
ATE29146T1 (en) SELF-ADHESIVE MATERIAL AND METHOD OF PRODUCTION.
FR2564037B1 (en) ALVEOLAR STRUCTURE FOR COVERING A CURVILINATED SURFACE AND METHOD FOR PRODUCING THE SAME
ES2015895B3 (en) TWO COMPONENT CARBON BRUSH.
GB2157590B (en) Non-slip surface
TW222313B (en) Electroplating method
AU580566B2 (en) Electronic processing with forms
GB8514823D0 (en) Forming insulator on patterned conductive layer
DE3571415D1 (en) Surface coating process
AU5018385A (en) Electronic key assemblies
IT8419669A0 (en) INTEGRATED ELECTRONIC COMPONENT FOR SURFACE ASSEMBLY.
IT1191680B (en) PROCESS FOR THE REALIZATION OF METALLIC HOLES IN A SUBSTRATE EQUIPPED WITH CONDUCTIVE AND RESISTIVE PATHS, AND PRODUCT OBTAINED WITH THE ABOVE PROCESS
AU3792785A (en) Non-slip surface
ZA849335B (en) Controllable pitch vaneaxial fans
DE3571783D1 (en) Electronic typewriter
GB2160712B (en) Forming conductive tracks on circuit boards
DE3275452D1 (en) Process of manufacturing printed wiring boards and printed wiring boards manufactured by the same