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JPS6419587A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS6419587A
JPS6419587A JP62176348A JP17634887A JPS6419587A JP S6419587 A JPS6419587 A JP S6419587A JP 62176348 A JP62176348 A JP 62176348A JP 17634887 A JP17634887 A JP 17634887A JP S6419587 A JPS6419587 A JP S6419587A
Authority
JP
Japan
Prior art keywords
bus line
write
turned
rwb
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62176348A
Other languages
Japanese (ja)
Other versions
JPH07122990B2 (en
Inventor
Takashi Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62176348A priority Critical patent/JPH07122990B2/en
Publication of JPS6419587A publication Critical patent/JPS6419587A/en
Publication of JPH07122990B2 publication Critical patent/JPH07122990B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Dram (AREA)

Abstract

PURPOSE:To realize a read or a write operation by one data bus line, by constituting a device so that the switching of the readout or the write of the data bus line can be performed by a transfer gate. CONSTITUTION:A read bus line RWB is commonly used for a read bus line and a write bus line. Firstly, since a write enable internal signal, the inverse of WE' is set at a high level and a WE' at a low level at the time of readout, a MOSFETQ1 is turned on, and a MOSFETQ2 is turned off. In other words, since a DIN buffer circuit 8 is cut off electrically, the bus line RWB functions as the lead bus line. Next, at the time of write, the signal, the inverse of WE' is set at the low level and the WE' at the high level, therefore, the FETQ1 is turned off and the Q3 turned on. Namely, since a sense amplifier circuit 5 is cut off electrically, the bus line RWB functions as the write bus line.
JP62176348A 1987-07-14 1987-07-14 Semiconductor memory device Expired - Lifetime JPH07122990B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62176348A JPH07122990B2 (en) 1987-07-14 1987-07-14 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62176348A JPH07122990B2 (en) 1987-07-14 1987-07-14 Semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS6419587A true JPS6419587A (en) 1989-01-23
JPH07122990B2 JPH07122990B2 (en) 1995-12-25

Family

ID=16012028

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62176348A Expired - Lifetime JPH07122990B2 (en) 1987-07-14 1987-07-14 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPH07122990B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04228179A (en) * 1990-05-18 1992-08-18 Nec Corp Semiconductor memory device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54114132A (en) * 1978-02-27 1979-09-06 Cho Lsi Gijutsu Kenkyu Kumiai Dynamic mis memory
JPS57167186A (en) * 1981-04-08 1982-10-14 Nec Corp Memory circuit
JPS60197997A (en) * 1984-03-21 1985-10-07 Hitachi Ltd Semiconductor storage device
JPS62109292A (en) * 1985-11-07 1987-05-20 Nec Corp Dynamic random access memory

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54114132A (en) * 1978-02-27 1979-09-06 Cho Lsi Gijutsu Kenkyu Kumiai Dynamic mis memory
JPS57167186A (en) * 1981-04-08 1982-10-14 Nec Corp Memory circuit
JPS60197997A (en) * 1984-03-21 1985-10-07 Hitachi Ltd Semiconductor storage device
JPS62109292A (en) * 1985-11-07 1987-05-20 Nec Corp Dynamic random access memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04228179A (en) * 1990-05-18 1992-08-18 Nec Corp Semiconductor memory device

Also Published As

Publication number Publication date
JPH07122990B2 (en) 1995-12-25

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