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JPS5364439A - Linear coversion system - Google Patents

Linear coversion system

Info

Publication number
JPS5364439A
JPS5364439A JP13904576A JP13904576A JPS5364439A JP S5364439 A JPS5364439 A JP S5364439A JP 13904576 A JP13904576 A JP 13904576A JP 13904576 A JP13904576 A JP 13904576A JP S5364439 A JPS5364439 A JP S5364439A
Authority
JP
Japan
Prior art keywords
linear
coversion system
coversion
vector
product
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13904576A
Other languages
Japanese (ja)
Other versions
JPS5632662B2 (en
Inventor
Shigeki Shibayama
Tsutomu Kamimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP13904576A priority Critical patent/JPS5364439A/en
Publication of JPS5364439A publication Critical patent/JPS5364439A/en
Publication of JPS5632662B2 publication Critical patent/JPS5632662B2/ja
Granted legal-status Critical Current

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  • Complex Calculations (AREA)

Abstract

PURPOSE: To obtain a linear conversion system which is capable of an effective calculation for the product of sparse matrix and vector.
COPYRIGHT: (C)1978,JPO&Japio
JP13904576A 1976-11-20 1976-11-20 Linear coversion system Granted JPS5364439A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13904576A JPS5364439A (en) 1976-11-20 1976-11-20 Linear coversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13904576A JPS5364439A (en) 1976-11-20 1976-11-20 Linear coversion system

Publications (2)

Publication Number Publication Date
JPS5364439A true JPS5364439A (en) 1978-06-08
JPS5632662B2 JPS5632662B2 (en) 1981-07-29

Family

ID=15236166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13904576A Granted JPS5364439A (en) 1976-11-20 1976-11-20 Linear coversion system

Country Status (1)

Country Link
JP (1) JPS5364439A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02273867A (en) * 1989-04-14 1990-11-08 Sharp Corp Matrix arithmetic unit
JPH0484266A (en) * 1990-07-26 1992-03-17 Fujitsu Ltd Inverse matrix area expansion/compression system
US9684602B2 (en) 2015-03-11 2017-06-20 Kabushiki Kaisha Toshiba Memory access control device, cache memory and semiconductor device
US9990288B2 (en) 2014-03-13 2018-06-05 Kabushiki Kaisha Toshiba Information processing device and data structure
JP2020500365A (en) * 2016-10-27 2020-01-09 グーグル エルエルシー Utilization of Sparsity of Input Data in Neural Network Computing Unit
US11379707B2 (en) 2016-10-27 2022-07-05 Google Llc Neural network instruction set architecture
US11422801B2 (en) 2016-10-27 2022-08-23 Google Llc Neural network compute tile

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016057763A (en) 2014-09-08 2016-04-21 株式会社東芝 Cache device and processor
US20230278141A1 (en) 2020-08-20 2023-09-07 Keiichi Serizawa Pattern forming apparatus

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02273867A (en) * 1989-04-14 1990-11-08 Sharp Corp Matrix arithmetic unit
JPH0484266A (en) * 1990-07-26 1992-03-17 Fujitsu Ltd Inverse matrix area expansion/compression system
US9990288B2 (en) 2014-03-13 2018-06-05 Kabushiki Kaisha Toshiba Information processing device and data structure
US9684602B2 (en) 2015-03-11 2017-06-20 Kabushiki Kaisha Toshiba Memory access control device, cache memory and semiconductor device
JP2020500365A (en) * 2016-10-27 2020-01-09 グーグル エルエルシー Utilization of Sparsity of Input Data in Neural Network Computing Unit
US11106606B2 (en) 2016-10-27 2021-08-31 Google Llc Exploiting input data sparsity in neural network compute units
US11379707B2 (en) 2016-10-27 2022-07-05 Google Llc Neural network instruction set architecture
US11422801B2 (en) 2016-10-27 2022-08-23 Google Llc Neural network compute tile
US11816045B2 (en) 2016-10-27 2023-11-14 Google Llc Exploiting input data sparsity in neural network compute units
US11816480B2 (en) 2016-10-27 2023-11-14 Google Llc Neural network compute tile
US12061968B2 (en) 2016-10-27 2024-08-13 Google Llc Neural network instruction set architecture

Also Published As

Publication number Publication date
JPS5632662B2 (en) 1981-07-29

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