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JPS52132760A - Pll circuit - Google Patents

Pll circuit

Info

Publication number
JPS52132760A
JPS52132760A JP4974076A JP4974076A JPS52132760A JP S52132760 A JPS52132760 A JP S52132760A JP 4974076 A JP4974076 A JP 4974076A JP 4974076 A JP4974076 A JP 4974076A JP S52132760 A JPS52132760 A JP S52132760A
Authority
JP
Japan
Prior art keywords
pll circuit
quickering
thru
jump
provision
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4974076A
Other languages
Japanese (ja)
Other versions
JPS5912049B2 (en
Inventor
Noritaka Nakano
Kuniaki Mizuno
Yutaka Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP51049740A priority Critical patent/JPS5912049B2/en
Publication of JPS52132760A publication Critical patent/JPS52132760A/en
Publication of JPS5912049B2 publication Critical patent/JPS5912049B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To enable high performance by quickering the drawing response thru the provision of time constant short circuit and hold circuit and by eliminating the effect of a jump having a large interruption.
JP51049740A 1976-04-30 1976-04-30 PLL circuit Expired JPS5912049B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51049740A JPS5912049B2 (en) 1976-04-30 1976-04-30 PLL circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51049740A JPS5912049B2 (en) 1976-04-30 1976-04-30 PLL circuit

Publications (2)

Publication Number Publication Date
JPS52132760A true JPS52132760A (en) 1977-11-07
JPS5912049B2 JPS5912049B2 (en) 1984-03-21

Family

ID=12839573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51049740A Expired JPS5912049B2 (en) 1976-04-30 1976-04-30 PLL circuit

Country Status (1)

Country Link
JP (1) JPS5912049B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56119552A (en) * 1980-02-25 1981-09-19 Mitsubishi Electric Corp Timing reproducing device
JPS57109423A (en) * 1980-12-26 1982-07-07 Sony Corp Variable frequency control circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56119552A (en) * 1980-02-25 1981-09-19 Mitsubishi Electric Corp Timing reproducing device
JPS57109423A (en) * 1980-12-26 1982-07-07 Sony Corp Variable frequency control circuit
JPH026457B2 (en) * 1980-12-26 1990-02-09 Sony Corp

Also Published As

Publication number Publication date
JPS5912049B2 (en) 1984-03-21

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