JPS5924878A - Electronic musical instrument - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

The present invention relates to an electronic musical instrument that automatically controls the progress of an automatic performance in response to key presses on a keyboard. The music data is sequentially read out by counting 1i) r, and the performance timing of the music data and the key pressing on the keyboard of the key corresponding to the music data are compared. However, in this comparison, when the key press timing is earlier than the niJ performance timing, the automatic performance is started at high speed, and when the key press timing is later than the performance timing, the progress of the automatic IJ performance is temporarily stopped. By controlling the frequency and its generation, we aim to match the progression between key-depressed performance and automatic performance.
No. 784. However, such conventional electronic musical instruments are designed for the practice of one part, such as a 1-day performance, and control the progress of automatic performance based on the performance of that part. and chords).In other words, it is not suitable for practicing playing one part (
When the melody, etc.) is played correctly, the other parts (the first
19, etc.), the automatic performance continues regardless of the performance, making it impossible to practice key presses for other parts. The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide an electronic musical instrument that automatically controls the progress and stop of an automatic performance in response to key press timings of a plurality of parts. Therefore, this invention aims at at least the first performance (melody).
When each performance data '&N is retrieved from the storage means for storing the first performance (chord) data and the second performance (chord) data based on the tempo clock that advances the self-b chord, the first. The second performance data is the first performance data on the keyboard. Compare it with the 113th+72nd performance data that is input corresponding to the second performance,
The compared first performance data at the performance timing of the first performance data read from the storage means (when the performances do not match, and the compared second performance data at the performance timing of the second performance data) When the tempo clocks do not match, the generation of the tempo clock is prohibited so that the progress of the keyboard performance of the plural parts and the automatic performance match.Hereinafter, the present invention will be explained in detail with reference to the accompanying drawings. FIG. 1 is a diagram showing an embodiment of an electronic musical instrument to which the present invention is applied. Auto = b Ban Qin (has residual oil. In addition, in SF mode, the sound of one key pressed on the accompaniment 8 board is the root note, and the chord extraction is specified by other appropriate means, This is a performance mode in which automatic bass notes and automatic chord notes are formed and produced based on this root note and the specified chord type. FC mode is a performance mode that generates root + g and chords fm based on the keys pressed on the accompaniment R board. detect,
This is a performance mode in which an automatic bass note is produced based on this root note and the other parts of the chord e (-), and the IIEQ note pressed on the accompaniment keyboard is used as an automatic chord note. 1 is one step fill, but -Lo key press area 1a
and for accompaniment by 1b, III! Board°1? Yohime τ
It functions as a J-day keyboard. Key tlJ, 1 plays melody 6 <accompaniment (chord) performance 1c corresponding L'(-
, 1111jfjj is pressed, the key press detection circuit 2
detects the pressed key and extracts the key information (
Key code) 'KC is time-divisionally output. key code K
For example, as shown in Bl'G1, the 2-bit octave code B2+ Bl represents the octave range, and the 4-pinto note code N4.Bl represents the 12 note names in the I off coupe. N3°N2. 2 of 6 bisoto consisting of N, and
The first chord bubble detection circuit 3 detects the key code KC ( out of the key code KC output from the key press detection circuit 2 in response to a key press in the key press area 1a). For example, the chord name is detected based on the key code KC corresponding to the first octave range shown in Table 1. During normal chord performance and FC mode, multiple key codes K are output from the key press detection circuit 2. A chord name is detected based on the combination of C, and 6-bit 11th issue name data sc indicating the detected chord name.
K C (4 bits indicating the note name of the root note of the chord) 2 bits indicating the types of ten chords (major, mica, 7th)
When the SF momo selection switch 4 is turned on, the signal S is pulled out.
When F/F is "1" (S li'%-)"o
VC detects the key code KC output from the key press detection circuit 2 and reads the key code KC and appropriate chord name data based on the chord type specified by -i[)RK
Output C. In addition, when in SF mode, press key fa area 1
There is usually one key code K c corresponding to a, but in consideration of the case where multiple key codes K C are input due to incorrect key presses, etc. Only the key code K C is detected. Based on the chord name data RK CK that can be output from the subordinate note forming circuit 5V and the one chord name detection circuit 3, a plurality of key codes CKC indicating chords (one consecutive line) are formed. Now, an example of the key code CKC formation that occurs in the subordinate sound formation circuit 5 is shown below.
When the chord type is major, the key code CI indicates the note that has an interval relationship of °C perfect 1st, major 3rd, perfect 51st to the root note (forms C, and when the chord type is mica, the root note For °C, the key code CK C is formed, which indicates the notes that are in the interval relationship of perfect 1st, minor 3rd, and perfect 5th.When the chord type is 7th, perfect 1st and major 3rd are formed for the seventh root. The selector 6 corresponds to the key pressed in the pressed key area 1a among the key codes CK outputted from the pressed key detection circuit 2. Only the key code KC output from the subtone forming circuit 5 is input to the A input, and the key code CKC output from the follower tone forming circuit 5 is input to the B input.
/-When FC is "1" (selects and outputs the key code CKC added to the sy mode and the IB force, and outputs the signal S F
Selects and outputs the key code K C that is added to the input when /F C is '0'. On the other hand, the automatic accompaniment pattern (Pi light generation circuit 7, selected by the rhythm selection switch (IU shown in Figure 1)) is output. A chord light if/t timing signal CI' corresponding to the rhythm tC, a bass sound generation timing signal +11', a rhythm pattern signal RP, and a bass pattern signal BP are generated by a tempo clock TCL outputted from a tempo control circuit 400, which will be described later. The pattern memory and address counter (!i't) are deleted from the pattern memory and address counter.The pattern memory contains a plurality of chord sound timing patterns for each rhythm 1σ, bass note ta note Z timing pattern, rhythm Bakun up and pace pa p-7. The pattern for each rhythm stored in this pattern memory is selected by the rhythm selection switch, and each selected pattern is selected by the tempo clock 'I'.
The count value of the address counter that divides CL is used as the address signal). Note that the chord sound generation timing signal CT and the bass sound sound generation timing signal 13
T l'i is a signal indicating the generation timing of the automatic Cho and automatic bass tones, respectively.P is a signal indicating the generation timing of the type of rhythm tone to be generated.P is a signal indicating the generation timing of the type of rhythm tone to be generated. BP is a signal indicating the pitch relationship corresponding to the automatic bass tone to be generated. The bass tone forming concave path 8 has been added η, the instrument has decayed iz, the chord name data 1ζK C added from the chord bubble detection υIII'S3 accepts the key code indicating the root note of the chord, and this key code is Enter the above bass pattern signal BP into the key code BK, which indicates the bass note having a predetermined pitch relationship.
form C. Among the key codes KC output from the push bowl detection circuit b'δ2, the sound generation channel allocation circuit 9 outputs the key codes KC output in response to the key press at 1b and melody, f.
The key code selected from the selector 6 is input as the key code corresponding to the chord, and the key code B K C output from the bass sound forming circuit 8 becomes the bass sound. Obligado tone pitch data ON output from a chord/opligado gutta extraction circuit 200, which will be described later, is input as a key code corresponding to the opligado tone. Pronunciation channel assignment times M 9 t: Melody sound channel that exclusively assigns the key code corresponding to the J, I, and D tones, a chord channel that assigns the key 2 that corresponds to the chord to - (V), and a dedicated bass tone It has a predetermined number of sound generation channels consisting of a bass sound channel to be assigned and an obbligato sound channel to which a key code corresponding to an opligado sound is exclusively assigned, and each key code to be inputted is appropriately assigned to these sound generation channels,
A musical tone signal is formed based on the key code KC* assigned and stored for each channel and added in a time-divisional manner to the key code KC*. Note that when in the SF mode or the FC mode, the musical tone forming circuit 10 generates a corresponding musical tone (Ej number d) based on the chord sound generation timing signal CT and the pace sound sound generation timing hs number BT generated from the automatic accompaniment pattern signal generation circuit 7. Opening/closing envelope control is performed for the musical tone id number I' formed by the musical tone forming circuit 10.
The signals are amplified by amplifier 1 and added to speaker 12, where they are produced as melody sounds, chords, bass sounds, and oprigade sounds. The rhythm sound source circuit 13 generates rhythm sound signals indicating various rhythm sounds according to the rhythm pattern (i4 RP) generated from the automatic accompaniment pattern signal generation circuit 7, and sends this to the speaker 12 via the amplifier 11 In addition, it is emitted as a rhythm sound.Next, the progress control of the automatic performance of the electronic musical instrument will be explained.First, the data format of the automatic performance data output from the external recording means 14 will be explained.The external recording means 14 is A magnetic card/tape, bunch card, barcode, etc., containing melody pitch data, melody note length data, obligado note pitch data, opligado note length data, and chord data in the order shown in Figure 2. It is recorded in the form of serial data. In addition, mark data DM and -DM5 are recorded at the beginning of each data to identify each data. The melody pitch data and the oprigade pitch data are each The melody note length data and obbligado note length data are the note 42γ or the note 19, respectively. The "-" number, 1), which indicates the note length, is composed of a 6-bit binary code.An example of note length data is shown in Table 2.The second table chord data is as follows: It contains chord name data indicating the name of the chord that should be generated: lII IT- and timing data indicating the chord generation timing, and is composed of binary: J-do of Jt6 binot and 10 pits, respectively. , the chord name data is read out at the same time as the first step of the oprigade pitch data written in iJ is read out, and the timing data is read out in conjunction with the first step of the oprigade pitch data of the chord name data, which is to be sounded at the same time. This corresponds to the storage address in the data memo January 6 after being transferred.The above data recorded in the external recorders Ig and H are read in the form of music data input device 1.5VC serial data. The music data input device 15 converts the read serial data into parallel data, and stores the melody pitch data, melody note length data, oprigade pitch data, oprigade note length data, and chord data in the data memory 1.
6, and also supplies the desired control data including mark data DM, to DM5 to RAM (random access memory) (to control circuit 17).The data memory 16 supplies each data Each group has a storage area, and each data group has five memory cells that output address signals corresponding to the corresponding register 1 (11 areas for writing and reading from the storage area). Counter 18a-18
This is done by the address counter 18r consisting of e. The 1ζAM input control circuit 17 controls writing of each data group supplied from the music data input device 15 to the data memory 16 for each storage area corresponding to each data in the data memory 16. When the mark data DMl is input, the counter 18a of the address counter [33] corresponding to the storage area of the melody pitch data is enabled, and f) the melody pitch data is sent from the iJ chestnut music data input device d]5. The counter 18a is incremented each time. The counter 18a outputs the n1 value as an address signal to the data memory 16, and melody sound 7 is sent to the address indicated by the address signal.
;Data/1! Enter Y. Note that, at the same time as the RAM input control circuit 17-1 manually inputs the mark data DM, the counter is set to the initial reset value 1 so that the address signal of the self-counter 18a indicates the first address of the storage area of the melody pitch data. do. When all the memo and pitch data have been written in this way, the mark data DM2 is input to the RAM write control circuit 17iI, and the data memo is written in the same manner as described above.
Note 1 corresponding to the melody note length data of 16, and note 1 corresponding to the low area. (The melody mark length data is omitted from the first address of the 3 areas.Hereafter, each time the lζAM'lJ-inclusive control circuit 17 inputs the mark data DP113, DM4, DM5, the melody mark length data is added to the storage area corresponding to the mark data. Write the Oprigade pitch data, Oprigade note length data, and chord data from the first address.Next, we will explain the case where the start switch 19 is turned on after all the automatic performance data is stored in the data memory 6. When the start switch 19 is turned on, each counter of the address counter 18 indicates the start address of the corresponding storage area. The melody pitch data and melody note length data corresponding to the 1st note and 211th note of the melody are transferred from the 2fl tJ data memory to the obligado's ``th'' note, 2+'λ2 note, th:(note) and 4th note. In other words, the lt AM readout control circuit 20 controls the address counter 8 so as to avoid obligate pitch data and oprigard phase length data corresponding to the melody tone. The counters 18a, 181] of the address counter 18 corresponding to the storage areas of high data and melody note length data are made operational, and each counter 18a, 18b is activated.
The melody pitch data and melody note length data corresponding to the first note of the melody are read out from the data memory 16 based on the address signal of the counters 18a, 1.
81J is counted up and melody pitch data and melody pitch data corresponding to the second note of the melody are read out. Similarly, by enabling the counters 18C and 18d of the address counter 18 corresponding to the storage areas of obbligado pitch data and obbligado note data, and setting each counter 18C918d to a count amplifier field, the first Extract the obbligato sound iVi] data and the obbligato note length data corresponding to the 4th note from the 11th consideration. In addition, the RAM readout tlIII control circuit 20 counts up the counters 1) 3a and 1)■) of the address counter 18, and reads out the next node.
Output It, callan, l' of address counter J8
18 C and 18 dQ count and anonymize 4U outputs the next "grid guard read request signal (IN II). - Also, the RAM p+"C output control fl+1 circuit 20 outputs the address counter 18 corresponding to the storage area of the one-note data.
The counter 18e is set to a value <i1, and all chord data is read from the data memory 16 when guard pitch data and obbligard note length data are read. The data output circuit 21 includes a chord search circuit 2La, and among the data read from the data memory 16, melody pitch data 7MN2 and melody note length data ML2
is output to the melody data extraction circuit 100, and obbligado pitch data ON4, obbligado note length data OL4,
and the chord name data CH4 are output to the chord/oprigade data extraction circuit 200. In addition, the chord search circuit 21
a is selected from the chord data read out at high speed from the data memo 'Jl'6 based on the note signal output from the counter 18C of the address counter 18 when reading the obbligado note data. Search for the timing data of the chord data that indicates the same address as the fj number, and search for this timing data and a pair of chord name data C.
II Outputs 4. Melody data extraction circuit 100V data output circuit 21
Melody pitch data MN2 and melody note length data ML2 are added from RAM read flilJ 1i4.
A next melody read request No. 15 MNR is added from the 1 circuit 20, and a tempo clock TCL is added from the tempo control circuit 400, which will be described later.Based on these signals, the melody tone (one note light line) to be played on the keyboard 1 is melody (f high data MNI, melody note length data ML of the melody sound being played), tempo flil
The stop command signal MP1 used to stop the output of the tempo clock from the J control circuit 400 and the read command signal MLU of the melody data (melody pitch data and melody pitch data) from Take Memo January 6 are sent. It is something to take out. FIG. 3 shows a detailed configuration example of the melody data retrieval circuit 100.
When the next melody read request signal MNR is applied in conjunction with the reading of melody data from , the latte circuits 101 and 102t each latch the melody pitch data hiN2 and melody note length data ML2 applied from the data output circuit 21. , the launch circuit 103 stores the melody note length data ML previously latched by the latch circuit 102.
I is latched and the melody note length counter 104 is reset. In addition, immediately after turning on the start switch 19,
, s, the signal MNR is output once with the reading of the two melody data, so the launch circuit 101
and melody pitch data MHI latched at 102
and melody note length data MLI are respectively rubbed)
corresponding to the first note of the melody you are trying to play on the keyboard,
The latch circuit 103 latches the phaseless length data (all "O"). The melody pitch data MNI latched by the latch circuit 101 is applied to the chord/melody code (coincidence detection circuit 300 and the display device 22. The display device 22 is composed of lamps arranged for each key. By lighting up the lamp corresponding to the input pitch data, the display device 22 displays the melody pitch data MN1 to 1, which indicates the key to be pressed. The key corresponding to the first note will be lit). Melody pitch data M latched by the latch circuit 103
L (unsigned length data) is applied to the B input of comparator 105. Inputs to the comparator 105 include ten, % clock TC.
The melody mark length counter 104, which counts L, excludes the lower two bits, and the output of the second-order bit is added as note length data. When they match, the melody code length matches (, No. 4 MLEQ is output,
In this case, the melody mark length counter 104 is reset by the signal MNR and outputs the unsigned data, so the comparator 105 applies the coincidence signal MLEQ to the antenna circuit 106 at the same time as the output of the signal bow MNR, and outputs the match signal MLEQ to the AND circuit. 10
6 to be operational. The output of an AND circuit 107 which takes the AND condition of the output of the lower two bits of the melody note length counter 104 is added to the other input of the AND circuit 106. On the other hand, clock human power C with melody note length count 7 and 104
The 11 numeric button TCL applied to K is output from the TE;/2Iζ control circuit 400 force Σ when a proper key is pressed on keyboard 1. In theory, when the keyboard starts playing, the tempo clock TCI, output has been stopped. Here, if there is a proper key press on keyboard 1, the tempo clock T
CL is output, and the melody note length counter 104 counts this tempo clock TCL. When the melody note length counter 104 inputs the third tempo clock TCL and its lower two bits both become 1'', the AND circuit 107 outputs the signal ``1'' via the AND circuit 106. The AND circuit 107 outputs the signal 111N when the fourth tempo clock TCL is added to the melody note length counter 104. This signal N11+ is output to the tempo control circuit 400 as the aforementioned stop command signal MP (see FIG. 7(d)), and is also output to the AND circuit 1.
08 and enables the AND circuit 103. Then, the AND circuit 108 outputs the fourth tempo clock T
When CL is added, this tempo clock TCL is outputted to the RAM indulgence index control circuit 2o as a melody data read command signal MLU (see FIG. 7(e)). RAM read control circuit 20tj: read command signal M L U
When inputting , the counter 18a of the address counter 18
and 181], then the melody data corresponding to the third note of the melody is read out from the data memory, and the next melody request signal M
NR (see FIG. 7(f)) is lit. As a result, the launch circuit 1 (the second tone L-
Melody sound corresponding to 1? , latch MudekMNl [
7. Based on the note data MN1, the display device 22 displays the key to be pressed next, and the latch circuit 103 displays the melody note length data ML corresponding to the first note (the currently played melody note) IiC. Latch this note length data M
L is applied to the B input of comparator 105. The comparator 105 is input to the melody note length counter 104.
Then, note length data corresponding to the time after the appropriate press θB on the keyboard 1 is added, and when these note length data match, the same 411 VC melody note length match signal M as above is generated.
Output LEQ. Then, the AND circuit 106 outputs the signal M
After LEQ is output, when the third tempo clock TCL is output from the tempo 1lilJ j141 circuit 400 to the melody note length counter 104, the stop command signal MP is output.
and the AND circuit 108 outputs the fourth tenboku CI7
When TCL is output, a read command signal MLU is output. Note that if no proper key is pressed on the keyboard 1, the tempo control circuit 400 will not output the 4-1l\th tempo clock TCL. In this way, when the melody data retrieval circuit 100t inputs the tempo clock TCL from the control circuit 400 when a proper key is pressed on the keyboard 1, the melody data retrieval circuit 100t receives melody pitch data MNI and melodic note length data ML. A stop command signal MP and a media output command signal MLU are taken out for each note played on the keyboard 1. The chord/oprigard data acquisition 111 circuit 200 outputs the oprigard high data ON from the data output circuit 21, 4,
The oprigade note length data OT, , l and the chord name data CH4 are given by the force [1, IL A bliia t
ll il+'J tal1 From circuit 20, the next obbligado request number ON IN is added, and in the tempo system described later, 811 circuit river 0 is used as a/vokrosoku 'l' CI,
has been added and based on these signals the self! 1J2
1'OJtThe off-brigado pitch data of the off-brigado note being played is ON, and the sum (f (4) to be played on keyboard 1 is
Japanese prayer preceded by the division minister); f11 Yuna data CI (,
O indicates the change evening/timing of A11 to be played ■ Sound change timing Shinsen CII C, i = - 1 of the oprigade data (obligado pitch data and obbligado note length data) from the data memory 1G This is to take out the Iha OL U. ,8114 figure:1
This shows a detailed 414 example of the above-mentioned chord/oprigade day 347 output circuit 200.
]1 When the second pre-guard read command signal ON Il is applied from the control circuit 2( ) in conjunction with the reading of obli-guard data, the latch circuits 201 , 202 , O, [ and 2
03 are obbligado pitch data ON4, chord name data CII 4, and chord name data CII 4, which are added from the data output circuit 21, respectively.
The launch circuits 204, 205, O, and 206 output the Obligado note length data (, J N 3, O[1
The launch circuits 207, 2o8, and 209 latched the name data CIT 3 and the obbligado note length data OL 3, and the launch circuits 207, 2o8, and 209 store the obbligado pitch data ON2 and chord name that were previously latched by the launch circuits 204, 205, and 206, respectively. Launch circuits 210 and 211 latch data CH2 and obbligard code length data OL2.
, and 212 are latch circuits 207 and 208, respectively.
, and in step 209, the previously latched opligado pitch data ON1, chord name data CHl, and obligado note length data l'OLl are latched. - Also, the obbligard note length counter 213 receives this signal ON 11 VC
Therefore, it will be reset. Note that the comparator 214 compares the chord name data c n 3 previously latched by the latch circuit 202 with the chord name data CH4 added from the data output circuit 21, and determines whether or not these chord name data match. A signal EQ4 (“1” when they match) is output to the latch circuit 202 together with the chord name data CII 4, and the latch circuit 2
02t:l: Latch the signal EQ4 with the previous ii1 C chord-data 4. Further, the launch circuit 205 latches the signal EQ3 previously latched by the latch circuit 202, that is, the signal EQ3 indicating whether chord name data CII 2 and chord name data CH3 match. The latch circuit 205 latches the previously latched signal E Q 2. Also, immediately after turning on the start switch 19, 4
The signal turns ON when two obbligard data are read.
Since R is output three times and remains at f+, the opligado pitch data ONI and the obligado note length data OLI, which have been wrapped and N7' by the latch circuits 207 and 209, will be output from now on to the first note of the opligado to be played. Corresponding chord name data CH latched by the latte circuit 208] The latch circuits 210, 211, and 212 correspond to the chord name data CH that is to be sounded along with the oprigade note of the first note of the chord that is about to be played on the keyboard. Each of them has Mone 1 Koku data, Enthusiasm sound name data, and Mane Ai data. Note that the silent pitch data and the blank note length data are derived from data other than the key code shown in Table 1 and data that does not match any of the note name data. All bits of the 6-bit code length data are 0'' data. Therefore, the signal EQ latched by the latch circuit 208
I is 0'', and the oprigard note length data OL cassette 1 ((note length data) launched by the launch circuit 212 is input. An oprigade note length counter 213 is added to the A input and counts the tempo clock TCL.
The parallel output of the second-order bit excluding the lower two bits is added as code length data, and the input code length data is subtracted from the code length data of the B input, and this difference data is output. In this case, the latch circuit 212
The opliguard note length counter 213 outputs the signal O.
A that is reset by N H and outputs unsigned length data.
-, the subtracter 215 outputs a gutter in which all bits are "0". In addition, as mentioned above, the tempo clock TCL is used for tempo control times #'+'f □100 before the beginning of keyboard play ui1.
Therefore, the obligate note length counter 213 is not driven by it which is reset by the signal ONR. The NOR circuit 216 takes a NOR condition for the parallel data output from the subtracter 215;
All bits from 15 onwards are O'' ^I (Since the mark length data is output, the signal ``1'' is sent to the AND circuit 217.
In addition, the AND circuit 217 is enabled. addition jγ
The unit 18 adds the note length data added from the subtractor 215 and the note length data added from the gate circuit 219, and outputs the added dip length data to the note length detection circuit 20. The hit length detection circuit 220 detects whether the note length data added from the adder 218 is larger than the note length data corresponding to a quarter note, and the input note length data corresponds to a quarter note. Signal II when thicker than note length data 011
is output, and when the length is less than the note length data corresponding to a quarter note, a signal ° "1" is output. In this case, the output from the reducer 215 that is applied to the booster 218 is non-sign length data, and the gate circuit 219 is closed by the signal EQ] ("O") IIC, so that the signal length can be detected. The circuit 220 is a signal
The signal "1" outputted from the note length detection circuit 220 is the A input selector 1ψjlj ", j' S of the selector 221.
Added to A. As a result, the V selector 221 selects and outputs the chord name data added from the selector 222. The selector 222 connects the A person selector terminal ε (signal E to A).
Since Ql (“0”) is added, the launch circuit 20
Chord name data CHI added to 8 to 13 manual effort is selectively output. That is, the selector 221 selects the launch circuit 20
Chord name data CII l latched at 8 is selectively output. The chord name data selected and output from the selector 221 is added to the chord display data memory 23 (FIG. 1). The chord display memory n stores a group of pitch data (key code) corresponding to the chord name for each chord 8, and reads out the corresponding pitch data group according to input chord name data. Note that when the SF mode is selected and the signals 5p7p6 are 1'', only the pitch data corresponding to the root note among the pitch data group that has been read out is output. Notes read out from the chord display memory 23 The high data group is added to the display device 22.The display device 22 indicates the key to be pressed by lighting up the corresponding sing group of the input same-tone data.Thus, the display device 62
2, 6411 corresponding to the chord to be sounded is +1J Vc, which is the same as the first note of the oprigade, is lit up. - Also, the signal F3EQl wrapped in the launch circuit 208
(“0”) is inverted by the impark 223 and added to the AND circuit 224, enabling the AND circuit 224 to operate. Here, if there is a proper press of 6I or 11 on keyboard 1, the tempo clock TCL is output, and the obligate mark counter 2 is output.
13 counts this tempo clock, TCL. When the off brigade note length counter 213 inputs the third tempo clock TCL and the outputs of the T-order 2 bits both become "1", the AND cycle 1. ! 52111: Outputs the signal "1" to enable the AND circuit 225, and outputs the signal II I 11 to the differentiation circuit 226 via the AND circuit 224.The AND circuit 217 outputs the off-reguard mark J( When the fourth tempo clock 'p c i, is added to the counter 213, the above signal w 1
Outputs ++. The differentiating circuit 226 takes the differentiation of the rising edge of the signal "1" applied from the AND circuit b+δ22.1, and uses this differentiated signal as
Changing the chord that should be played ・1 min (Kono' Karasai,
] 1) is output as a chord change timing signal CHC indicating that the first chord is rarely played.
5, when the fourth tempo clock TCL is added, this tempo clock TCL is used as the obligate data read command signal OLU to read RAM jllll (f141
Output to circuit 20. When the llAM read and same value 1 circuit 20 inputs the read command signal OLD, it directly counts up the counters 18C and 18d of the address input counter 18, and reads the ON reguard data corresponding to the &'C 5th of the obliguards. A next obligate read request signal ON R is output to each device reading from the data memory 16. As a result, the latch circuit 210tl latches the oprigard pitch data ONI corresponding to the first note of the obligado added from the latch circuit 207, and transfers it to the oprigard height data ON, ! , and output it. Since this obligate high data ON) is added to the above-mentioned 1f channel assignment circuit 9 (Fig. 8J'1), the speaker 12 is able to produce the jth obsoguard sound. 1, the latch circuit 211 is emitted with the obligado first sound added from the latte circuit 208! lv
The Japanese name data C)l l is latched and outputted to the B input of the selector 221, and the latch circuit 212 outputs the obligate note length data corresponding to the first note of Oplika-1゛, which is added from the launch circuit 209. Latch 0I71 and convert it to the current Hakusan 61

[Output to the B input of the subtractor 215 as phase length data OL of the λnd sound being struck. 2), Ma instrument 21513: p, note length data corresponding to ↓6 relative to the time after the appropriate key press on the keyboard 1 is added from the Oprigade note length counter 213 to the input, and the difference between these note length data is The data is output to the adder 218. Here, when the ``2i difference data becomes II OII, the NOR circuit 216 outputs a signal Q ``1'' to the AND circuit 217 to enable the AND circuit 218 to operate. Therefore, when the difference data of the subtracter 215 becomes '0' and the tempo clock TCL of No. 3[1 is added to the oprigade note length counter 213V,
217 outputs a signal "1" to enable the AND circuit 225, and when the fourth tempo clock TCL is added to the AND circuit 225 t, t, this tempo clock T
CL is output from the RAM as the command signal OLU for Obligard data! Fill how many times! T'S 20V
C output. In addition, if there is no appropriate key pressed on keyboard 1, tempo 1u
1" From the control circuit 400, the 4H Denbok Dtsuku TCL
is no longer output. On the other hand, the selector 221 is always 4
Outputs chord name data indicating the chord at the time preceding the diacritic note length. Here, the note length data of Oprigade is shown in Figure 5(a).
The chord name data output from the selector 221 in each case of (b) will be explained. In addition, each performance time point T. - chord name data matching signal EQ 1 at T4;
The outputs of EQ2 and EQ3 are shown in Table 3. Figure 5 (a) V
VC will be explained in the case shown in C. In this case, at the performance time To, the latch circuit 211 latches the C major chord name data, and the latch circuit 208 latches the G seventh (G7
) chord name data and signal EQI as shown in Table 3.
('“0”) is latched. As a result, gate circuit 2
19 is inactive. υ: The selector 222 outputs the oro pitch name data (G7) added to the B input to the input of the selector 221. Therefore, at the performance point ToVC, the adder 218 adds only the note length data corresponding to the half note added from the subtracter 215 to the note length detection circuit 220e.
20 outputs Shinzuki °°0'', and the selector 221 to which the signal ``0'' is applied to the A person select terminal SA is the ratte circuit 2.
11 to selectively output chord name data (C) to be added to the B input. As the performance progresses, Onrigger 1, Lap length Kaunk 213 is 4.
When outputting the note length data corresponding to a diacritic note, the note length detection circuit 220 outputs a signal "1" in order to input the note length data corresponding to a quarter note from the subtracter 215 via the adder 21B. The selector 221 where II is added to the A input selector terminal SA receives the chord name data (G7) which is added from the launch circuit 208 via the selector 222.
Select and output. Next, the note length data string of the opligado note is the fifth (2) (b)
) will be explained below. In this case, at the performance time To, the launch circuit 211. , 208 , 205
, and 203 respectively latch chord name data (C), and latch circuits 208, 205, and 2
As shown in Table 3 of 03, the signal EC11 (ENG),
Latch EQ2 ("1") and EQ3 ("'1"). As a result, gate circuits 219, 227, J?
and 228 becomes operable 6', and selector 222,
229 and 230 are added to the input to each O]J
Selectively output note name data. Therefore, at the performance +1'f point To, 1 is added to the adder 231.
, the launch circuit 203 adds the note length data corresponding to the 16th note VC latched by J, .
The adder 232V is added to the adder 232V via the adder 232V, and the adder 1 adder 232 receives this code length data and the latch circuit 1. 'M 209 latched 16th tone ma) - and the corresponding ma'] long booter 3.)
8 points with 1 mark? The signal length data corresponding to the signal length data is applied to the signal length data 218 through the gate circuit 2]9, and the signal length data corresponding to the signal length data is applied to the signal length signal 218 through the gate circuit 2]9.
At 12, the latch is reduced by 1', which is added via the amplifier 215.
The note length detection circuit 220 outputs the signal "1" by adding the note length data corresponding to the sixth tone r) and adding the note length data corresponding to the quarter tone phase to the note length detection circuit 220. "' is output, (, <No. II I II is the A person select terminal S
Selector 221n1, selector 230, 2 that joins A
Chord name data (G7) to be added to the inputs is selectively outputted through the A inputs 29 and 222. As the performance progresses, the next obliger 1 "Bucstomer output request signal ON 1"
When 1 is added ('l'+ at the time of performance), the launch circuit 2
02 is the chord name data (G7) and the signal EQ3 ("
0”). This causes the gate circuit 22
8 becomes inactive, and the selector 230 selects and outputs the chord name data added to the 13 manual input.
32 is a latch circuit 206 (It7JI+)
:) 16 which is input via the device 231 and the gate circuit 227
The note length data corresponding to the diacritic note and the note length data corresponding to the 16th note launched in the launch circuit 209 are added, and the note length data corresponding to the eighth note is sent to the adder 218 via the gate circuit 219. In addition, the adder 218 adds this note length data to the note length data corresponding to the 16th note latched by the latch circuit 212 and added via the subtracter 215 to obtain note length data corresponding to the dotted 8th note. Note length detection circuit 22
0, the note length detection circuit 220 outputs a signal "1", and the selector 221 to which the signal II II II is applied to the A person select terminal SA receives the selector 2300B input from the launch circuit 202, and each A of the selectors 229 and 222. The 11th name data (G7
) is selected and output. In this way, the selector 221 outputs the current 61 (eleventh note name data indicating the eleventh note at a point in time which is exactly υ a quarter note length ahead of the playing point). Note that the signal EQI latched by the latch circuit 208 is
(If it becomes 1", it should be read together with the chord name data read out with the obligado day and evening of the obbligado note currently played in rlii 4, and the obligado data of the opligado prayer that will be played next; If the output chord name data is different from the chord name data, this is the case. Therefore, by enabling the AND circuit 224 to operate only when the signal EQI ("0") is output, the differentiation circuit 226
outputs a chord change timing signal CIIC indicating the change timing of the 11th note to be played at the timing of the next obbligado note. In addition, the minimum obbligado note (1 length is a 16th note length, ':Ir [the change timing of one note is at least a quarter note length')2. Ta1
The melody pitch data MHI of the melody note that precedes the note and the chord name data that precedes the current performance by a quarter note length and are extracted by the chord/mepriguard data extraction circuit 200 C) I are chord/melody paper, respectively. Detection circuit:
(Added to 00 (Fig. 1).On-1t-・Melody-Several circulation ll'h Other inputs of 300 are from chord name data extraction circuits 2 and 1 and melody Otojima data extraction circuit 25. 11th name data Mcn and melody pitch data M based on keyboard performance, respectively
MN can now be added. The 11th note name data extraction circuit 24 has a chord detection port &12i
It has a memory function for temporarily storing the chord name data RK C input in a time-division manner from 1 to 3, and outputs the stored chord name data RK C as chord name data M C)f. Note that the temporarily stored chord name data RK C is transferred from the chord bubble detection circuit 3 to the 11th note name data 1 based on the next key press.
0 (C) is output. The melody pitch data 14g output circuit 25 has a differentiation function that differentiates and outputs the key code KC input from the key press detection circuit 2 in a time-sharing manner. , key press area 1b″″C of keyboard 1
When a new key is pressed, a key code KC indicating the pressed key is output as melody pitch data MMN only when the new key is pressed. The chord/melody paper detection circuit 300 detects a match between the melody pitch data MNl extracted by the melody deck J& output circuit 100 and the melody pitch data MMN extracted by the melody 2f pitch data extraction circuit 25, and the chord/melody paper detection circuit 300. The 11th pitch name data CII is retrieved by the obbrigade data retrieval circuit 200VC and the Japanese name data M retrieved by the chord name data retrieval circuit 24.
This is to detect a match with CH. In addition, the 11th sound
The melody paper detection circuit 300 further receives the next melody bladder output constriction signal Ai N from the It A M bladder output control at+ circuit 20.
R is added and the chord/oprigade data extraction circuit 2
A chord change timing signal CHC is added starting from 00. FIG. 6 shows details of the chord/melody paper detection circuit 300.
．． ILl#:'F shows an example of this circuit 300
The operation will be explained with reference to timing charts shown in FIGS. 7 to 9. The next melody read request code MNR is as shown in FIG. 7(f) and FIG. 8(f).
This is output when the LU (see Figure 3) recovers, and the melody is "'0" when several lines are output. The inverter 301 inputting this signal MNR (“0”) receives the signal λ
(NR is inverted and the signal ``'1'' is added to the AND circuit 302, and the AND circuit: (02 is enabled for IGb operation. The comparator 303 is the melody pitch input from the melody 4-If high data extraction circuit 25)] '-Nol MλTN is compared with the melody pitch data MNI input from the melody data extraction circuit 100, and when the two match, the signal ``1'' is output.
” is output. Now, as shown in Fig. 7, the normal key press timing to
When the appropriate key (that is, the key lit up based on the melody pitch data MNI) is pressed, the comparator 303 sends a signal "1" to the OR circuit 304 at the key press timing 'KON'. , D via the AND circuit 302
Output to flip-flop 305. The D flip-flop 305 delays the input fi number 1°' for a predetermined time and outputs it as a melody match signal MKEQ (“1”). Since it is returned to 0 to the D flip-flop 305 via the A1 circuit 302, it is held until the output of the next melody is completed (see FIG. 7(b)). The comparator 303 outputs a coincidence signal "1" for only 1M pulses of the melody pitch data MMN, and the slow-hard 1 hour of the D-frysage flop 305 is set as the pulse width. As shown in Fig. 8, when a proper key is pressed on the keyboard 1 later than the key press timing t according to Vl and J1 standards, a melody matching signal MK II; At KON, "1" tC stands and the first tempo clock TCL is output after the key is pressed.
N R is what is output) rfl, so II
It falls to OII (see Figure 208 (b)). As shown in FIG. 9(e), the chord change timing signal CII C is output when the third tempo clock TCL is input from the normal key press timing t0 (see FIG. 4). When the ridge is 1t+, it is 'θ'' and '1.-p.The inverter 306 inputting this signal CHC ('0') inverts the signal CI (C and adds the signal '1' to the AND circuit 307, and The comparator 308 makes the circuit 307 operational.The comparator 308 receives the chord name data MCH inputted from the chord name data Jiff output circuit 2.1 and the Z1 chord name data C inputted from the 4111 tobbit data extraction circuit 200.
If the two match, then it will be 1 month.
Now, as shown in Fig. 9, key press timing t according to the 1F standard is output.
. When a proper key on the keyboard 1, that is, a key that is lit and displayed based on the chord name data CH, is pressed too late, the comparator 308 generates a signal ``1'' at the key press timing tKON.
is output to the D flip-flop 310 via the OR circuit 309. The D flip-flop 310 receives the input signal °
'1''' is delayed by a predetermined time and is sent as a chord match signal CHE.
Output as Q (“1”). This 11th tone matching signal C
Since the HE signal is returned via the AND circuit 306 and the OR circuit 309, at least the next O (l sound change timing 1g CHC is output -4-c is held. flip 7 r
J knob 310i1: By matching the previous ON note name data in the comparator 308, outputs the OIJ note match signal -Y''. After the input of the third tempo clock TCI., the chord sequence timing 4H CIIC outputs the harmony signal CHEQ ("0") (see Figure 9 (1)). .ifC, 6iJt key press timing 'KON changes timing signal -fF CJ(
C yo υ too [I! -If VC is D frisoge flop 3
10 to -J, 'ii; to agreement signal CII E
Q ("1") can output 1゜it+)5
- Melody - The melody output from the number structure circuit 300, r matching Shinzuki M K E Q and 11th sound matching I city'
J(CHE Q l and f are respectively added to the tempo ili control circuit 400 (FIG. 1). The tempo control circuit 400 further includes melody data Jil/f.
. Melody mark length data ML and stop command signal MP are applied from output circuit 100, and next melody read request signal MNR is applied from RAM read control circuit 20. Based on these signals, tempo clock TC is applied.
yc and tempo clock T.
It controls the frequency of CL. Figure 10 shows the tempo flilJ 1111 circuit 400.
details (this shows one example; before the start of automatic performance, the latch circuits 401, 402, and 403 have the base 1νt
The frequency information of the tempo clock is latched.
The latched frequency information of the launch circuits 401 and 402'7'' is added to the input and B input of the calculation circuit 1104, respectively. Most effective tempo limiter 40
Outputs 5VC. In this case, 312 uniform candy of place U matches the frequency difference +lJ of the reference tempo clock. The maximum tempo limiter 405 outputs the average value (frequency information) that is normally input from the nJ 3'4 circuit, and outputs the minimum frequency information when the input average value is smaller than the minimum frequency information. Frequency information output from maximum tempo limiter 405 is applied to latch circuits 403 and 406. The latch circuit 403hi1 latches the frequency information of the reference tempo clock in advance as described above, and adds the launched frequency information to the comparator 407. On the other hand, the variable frequency divider 408 divides the quality clock pulse φ by a predetermined frequency division ratio, and when liQ"1" is added from the amplifier circuit 409, it divides the frequency at a predetermined frequency division ratio. The frequency of the low continuous clock pulse φ is also divided by a frequency division ratio several 10'% smaller, and the clock input CK VC of the counter 410 is output. The clock 410 outputs the signal "1" only when the performance timing is earlier than that of the variable frequency divider 408. Output as clock frequency information to comparator 407.Comparator 407
is the frequency information added from the launch circuit 403 and the counter 4
10, and when they match, a signal It I II is output to the AND circuit 411,
AND circuit 411! Allow for assistance. AND circuit 41
1 outputs the signal to the load input LD of the latch circuit 403, the reset terminal LD of the counter 410, and the AND circuit 412 when a signal frequency-divided and output from the 14-variable frequency divider 408 is applied when the circuit 1 is operable. As a result, the latch circuit 403
The frequency information inputted from the variable frequency divider 408 is latched, this frequency information is output to the comparator 407, the counter 410 is reset, and the signal divided by the frequency output from the variable frequency divider 408 is divided again to calculate this lottery number. The ratio 'v' is output to the device 407. Therefore, when the variable frequency divider 408 is outputting a high-speed clock pulse at a predetermined frequency division ratio, the comparator 408
A coincidence signal "1" is output at a period corresponding to the frequency information added from the 070 launch circuit 403. The output of the OR circuit 413 and the eleventh match signal CHEQ are applied to other inputs of the AND circuit 412. The OR circuit 413 takes the OR condition of the melody match signal MKEQ and the output of the inverter 414 that inverts the stop command signal MP, and is 4f'l; MKEQ.
and (if number MP is respectively Fig. 71 (1)) J',
・In the case of Lbi(())((2t1 always signal "1"
, and if MK E Q and MP No. 111 are respectively shown in Fig. 8 (1) and (d), kT is output.
From the rising 9 of the number MP to the rising of the signal MKEQ,! 1) Outputs the signal “0°°” during the period of -4. In other words, the OR circuit 413 outputs the signal “0°°” during the period of -4.
Push CII closer to the fire than 1°! timing tic. , J.
If it is early, output the signal "1" to K&:l:'li, and if it is late, output the signal "1" to K&:l: 'li. In addition, if the chord matching signal CI [E Q +: i, i (one note change history timing signal CII C is output, there is no one match), the chord matching signal CI [E Q +: (appropriate key press) - On Saturday, the signal ゛(BI') is obtained (9th section (reference). It becomes operational only when it is "1", and the signal "1" which is periodically applied from the un1 circuit 411 is used as the tempo clock TCL.
How do I output it? That is, the AND circuit 412 outputs the melody pitch data MMN and MNl when a melody is played, and when a chord is played, the ol pitch name data MCI and C are matched.
When there is a match with H, the tempo clock TCL is output. If sieve 1, melody - when several lines appear, press and o [if 1 note - when several lines appear at the same time, press / only when both of the above match.
Output my r hook T CL. On the other hand, when the AND circuit 412 outputs the tempo clock TCL, the melody data extraction circuit 1.00 outputs the note length data of the currently played melody note M
is output, and the melody is output from the RAM read control circuit 20.
A melody read request signal MNR is output for each number. The melody mark length data ML is applied to the variable frequency divider 4]5, and the next melody read request signal MNR is applied to the load terminal LD of the latch circuit 406, the counters 416, 417, and the Norinob flop 418, respectively. Variable frequency divider 415 ii: This divides and outputs the high-speed clock pulse φ at a frequency division ratio corresponding to the input melody mark length data ML. The period of the clock to be divided and output is the input melody note length data ML.
Corresponds to the note length indicated by . For example, the period of a clock that is frequency-divided and output based on the note length data ML that corresponds to a quarter note is the period of a clock that is frequency-divided and output as -C based on the dip length data ML that corresponds to a 13th note. It will be twice as much. Naive, the launch circuit 406 inputs the frequency +) output from the leakage proof temperature limiter/105 to the input 113 of the MNR.
Latch the signal and send this frequency IH signal to
19, and counters 416 and 417 output the signal M
The flip-flop 418 is reset by the input of the signal NR, and the flip-flop 418 is reset by the input of the signal ``QMNR'', and outputs a signal ``0'' from the output terminal Q to the AND circuit 409 to disable the AND circuit 409.The decoder 420 is a counter. The count value output from 417 in 2-pit binary code is sent to four signal lines 11o-1.
The circuit is divided into three parts and outputs a signal "1" only to the signal line corresponding to the count value. Therefore, when the counter 417 is reset, the signal line I! corresponding to the count value [0]! Since the signal °′1” is output to o, the arithmetic unit 419
A signal ``'1'' is added to the input CA of , and the count value is ``0-''.
Each route 11 corresponds to "O, Lbi 1-1". , the OR circuit 421 that takes the OR condition of the signal output to C is the signal s7.
The inverter 422 outputs 'I'' to the AND circuit 409 to enable the AND circuit 409 to operate, and outputs the signal I output to the signal line lo.
The inverter 12 and the AND circuit 425, which inverts and outputs the signal output to the signal line 63 corresponding to the count value 13, are made operational. The arithmetic unit 419 multiplies the frequency information added from the latch circuit 11) ii by a different constant depending on the output from the decoder 420, and when the signal "1" is added to the input CA, the frequency information is 0. 7Fi and outputs the multiplied frequency information to the comparator 426. Note that when the signal ++ 1 ++ is added to the input CB, the arithmetic unit 419 multiplies the frequency information by 1.25, and when the signal No. 13 "1" is not added to either the input CA or the input CB, the 11 outputs of frequency i+'1 report. The AND circuit 425 outputs the clock applied from the variable frequency divider 415 to the AND circuits 427 and 428 when the clock is enabled. AND circuit 427, the outputs of NAND circuits 429 and 430 are added to other human inputs, and the NAND circuits 129 and 430 are also output signals.
The input clock is added to the clock input CK of the clock 416 only when outputting 1''. In addition, the NAND circuit 429 takes the NAND condition of 1110 count value (bit-to-recode) input from the latch circuit 402 & CC direction from the force 1' nonc 416, and all bit outputs of the Kara 2/Non 416 are 1'''' is output to the 11 AND circuit 427, and the output of the clock from the AND circuit &'1i 427 is stopped. times h'
:S 402 'j The maximum value of the output value is tt
It operates as a minimum temp limiter. Further, the NAND circuit 430 outputs the melody coincidence signal MK
It takes a NAND condition between EQ and the output of the inverter 431 that inverts the 11th edition coincidence signal CHEQ, and only when the signal C1EQ is "0" and the signal MKEQ is "1", the AND circuit 427 is It outputs the signal "0" and stops the output of the clock from the AND circuit 427. That is, the NAND circuit 430 outputs the melody matching press 1' at the timing when the keys corresponding to the melody and the chord should be pressed at the same time. Even if (MKEQ-"1") is played, the chord does not match (CHEQ="(1")) and the L-and circuit 42
7 so that the clock is not output to the counter 416 (
Rub. The counter 416 counts the clocks applied to the clock CI (and transmits this counted value as frequency information to the comparator 112.
6 and launch circuit 402 (output from comparator, 42
6 is the frequency information added from the counter 41G and performance 3.;1
- Compare the frequency information added from the circuit 419, and when the two match (output the Q number "1" to the AND circuit 428,
3. Enabling AND circuit 428, AND circuit 42
8 is a signal from the variable frequency divider 415 to the AND circuit 42 when the operation is enabled.
5, this clock is output to the clock input CI of the counter 417, causing the counter 417 to count and amplify. As mentioned above, the decoder 420 only connects the signal line corresponding to the divisor value of the counter 417. In other words, the decoder 420 outputs the melody read request signal M
It outputs a signal ゛1°° to one of the signal lines as time elapses from the input point of N A signal "1" is output to the signal line lo until the frequency information reaches 75%, and a signal "1" is output to the signal line 11 until the count value of the counter 416 reaches 100% from the 75th value of the frequency information. Outputs the signal “ ] ” and counter 4
The count value of 16 is 12 from the value of the 100 coefficient of the frequency information.
When the signal line reaches the value of 5, the signal line i! 2, and the divisor value of the counter 416 is 125 of the frequency information.
When the value of % is reached, a signal "i" is output to the signal line 13. Here, the cone corresponding to the next melody note of the currently played melody note is A as shown in FIG. The case where the key is pressed in each key press time area indicated by B, C, and D will be explained. Note that 1'o +i is the key press/f mink of the currently playing melody note, and T1゜'r2
．． 'r' corresponds to the 75th, 100th, and 125th notes of the regular note length T indicated by the currently played melodic note. As mentioned above, the melody change signal "]" is output when the key corresponding to the next melody reading is pressed. - First, the case where a key is pressed in the key press time area A will be explained. In this case, the signal N OI from the inverter 422
+ is added to the AND circuit 423, so when the key is pressed, the AND circuit 423 outputs the signals MK and EQ (“1”
) is no longer output. Therefore, when time has elapsed since the key was pressed and the performance time point T1 is reached (for example, the inverter 422 outputs a signal "1"), the AND circuit 423 outputs 4g "1" at this performance time T. Ru. This signal "1" is 71J block flop 4
18 sets! 114 child S and the differential circuit 432. As a result, the frisogen flop 418 is reset and the signal "t" is applied from the output terminal Q to the AND circuit 409. The AND circuit 409 is the same as the OR circuit 421.
When outputting +, ``Sawa!'' During the regular note length T indicated by the thumb d, the operation is 8+t, so in this case, during the key press time area B, the signal "1" from the front 11 [; output to the device 408. The variable frequency divider 408 is configured as described above. Divide the frequency and output. If the key press is fast, increase the period of the tempo clock TCL by several 10%'), j2 < L, make the tempo faster. Mako, differentiation circuit 432 differentiates the signal "1" applied from the AND circuit 432, and outputs a pulse signal to the load Q of the latte circuits 401 and 402 when the signal "1" is high.
:Add to I4 child LD. The latch circuit 401 launches the frequency information added from the leakage proof temperature limiter 405 and adds it to the input of the performance circuit 404.
launches the divisor value added from the counter 416 (in this case, the 75th frequency information value) and adds it to the B input of the arithmetic circuit 404. The arithmetic circuit 404 calculates the average value of the two human forces and outputs this as new frequency information. That is, the previous frequency information is modified based on the current key press timing. If a key was pressed in the key press time area B, a signal M'KEQ is outputted via the AND circuit 423 at the time of the key press. Then, the AND circuit 409 outputs a signal ``1'' from the time of the key press to the playing time ``1''2-, and the differential circuit 432 outputs the signal ``1'';
At the same time, a pulse signal is output. Also, when a key is pressed in the key press time areas C and D, the signal M
KEQ is output. In this case, the differentiating circuit 432 outputs a pulse signal at the same time as the key is pressed, but the AND circuit 109 performs a small operation due to the output signal "o" of the OR circuit 421. Therefore, even if the flip-flop 418 is pressed, the signal "1" is not output.If a key is pressed in the area between the push buttons jLν, the AND circuit 425 outputs the signal at the playing time T3. Since the output signal +1011 of the in-park 424 disables the counter 416, no clock is applied to the counter 416. In this way, the progress of the automatic ωf performance is stopped by both the VC, the melody performance, and the chord performance. control is carried out, −+ fC
The tempo is controlled by the key press timing of the melody performance. In this embodiment, only the obbligado tone is automatically sounded, but the melody tone and the chord may also be automatically sounded. -Also, in this embodiment, chord data 1°q was created from the 1111th name data and the origuard address, but the ot1 note data is not limited to this, and for example, chord name data and 1F11 note length data may be used. 114 may be created from ν1, and the 11th note name data, 1. l! You may try to make it look old-fashioned. As explained above, according to the VC, it is possible to stop and control the progress of automatic performance based on the performance of multiple parts (melody, chord, etc.), and this allows the pressing of multiple parts. You can practice keys. The second performance (chord)
It is also possible to control the tempo of the first performance (melody) without being affected by the stop control of the first performance (melody). Furthermore, keys for multiple parts to be pressed can be displayed.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of an electronic tea set to which the present invention is applied; Fig. 2 is a data format showing an example of automatic performance data used in the present invention; (A block diagram showing a detailed example of a Rodi data extraction circuit. FIG.
)Oyo. Figure (b) t, 1. (-j, io. □To explain the extraction of the arc, the note length data string of the oprigade note, #jT 6 is a block diagram showing a detailed example of the chord/melody matching circuit for this note 8J) 7, 8, and 9 respectively show the timing chart of each signal according to the present invention, and FIG. 10 shows an example of the door-to-door system i10 circuit according to the present invention. Block diagram, Figure 11 t shows the tempo control circuit fi: note length data of the melody tones used for explanation. 1. Keyboard, 10. Sound formation 11. Path, 12. Speaker, 1.
5 Kurikoku data input device, 46-Zita memory, 17
・RAM 41) included! ti control circuit, 18 address counter, ]9 start switch, 20・-RA
M reading system? +111 circuit, 21... data output circuit,
22...Ul(Water device, 2:('All-display data memory, 24...Chord name data extraction circuit, 25-M[')
D sound 1n extraction circuit, 100・Noroti data extraction circuit, 200...O [1 廿・Oprigade deku 111 circuit, 300 chord/melody, f-several circulation b'6.4
00...Tempo control circuit. Figure 3

Claims (12)

[Claims] (1) A keyboard, and at least a first key on the keyboard. The first performance corresponds to the second performance. a storage means for storing the second performance data; a reading means for reading out the stored data f: from the storage means as the music progresses; and a reading means for reading out the first performance data by the reading means. The second performance data is the first performance data on the company board. The first performance is output in response to the second performance. The compared first performance data is compared with the second performance data. When at least one of the second performance data is inconsistent, the i
An electronic musical instrument comprising automatic performance progress control means for stopping reading of the R output means. (2) the first performance on the keyboard is a melody performance;
The electronic musical instrument according to claim 1, wherein the second performance is a chord performance. (3) The automatic 6q performance progress control means 1, stopping the reading of the reading means by forcefully stopping the generation of the tempo clock that advances the automatic performance. W1: As described in claim (1) electronic musical instrument 9, (4) The automatic performance progression IIIJ# handrail: tco, performance of the first performance data read out based on the tempo clock of a preset frequency ・f First performance on mink and keyboard r (It has a tempo correction means for correcting the frequency of the tempo clock based on the time difference with the key press timing of the correspondingly outputted first performance data.Claim No. (1):r1″1) electronic musical instruments. (5) The tempo correction means contributes the time difference to correction of the frequency only when the time difference is within a predetermined range.
An electronic musical instrument according to claim (4). (6) The tempo (I positive means) determines that the key press timing of the first performance data that is ILI inputted to the 8 in response to the first performance on the board is the same as the read out first performance data. When the timing is earlier than the performance timing, the frequency of the tempo clock is increased at a predetermined rate until the performance timing of the read first rendition is reached.
The electronic musical instrument according to item (4) of the scope of M requirements. (7) a keyboard, and at least a first . #+, 2
The first part corresponds to the performance of . a storage means for storing second performance data; a reading means for reading out the stored data from the storage means as the music progresses; a display device that displays the key to be pressed based on the performance data of No. 2; and a display device that displays the key to be pressed based on the performance data of No. 2; The second performance data is the first performance data on the keyboard. Compatible with the second performance [2-C
Comparing with the output performance data of the first stage 2, the previous H1:
An electronic musical instrument comprising an automatic performance progress control for stopping reading of the reading means when at least one of the compared first and second performance data does not match. (8) The reading means reads out the first 01f performance data leading by one note and the second performance data leading by a quarter note length by counting the tempo clock that advances the automatic performance. '*)'Electronic musical instruments as described in item (7) of the J-required scope. (9) At least the first key on the keyboard. The first performance corresponds to the second performance. a storage means for storing all the second performance data; a reading means for reading out the stored data from the storage means in accordance with the progress of the song; and a first performance data read out by the reading means. All of the second performance data are played on the keyboard. The first performance is output in response to the second performance. The comparison is made with the second performance data, and the fc first . automatic performance progress control means for stopping reading of the reading means when at least one of the second performance data is inconsistent; An electronic musical instrument comprising an automatic performance device that produces automatic performance sounds based on performance data. (10) The storage means includes the first. In addition to the second performance data, Obrigado performance X ic *-+ raises the corresponding Oprigade deck 〇11! The electronic musical instrument according to item (9). (11) A keyboard, an automatic accompaniment device, and at least a first . The first performance corresponds to the second performance. 1. Storing the second performance data. Q means, a reading means for reading stored data from the storage means in accordance with the progress of the music, and a first .Q means read out by the reading means. The second performance data is the first performance data on the keyboard. The first performance is output in response to the second performance. The compared first performance data is compared with the second performance data. The electronic musical instrument includes an automatic performance progress control means that stops the readout of the readout means and the progress of the automatic accompaniment device when at least one of the second performance data does not match. (12) The automatic accompaniment device includes a second 6 on the keyboard;
) patent that produces an automatic accompaniment sound corresponding to the rhythm of the song and an automatic rhythm sound corresponding to the rhythm of the song.
) Item 1 child musical instrument.