JPS59108111A - Sample holding circuit - Google Patents

Abstract

PURPOSE:To omit the use of a high reverse voltage-proof transistor (TR) by connecting a switching element to the base terminal of a TR through a resistor and earthing the base terminal during a period no sampling pulse is applied. CONSTITUTION:A switch 8 is connected to the base of a TR 17 through a resistor 23 and a reference voltage source 20 also is connected to the base through a resistor 22 and a diode 21. During no sampling period, the switch 8 is turned on and a fixed forward voltage is applied to the base of the TR 17. Consequently, the reverse voltage between the base and emitter of the TR 17 is reduced by the base voltage. During the sampling period, the switch 8 is turned off, the diode 21 is reversely biased and the reference voltage source 20 does not exert influence upon the titled sample holding circuit. Thus, the sample holding circuit can be formed without using an especially high reverse voltage-proof TR.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Application of the Invention The present invention relates to a sample and hold circuit suitable for a motor rotation control system and the like.

[Prior art]

A so-called sample-and-hold circuit that sequentially samples an input signal and holds the sampled signal for each sampling period is widely used in automatic control systems and the like.

FIG. 1 is a block diagram showing the basic configuration of a motor rotational speed control system using a sample-and-hold circuit, in which 1 is the motor, 2 is an amplifier circuit, 3 is an hourglass shaping circuit, and 4 is a sample-and-hold circuit s5. 6 is a motor drive circuit, and 7 is a motor control circuit.

In the figure, a sample and hold circuit 4 constitutes a motor control circuit 7 together with a waveform shaping circuit 3 and an amplifier circuit 5.

Next, the operation of this control system will be explained.

The rotational speed of the motor 1 is detected as a signal having a frequency proportional to the rotational speed by an appropriate rotational speed detection means, and after being amplified by the amplifier circuit 2, the rotational speed is sent to the motor control circuit 70 and the waveform shaping circuit 6. It is input as a detection signal a, and after being appropriately shaped, it is input to the sample and hold circuit 4.

The sample and hold circuit 4 converts the input rotational speed detection signal a into a periodic voltage value and samples and holds this signal n to form a sample and hold signal θ that is inversely proportional to the rotational speed of the motor. The hold signal e is amplified by the output amplification circuit 5 and applied to the motor drive circuit 6 as a motor control signal g, thereby controlling the foot speed rotation of the motor 1.

FIG. 2 is a circuit diagram showing a conventional example of the sample and hold circuit 4 in FIG. 1, in which 8 and 9 are switches;
12 is a capacitor, 16 is a transistor,
14 is broken, 15 is an amplifier circuit, 16 is broken, 17 is a transistor, 18 is a capacitor, 19 is a constant voltage power supply υ
, parts corresponding to those in FIG. 1 are given the same reference numerals.

FIG. 3 is a square diagram showing the signals of each part in FIG. 2, and the signals corresponding to the second and first parts are given the same reference numerals. Note that in FIGS. 1 and 2, signals corresponding to each other are also given the same reference numerals.

In FIG. 2, a series circuit consisting of a constant current source 10 and a capacitor 12 is connected to a constant voltage power source 19. A transistor 16 is connected in parallel to the capacitor 12, and its base terminal is connected to the waveform shaping circuit 3 via a resistor 14.

An amplifier circuit 15 is connected to the connection point between the constant current source 10 and the capacitor 12, and its output terminal is connected to the base terminal of the transistor 170 through a resistor 16 and the switch 8 connected to the ground terminal. ing.

The collector terminal of the transistor 17 is connected to a constant voltage power supply 19,
Further, the emitter terminal is connected to a series circuit of a switch 9, a constant current, and a current 11, a capacitor 18, and an output amplification circuit 5, respectively.

Next, the operation of this prior art will be explained, as shown in FIG.
In FIG. 3, the waveform shaping circuit 3 outputs a sampling pulse b that coincides with the rise of the rotational speed detection signal a, and a reset pulse C that is slightly delayed. The reset pulse C is input to the base terminal of the transistor 160,
Since each input causes the capacitor 12 charged during each reset pulse period to be discharged,
The charging voltage of the capacitor 12 becomes a sawtooth wave signal d that is reset at the period of the reset pulse C, and its amplitude is proportional to the period of the reset pulse C, that is, the period of the rotational speed detection signal a. .

- 10,000, the pulse b output from the waveform shaping circuit 3 turns off the switch 8 when the pulse b is applied, disconnects the base terminal of the transistor 17 from the ground state, and at the same time closes the switch 9. During this period, a sawtooth wave signal d is applied as an input signal f to the base terminal of the transistor 170 through the amplifier circuit 15 and the resistor 16.
The capacitor 18 is photo-discharged in response to the emitter and printer outputs. When the application period of the sampling pulse b ends, the switch edges 8 and 9 return to the OFF and ON states, respectively, and the transistor 17 becomes the OFF state, so that the voltage of the voltage converter 18 changes when the next sampling pulse is applied. It will be preserved until the time.

Therefore, the sawtooth signal d is the sampling pulse b
is sampled sequentially for each input period of capacitor 1
It is held by B and becomes the sample hold signal e,
The output amplification circuit 5 outputs it as a motor control signal.

The motor control signals obtained in this manner are proportional to the amplitude of the sawtooth wave signal d at the time of sampling, that is, the period of the rotational speed detection signal a, and are proportional to the period of the rotational speed detection signal a.
Since the motor control signal g is inversely proportional to the rotation speed of the motor 1, it is possible to control the motor 1 so that the rotation thereof is one step.

Now, in such a conventional technique, if we consider a case where the load is large, for example when the motor is started, the rotation speed of the motor 1 is slow, so the period of the rotation speed detection signal a is short, and the period of the sample hold signal e is short. The voltage is the maximum voltage 1
rises with The voltage at this time is the voltage of the constant voltage power supply 19 as vl, and the voltage of 14 between the base and emitter of the transistor 170 as vl.
The direction voltage is VBI, and n is tf'(V+ -VBL
), and a voltage equal to this is applied to the emitter terminal of the transistor 17.

Therefore, during the period when the switch 8 is in the on state, that is,
During non-sampling periods, the base terminal of transistor 170 is at ground potential, so that the base terminal of transistor 170 is at ground potential.
A maximum reverse voltage (vl-VBB) will be applied between the emitters.

Normally, the reverse withstand voltage of a transistor is regulated, so if this is VER, it must be VBR>(V, -VB. In other words, the voltage of the constant voltage power supply 19 is
1 cannot be greater than (VBRl-vBE).

If you want to increase the voltage V of the constant voltage power supply 19, you will need to use a large-scale one transistor of VBR or change the basic configuration of the sample and hold circuit, but this will cost a lot. It is not a good idea considering the amount of effort involved.

[Objective of the Invention J The object of the present invention is to solve the above-mentioned shortcomings of the conventional method, and to increase the number of circuit elements to a minimum by 1 without using transistors that have a particularly high inverse 111=l voltage. in,
It is an object of the present invention to provide a sample and hold circuit which operates without any problem even when the voltage is lowered.

[Advancement of invention]

In order to achieve this object, the present invention connects a switching element to the base terminal of the transistor through a resistor, and further connects a base voltage source through a diode, and During the application period, the base terminal is grounded through the resistor and the switching element 'aJr', and a constant forward voltage is applied by the heavy pressure source during the recording period, so that the base terminal of the transistor is・The reverse voltage between the emitters is reduced, and the diode is turned off when the input signal supplied to the base terminal of the transistor is at a redundant level or higher during the 1ulJ addition period of the sampling pulse. The feature is that the reference voltage source does not affect the sampling operation.

Example 1 of the invention] DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 4 is a block diagram showing an embodiment of the sample and hold circuit according to the present invention, in which 20 is a reference voltage source, 21 is a diode, 22 and 23 are resistors, and the parts corresponding to those in FIG. 2 are the same. I will add a code and omit some explanations.

FIG. 5 is a waveform diagram showing signals at various parts in FIG. 4, and signals that are compared with those in FIG. 4 are given the same reference numerals.

This implementation? lJ is the base terminal of the transistor 170 connected to the switch 8 via the resistor 23, and the resistor 22
．． It is different from the American technology shown in Figure 2 in that the four auto valves are connected to the reference voltage source 20, but the principle of the sampling operation is the same as the American technology shown in Figure 2. There is no change.

However, the reference voltage source 20. By adding the 21° resistor 22.25Y, even if the switch 8 is on during the non-sampling period, the input signal f at the base terminal of the transistor 17 will be as shown in FIG. As shown, a constant 1-1 voltage is applied to the base terminal of transistor 170, which is not connected to ground potential. That is, when the switch 8 is in the on state, the reference voltage source 20 is connected to the diode 21.degree. resistor 22. '2'y, since the current flows through the path of Sui-Sochi 8, the lightning voltage vB at the base of the transistor 170 becomes equal to the voltage of the reference voltage source 20. diode 2
1σ) Forward voltage drop is VF, low resistance 1 of resistance 22.23
If the direction is nR1+R2, then VB=(V2-Vy
)°R2/(RI +R2). Therefore, the reverse voltage generated between the base and emitter of the transistor 170 during the non-sampling period is reduced by the base voltage VB compared to the conventional example shown in FIG. On the other hand, the voltage (2) of the constant voltage power supply 19 can be increased by the above-mentioned decrease.

By the way, Sui 11. During the sampling period when circuit 8 is off, transistor 17 receives input signal f.
As a result, the output voltage of the amplifier circuit 15 which is connected to the resistor 16.23, that is, the voltage corresponding to the output voltage of the sawtooth slope signal d which changes according to the period of the one rotational speed detection signal, is applied. Since the diode 21 is reverse biased and in an off state unless the voltage becomes equal to or less than the voltage of the reference voltage source 20, the reference voltage source 20 has no effect on the operation of the sample-and-hold circuit.

However, when the voltage applied from the amplifier circuit 15 becomes lower than the reference voltage source 200 voltage v2, the diode 21 is turned on, and the base voltage VB of the transistor 17 is approximately determined by the voltage 2 of the reference voltage source 20. As a result, the sample and hold signal e, which depends on the base voltage VB, remains almost constant.

In other words, the sample-and-hold circuit 4 in the first embodiment shown in FIG. 4 has non-linear input/output characteristics such that its output becomes approximately constant when the sampled signal exceeds a predetermined level. .

However, in general, in automatic control systems, the input/output characteristics are sufficient as long as they have linearity within the desired control operating range, so f
The input/output characteristics of the sample-and-hold circuit are also determined by its automatic control (
Goods) It has linearity within the desired control operation range required for the thread, and there is no problem with the range.

As shown in FIG. 6, a motor control system usually has f, where fo is a predetermined rotational frequency of the motor.

The range of ±Δf is defined as a control variable range, and if the motor rotational speed falls outside this range, the motor control circuit 7 (first
The motor control signal g in the figure is at the lowest potential, and as it becomes lower, the motor control signal g remains at the highest potential. In other words, when the frequency of the one-rotation speed detection signal a is in the range of fo±Δf, the voltage of the motor rlilJ control signal g changes in accordance with the frequency of the rotating binary detection signal a, but outside the above range. ,
The voltage of the motor Ni++ control signal g is fixed, thereby providing highly sensitive and stable motor speed control. For this reason, in the prior art shown in FIG. 2, the output signal e of the sample and hold circuit is usually
Although the thread width is 9 and the voltage is 1, the speed control range actually used is (1/2 V 1±ΔV). Focusing on the above points, the present invention focuses on the on-state of the switch 8.

The base potential of the transistor 7 is fixed.

In order for the reference voltage source 20 to not affect the motor speed controllable range, the voltage v2 of the reference voltage source 20 must be set so that (1/2V+-Δv)≧(V2 Vy-VBg) is satisfied. Therefore, when the switch 8 is turned on for such voltage v2, the transistor 17 caused by the capacitor 18
Transistor 170 by 20 of the reference voltage when the emitter voltage of is maximum, (V, V BE )
Since the base voltage is , by setting the resistance values R1 and R2 of the breaks 22 and 23 so that the voltage v1 of the constant voltage power supply 19 is , (V2-
By increasing R2/(R++R2), the same characteristics can be obtained over a wide power supply voltage range without changing the basic configuration.

〔Effect of the invention〕

As explained above, according to the present invention, there is no need to use a transistor with a particularly high reverse withstand voltage, and there is no need to change the basic configuration of the conventional sample-and-hold circuit. By simply adding a resistor and a resistor, it is possible to provide a sample and hold circuit that can operate without problems over a wide range of power supply voltages and eliminates the drawbacks of the prior art.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the basic configuration of the motor rotation speed control system, Fig. 2 is a circuit diagram showing a conventional example of the sample hold circuit shown in Fig. 1, and Fig. 6 1 is a block diagram showing the basic configuration of the motor rotation speed control system. FIG. 4 is a circuit diagram showing one embodiment of the sample hold circuit according to the present invention, FIG. 5 is an hourglass diagram showing the signals of each part of FIG. 4, and FIG. 6 is a motor rotation speed control. FIG. 3 is a characteristic diagram showing a control variable range in the system. 8°...Switch, 17...Transistor, 18...
- Capacitor, 20... Reference voltage, 21... Diode, 22.23... Resistor. O / Illustration---111------1 year old 3 years old
¥41] 5 years old 5 years old 6 years old

Claims (1)

[Claims] An input signal is supplied to the base terminal of the transistor during the sampling IJ pulse by the switching means f'L,
In a sample-and-hold circuit in which the emitter voltage of a transistor is held by a capacitor, the first. a second resistor, a diode, and a reference voltage source, the base terminal of the transistor being connected to the switch means via the first resistor and to the second resistor and the diode; is connected vertically to the base voltage source through a voltage source, so that a predetermined 0.0V is applied to the base terminal of the transistor outside the period of the sampling pulse. - A sample and hold circuit characterized in that it is configured to be able to supply a voltage.