JPS5896276U - Measuring jig for integrated circuits - Google Patents
Measuring jig for integrated circuitsInfo
- Publication number
- JPS5896276U JPS5896276U JP19107681U JP19107681U JPS5896276U JP S5896276 U JPS5896276 U JP S5896276U JP 19107681 U JP19107681 U JP 19107681U JP 19107681 U JP19107681 U JP 19107681U JP S5896276 U JPS5896276 U JP S5896276U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuits
- measuring jig
- recess
- external lead
- contact pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来例を示す断面図、第2図は他の従来例を示
す断面図、第3図は本考案の一実施例を示す断面図であ
る。
5・・・デュアルインライン型半導体集積回路装置、6
・・・外部リード、13・・・治具本体、14・・・凹
部、15・・・接触ピン、16・・・傾斜面、17・・
・端子。FIG. 1 is a sectional view showing a conventional example, FIG. 2 is a sectional view showing another conventional example, and FIG. 3 is a sectional view showing an embodiment of the present invention. 5...Dual in-line semiconductor integrated circuit device, 6
... External lead, 13 ... Jig body, 14 ... Recess, 15 ... Contact pin, 16 ... Inclined surface, 17 ...
・Terminal.
Claims (1)
型半導体集草回路装置の外部リードと対応する接触ピン
を配置すると共に、該接触ピンの上面を前記外部リード
がスライドして接触するための傾斜面としたことを特徴
とする集積回路用測定治具。A recess is provided in the jig main body, and a contact pin corresponding to the external lead of the dual in-line semiconductor grass collector circuit device is arranged in the recess, and the external lead slides on the upper surface of the contact pin to make contact. A measuring jig for integrated circuits characterized by having an inclined surface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19107681U JPS5896276U (en) | 1981-12-23 | 1981-12-23 | Measuring jig for integrated circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19107681U JPS5896276U (en) | 1981-12-23 | 1981-12-23 | Measuring jig for integrated circuits |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5896276U true JPS5896276U (en) | 1983-06-30 |
Family
ID=30104559
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19107681U Pending JPS5896276U (en) | 1981-12-23 | 1981-12-23 | Measuring jig for integrated circuits |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5896276U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990005516A (en) * | 1997-06-30 | 1999-01-25 | 윤종용 | Test Sockets for Semiconductor Chip Package Testing |
-
1981
- 1981-12-23 JP JP19107681U patent/JPS5896276U/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990005516A (en) * | 1997-06-30 | 1999-01-25 | 윤종용 | Test Sockets for Semiconductor Chip Package Testing |
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