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JPS5825982B2 - Corona discharge charge quantification detection device - Google Patents

Corona discharge charge quantification detection device

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Publication number
JPS5825982B2
JPS5825982B2 JP14413876A JP14413876A JPS5825982B2 JP S5825982 B2 JPS5825982 B2 JP S5825982B2 JP 14413876 A JP14413876 A JP 14413876A JP 14413876 A JP14413876 A JP 14413876A JP S5825982 B2 JPS5825982 B2 JP S5825982B2
Authority
JP
Japan
Prior art keywords
calibration pulse
period
corona
power supply
supply voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14413876A
Other languages
Japanese (ja)
Other versions
JPS5369042A (en
Inventor
裕教 吉野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP14413876A priority Critical patent/JPS5825982B2/en
Priority to GB44837/77A priority patent/GB1562853A/en
Priority to US05/846,397 priority patent/US4191921A/en
Publication of JPS5369042A publication Critical patent/JPS5369042A/en
Publication of JPS5825982B2 publication Critical patent/JPS5825982B2/en
Expired legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は例えばテレビジョン受像機のフライバックトラ
ンスのように電源電圧の周期に応じて周期的に発生する
コロナ放電の放電電荷量を定量化して検出する装置に係
り、雑音信号を除去しながら定量化することを目的とす
るものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device for quantifying and detecting the discharge charge amount of corona discharge that occurs periodically in accordance with the cycle of the power supply voltage, such as in a flyback transformer of a television receiver, for example. The purpose is to quantify while removing noise signals.

従来のコロナ放電検出装置では、放電電荷の校正のため
に校正パルス発生回路を備え、ここで発生した校正パル
スをコロナ信号検出用、インピーダンス又は結合回路に
コンデンサを介して加え、コロナ信号と校正パルスの大
きさを比較して放電電荷量を校正している。
Conventional corona discharge detection devices are equipped with a calibration pulse generation circuit to calibrate the discharge charge, and the calibration pulse generated here is applied to the impedance or coupling circuit for corona signal detection via a capacitor, and the corona signal and calibration pulse are The amount of discharged charge is calibrated by comparing the magnitude of .

この放電電荷量の校正をオシロスコープを観測しながら
行なう場合には、校正パルスを電源電圧の周期と同期さ
せることによって静止画像として表わし、画面に表われ
た校正パルスとコロナ信号との大きさを比較することに
より放電電荷量を算出するのである。
When calibrating the amount of discharged charge while observing the oscilloscope, synchronize the calibration pulse with the cycle of the power supply voltage to display it as a still image, and compare the magnitude of the calibration pulse displayed on the screen with the corona signal. By doing so, the amount of discharged charge is calculated.

この場合校正パルスは電源電圧のできるだけ全周期にわ
たって存在するようにしてオシロスコープの画面上の輝
度をあげると共にちらつきを防止して見易くしている。
In this case, the calibration pulse is made to exist over the entire cycle of the power supply voltage as much as possible to increase the brightness on the screen of the oscilloscope and to prevent flickering and make it easier to see.

第1図aはかかる場合のオシロスコープのブラウン管上
の観測波形を示す。
FIG. 1a shows the observed waveform on the cathode ray tube of the oscilloscope in such a case.

同図において1は電源電圧波形、2はコロナ信号、3は
校正パルスで、校正パルス3は電源電圧波形1上の一定
の位相に存在している。
In the figure, 1 is a power supply voltage waveform, 2 is a corona signal, and 3 is a calibration pulse.The calibration pulse 3 exists at a constant phase on the power supply voltage waveform 1.

同図すはリサージュ図形上にコロナ信号2と校正パルス
3が表わされている状態を示し、この場合にも電源電圧
波形1に対して校正パルス3を決まった位相で存在させ
れば校正パルスは静止画像として表示され、コロナ信号
と比較できる。
The figure shows a state in which the corona signal 2 and the calibration pulse 3 are expressed on the Lissajous figure. In this case, too, if the calibration pulse 3 is present at a fixed phase with respect to the power supply voltage waveform 1, the calibration pulse will be generated. is displayed as a still image and can be compared with the corona signal.

これに対し電源電圧の周期に同期した雑音が混在するコ
ロナ信号をディジクル信号に変換し、前記電源電圧に同
期した第1の周期例えば奇数番目の周期と第2の周期例
えば偶数番目の周期に存在する第1及び第2のディジク
ル信号を得、この第1のディジタル信号から第2のディ
ジタル信号を減算することにより前記雑音を消去してコ
ロナ信号を観測する場合には、放電電荷量の校正のため
に校正パルスを電源電圧の全周期にわたって存在させる
ときには第1のディジクル信号にも第2のディジクル信
号にも同じ校正パルスが入って来ることになり、減算す
ると校正パルスが消えて校正ができなくなる。
On the other hand, a corona signal containing noise synchronized with the cycle of the power supply voltage is converted into a digital signal, and the corona signal exists in a first cycle, e.g., an odd-numbered cycle, and a second cycle, e.g., an even-numbered cycle, synchronized with the power supply voltage. When observing the corona signal by obtaining first and second digital signals and subtracting the second digital signal from the first digital signal to eliminate the noise, it is necessary to calibrate the amount of discharged charge. Therefore, when the calibration pulse is made to exist over the entire period of the power supply voltage, the same calibration pulse will enter both the first and second digital signals, and when subtracted, the calibration pulse will disappear and calibration will not be possible. .

第2図はかかる場合の観測波形を示し、aは第1の周期
、bは第2の周期の波形で、2はコロナ信号、3は校正
信号、4は電源電圧に同期した雑音を示す。
FIG. 2 shows the observed waveforms in such a case, where a is the waveform of the first period, b is the waveform of the second period, 2 is the corona signal, 3 is the calibration signal, and 4 is the noise synchronized with the power supply voltage.

第1の周期の波形aと第2の周期の波形すを減算すると
同図Cのように雑音が消滅すると同時に校正信号も消滅
する。
When the waveform a of the first period and the waveform S of the second period are subtracted, the noise disappears and the calibration signal also disappears at the same time as shown in C of the figure.

本発明はかかる不都合を解決することを目的とし、第3
図に示すように電源電圧と同期した第1の周期aには校
正パルス3を存在させるが、第2の周期すには校正パル
ス3を存在させず、いずれか一方の周期のディジタル信
号中にのみ校正パルスが存在するように校正パルス発生
回路を設定することにより、同図Cに示すように雑音信
号4のみを消滅させて校正信号3を残し定量化を可能と
したものである。
The present invention aims to solve such inconveniences, and the third aspect of the present invention is to
As shown in the figure, the calibration pulse 3 is present in the first period a synchronized with the power supply voltage, but the calibration pulse 3 is not present in the second period, and the calibration pulse 3 is not present in the digital signal of either period. By setting the calibration pulse generation circuit so that only the calibration pulse exists, as shown in FIG.

第4図は本発明によるコロナ放電電荷の定量化検出装置
の一実施例のブロック図を示し、5は高圧発生用トラン
スを駆動する駆動回路、6は高圧発生用トランス、7は
試料で、高圧発生用トランス6で発生した高圧が試料7
に印加される。
FIG. 4 shows a block diagram of an embodiment of the corona discharge charge quantification detection device according to the present invention, in which 5 is a drive circuit for driving a high voltage generation transformer, 6 is a high voltage generation transformer, 7 is a sample, and the high voltage The high pressure generated in the generation transformer 6 is the sample 7.
is applied to

8は試料7に結合された結合回路又はインピーダンスで
、結合回路で検出されたコロナ信号は増幅器9、A−D
変換器10、弁別器11を経てディジタル信号として一
方の周期のディジクル信号は被減算信号用記憶回路12
に又他方の周期のディジタル信号は減算信号用記憶回路
13に記憶される。
8 is a coupling circuit or impedance coupled to the sample 7, and the corona signal detected by the coupling circuit is sent to the amplifier 9, A-D.
The digital signal of one period is converted into a digital signal through the converter 10 and the discriminator 11 and is sent to the subtracted signal storage circuit 12.
Also, the digital signal of the other period is stored in the subtraction signal storage circuit 13.

記憶回路12.13から読み出された信号は加減算器1
4で演算され、その結果がD−A変換器15を経て表示
部16に表示される。
The signals read from the memory circuits 12 and 13 are sent to the adder/subtractor 1.
4, and the result is displayed on the display unit 16 via the DA converter 15.

17はトリガパルス発生回路、18に制御回路、19に
校正パルス発生回路で、校正パルス発生回路19で発生
した校生パルスは結合回路8に加えられて一方の周期の
ディジタル信号にのみ校正パルスが存在するようにする
17 is a trigger pulse generation circuit, 18 is a control circuit, and 19 is a calibration pulse generation circuit.The calibration pulse generated by the calibration pulse generation circuit 19 is added to the coupling circuit 8, so that the calibration pulse exists only in the digital signal of one period. I'll do what I do.

第5図は上述の校正パルス発生回路19の一実施例であ
り、電源電圧に同期した電源電圧と等しい周波数の短形
波信号が入力端子20よりフリップフロップ回路21の
クロックパルスとして加えられ、フリップフロップ回路
21の出力としてクロックパルスの半分の周波数の矩形
波信号が発生する。
FIG. 5 shows an embodiment of the above-mentioned calibration pulse generation circuit 19, in which a rectangular wave signal synchronized with the power supply voltage and having the same frequency as the power supply voltage is applied as a clock pulse to the flip-flop circuit 21 from the input terminal 20. A rectangular wave signal having half the frequency of the clock pulse is generated as an output of the pull-up circuit 21.

この出力は単安定マルチバイブレーク22の入力として
加えられ、充放電コンデンサ24の放電回路を構成する
スイッチングトランジスタ23のベースに、コンデンサ
24に蓄えられた電荷を放電するに足るパルス幅を有す
るスイッチングパルスを発生させる。
This output is added as an input to the monostable multi-bi break 22, and a switching pulse having a pulse width sufficient to discharge the charge stored in the capacitor 24 is applied to the base of the switching transistor 23 that constitutes the discharge circuit of the charge/discharge capacitor 24. generate.

これによって充放電コンデンサ24は電源電圧に対して
1サイクルおきに充放電されることになる。
As a result, the charging/discharging capacitor 24 is charged/discharged every other cycle with respect to the power supply voltage.

25はコンデンサ24を充電する直流電源である。25 is a DC power supply that charges the capacitor 24.

このようにしてコンデンサ24と抵抗26等で定まる既
知の放電量を有する放電パルスがコンデンサ27を通っ
て第4図のコロナ放電検出用結合回路8に入力される。
In this way, a discharge pulse having a known discharge amount determined by the capacitor 24, the resistor 26, etc. is inputted to the corona discharge detection coupling circuit 8 of FIG. 4 through the capacitor 27.

このように本発明によれば電源電圧に同期した雑音が混
在するコロナ信号をディジクル信号に変換し、前記電源
電圧に同期した第1及び第2の周期に存在する第1及び
第2のディジタル信号を得、この第1のディジタル信号
から第2のディジタル信号を減算することにより前記雑
音を消去してコロナ放電を検出する場合の放電電荷量の
定量化が可能となり、例えば動作時に電源周期に同期し
た電源電圧の高次高調波を発生するフライバックトラン
ス等のコロナ放電の定量化に利用して高次高調波による
雑音を除去してコロナ放電の定量化検出を行なうことが
できる。
As described above, according to the present invention, a corona signal mixed with noise synchronized with the power supply voltage is converted into a digital signal, and the first and second digital signals existing in the first and second periods synchronized with the power supply voltage are converted into digital signals. By subtracting the second digital signal from the first digital signal, it is possible to eliminate the noise and quantify the amount of discharged charge when detecting corona discharge. The present invention can be used to quantify corona discharge of a flyback transformer or the like that generates high-order harmonics of the power supply voltage, and noise caused by the high-order harmonics can be removed to perform quantitative detection of corona discharge.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のコロナ放電観測波形、第2図は電源電圧
の周期に同期した雑音パルスが混在するコロナ信号の観
測波形、第3図は本発明の原理説明図、第4図は本発明
の一実施例の回路のブロック図、第5図は本発明の校正
パルス発生回路の一例を示す。 6・・・・・・高電圧トランス、7・・・・・・試料、
8・・・・・・結合回路、12,13・・・・・・記憶
回路、14・・・・・・加減器、16・・・・・・表示
部、19・・・・・・校正パルス発生回路。
Fig. 1 is a conventional corona discharge observed waveform, Fig. 2 is an observed corona signal waveform mixed with noise pulses synchronized with the period of the power supply voltage, Fig. 3 is a diagram explaining the principle of the present invention, and Fig. 4 is the present invention. FIG. 5 is a block diagram of a circuit according to an embodiment of the present invention, and shows an example of a calibration pulse generation circuit of the present invention. 6... High voltage transformer, 7... Sample,
8... Combination circuit, 12, 13... Memory circuit, 14... Adjuster, 16... Display unit, 19... Calibration Pulse generation circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 電源電圧に同期した第1の周期と第2の周期に発生
するコロナ信号をディジタル信号に変換してそれぞれ別
々に記憶装置に記憶させ、記憶された前記2つの信号を
読出して演算することによってコロナ放電を検出するコ
ロナ放電検出装置において、前記第1の周期と第2の周
期のいずれか一方の周期のディジタル信号にのみ校正パ
ルスを付加する校正パルス発生回路を設けたことを特徴
とするコロナ放電電荷の定量化検出装置。
1. By converting the corona signals generated in the first period and the second period synchronized with the power supply voltage into digital signals and storing them separately in a storage device, and reading out and calculating the two stored signals. A corona discharge detection device for detecting corona discharge, characterized in that a calibration pulse generation circuit is provided for adding a calibration pulse only to a digital signal in one of the first period and the second period. Discharge charge quantification detection device.
JP14413876A 1976-10-30 1976-11-30 Corona discharge charge quantification detection device Expired JPS5825982B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP14413876A JPS5825982B2 (en) 1976-11-30 1976-11-30 Corona discharge charge quantification detection device
GB44837/77A GB1562853A (en) 1976-10-30 1977-10-27 Corona discharge detection apparatus
US05/846,397 US4191921A (en) 1976-10-30 1977-10-28 Corona discharge detection apparatus which eliminates periodic noise

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14413876A JPS5825982B2 (en) 1976-11-30 1976-11-30 Corona discharge charge quantification detection device

Publications (2)

Publication Number Publication Date
JPS5369042A JPS5369042A (en) 1978-06-20
JPS5825982B2 true JPS5825982B2 (en) 1983-05-31

Family

ID=15355094

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14413876A Expired JPS5825982B2 (en) 1976-10-30 1976-11-30 Corona discharge charge quantification detection device

Country Status (1)

Country Link
JP (1) JPS5825982B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0261567A (en) * 1988-08-26 1990-03-01 Ngk Insulators Ltd Bushing with abnormal discharge detector

Also Published As

Publication number Publication date
JPS5369042A (en) 1978-06-20

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