JPS58123755A - Semiconductor device - Google Patents

Abstract

PURPOSE:To estimate easily the characteristics such as channel length of FET and mutual conductance etc. by a method wherein a bipolar transistor for monitoring is formed on the surface of the same substrate of duplicate diffused and insulated FET. CONSTITUTION:A bipolar transistor B is formed on a substrate similar to the substrate 11 formed into a duplicate diffused and insulated gate FET A. The base region 13b of the bipolar transistor B and the channel 13a of the FET A are formed into the same conductive type with the same depth of diffusion. Through the constitution so far mentioned, specific relations may be established between the amplification degree of the bipolar transistor B and the channel length of the FET. Therefore, the characteristics such as the channel length of FET A and the mutual conductance etc. may be monitored by means of measuring the amplification degree of the transistor B.

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to a semiconductor device, in particular a double diffused insulated r-) field effect transistor.

[Technical background of the invention]

The field effect transistor is one of the basic elements that make up semiconductor integrated circuits. Among these field effect transistors, the double diffused insulation r-) field effect transistor (hereinafter simply referred to as field effect transistor) is
It has the advantage of having a high breakdown voltage structure because the depletion layer spreads (double) in the channel part, and the manufacturing process is relatively simple.

As shown in FIG.
An N layer 12 is formed on 11.

Selective etching is performed within this N layer 12 to form a second layer 11, and further selective etching is performed within this P layer lj to diffuse and form a source region of N 19IJ 4 m *14h. A date electrode 16 is formed on the surface of these two layers 13 via an insulating film 15 made of V-lipon oxide or the like, and N layers 14m, 14b and P layer IJ are formed.
A source electrode 11 is formed so as to be in contact with each surface of the substrate.

Further, a drain electrode 18 is formed on the substrate 11.

Such a semiconductor device! l, channel 19 has @
Figure 1 (: There are two joints as shown.

Moreover, since there is a dlf difference, the depletion layer is difficult to expand as described above. Therefore, since /f lunch-through etc. are less likely to occur, it has the advantage of having a high voltage withstand structure.

[Interlayer point of background technology]

By the way, in the above field effect transistor, the channel length of one channel, which is one of the important factors determining the characteristics of the device, is determined by the lateral diffusion of the P layer IJ, the N layer 141, etc. Ru. What is the control of diffusion in this case?

This method performs diffusion in the depth direction, which is the horizontal direction, as 1 & fist, and its accuracy is 1. ．． ．． This is very expensive compared to the 1-chinda method. However, the measurement of the channel length mentioned above is specifically carried out using methods such as the angle latso and -rulap methods, which are methods for measuring the depth of diffusion. Easy to cause errors. In addition, when forming the channel 1g, evaluations such as measurement of the diffusion depth of each diffusion layer, which is the second layer 13 and the N layer 14m, are performed for each individual semiconductor device. Accordingly, conventional field effect transistors have the disadvantage of non-uniform device characteristics.

[Purpose of the invention]

This invention has been made in view of the above circumstances, and is intended to reduce channel length measurement errors and variations in characteristics of elements such as 7111 types of transconductors in double-diffused insulated r-) field effect transistors. An object of the present invention is to provide a semiconductor device having uniform element characteristics.

[Summary of the invention] □::1 In order to achieve the above objectives, this invention.

Forming a lateral bipolar transistor in the substrate of a double diffused isolated r-) field effect transistor. The diffusion layers in both the space region of the bipolar transistor and the channel region of the field effect transistor are formed to have the same conductivity type and the same diffusion depth. The channel length and mutual conductance 1 m are then predicted from the measurement of b(.) by utilizing the correlation between the convergence increase bfe of the ΔI-ra transistor and the channel length of the field effect transistor.

[Embodiments of the invention]

An example of the present invention will be described below with reference to the drawings. FIG. 2 shows the structure of a semiconductor device according to an embodiment of the present invention. For example, an NWIk 12 is formed on an N type semiconductor substrate (hereinafter simply referred to as a substrate) Ilk-, which is an N layer. A P-type diffusion layer (hereinafter referred to as a single C-P layer) 13, 13b is formed on the surface of this N layer I2 at a predetermined interval.
form. Further, N414m, 14b and 8 layers 21 are formed on each surface 1 of the P layers JJa and Jjb, and this N layer 14m becomes the source region of the field effect transistor. Further, the 8th layer 21 becomes an emitter region, and the 2nd layer 11
A bipolar transistor is formed together with the pace region b and the collector region of the N layer 12. Then, two-selective etching is performed on an insulating film such as silicon oxide to form contact holes so as to expose the surface of each region of this bipolar transistor.

The second layer 13b is formed through this contact hole.

II@ (- pace electrode JJa (El, emitter electrode jjjb (19) and pre-left electrode Jjc (C) are formed.Similarly, f-to electrode 16 of the field effect transistor is formed.
(q, source electrode IF (8) and drain electrode 18 (
D is formed, but since it is shown in Figure 1 and has an open collar, the explanation will be omitted.

For each such semiconductor device, C is used to improve the characteristics of, for example, the mutual conductance of a field effect transistor.
; lowers the concentration of the P layer 111 forming the channel 19, that is, improves the mobility. Furthermore, it is necessary to increase the concentration of the source region (N layer) 141 to reduce the source resistance and shorten the length of the layer 1. In such a case, the space region (P layer) 13b of the bipolar transistor (hereinafter referred to as the monitor section) has two layers 71M for manufacturing purposes.
It has been known from the past that there is a correlation between the pace-to-emitter voltage V1i1BO of the monitor section and the concentration of the Heath region JJb. Therefore, by measuring the voltage VIIIO of this monitor section, the concentration of the P layer JJa of the field effect transistor can be easily predicted. Also, the emitter region (N layer) of the monitor section
21 and the source region 14 can be made to be the same in manufacturing, and the diffusion depth of the space region 11b of the monitor section and the diffusion depth of the second layer 13 of the field effect transistor are also the same. That is, it is clear that the pace width of the monitor section and the channel width of the field effect transistor are the same, and that there is a correlation between bf6 (common emitter current amplification factor) of the monitor section and mutual conductance gm of the field effect transistor. Therefore, by measuring 'fe' of the monitor section, gm of the field effect transistor can be easily predicted, and the channel length and the concentration of the source region 14m, which are the meters of gm, can also be predicted.

In this way, the same substrate 1 as the field effect transistor
By forming a bipolar transistor serving as a monitor portion in 1, it is possible to determine the field effect from the measurement results of bfe of the Nodera I-Ra transaster. Therefore, by measuring bf・0 of bipolar transistors, it is possible to relatively easily control the manufacturing of field effect transistors such as channel length and channel width.
Since the measurement of * is easy and has little error, gm, which is the element characteristic of a field effect transistor, can be made almost uniform without variation. In addition, chemical treatment steps such as goal lapping, which were conventionally used to measure channel length, etc., can be omitted by replacing them with bfe measurement, which has the effect of improving one-work efficiency.

〔Effect of the invention〕

As mentioned above, according to the present invention, a monitor bipolar transistor is formed on the surface of the same substrate as the double one field effect transistor, and this pie
Characteristics such as the channel length and mutual conductance gat of a field effect transistor can be easily predicted from measurements of the current amplification factor hf@ of the field effect transistor. Therefore, it is possible to provide a semiconductor device in which measurement errors such as channel length are significantly reduced, and the characteristics of elements such as the mutual contactor 11m have uniform characteristics with little variation. In addition, chemical treatments such as lugs can be omitted in the process of measuring the channel length, etc., which has the effect of improving work efficiency in the manufacturing process.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional semiconductor device, and FIG. 2 is a block diagram of a semiconductor device according to an embodiment of the present invention. 11...Nm semiconductor substrate, 12...N layer, 11°1
3 Heat ◆, 1.1 b... P layer
, 14 Hatake, 14b, 21+...N layer, Is...insulating film, 18...r-to electrode, 1r...source electrode, 18...dray y electrode, 2
2m...Pace electrode, 22b...Emitter electrode, 2
2c...Collector electrode.

Claims (1)

[Claims] impurity regions of a second conductivity type III and a second conductivity type formed at predetermined intervals on the surface of a semiconductor substrate of a first conductivity type, and a portion of each of the first and second impurity regions. Impurity 11 of conductivity type @l and II2 of $2! a source bridge and an emitter electrode provided on the surface of the substrate and connected to the ls region and the first and I'$2 impurity regions of conductivity type '#42, respectively;
An r-) electrode provided on the surface of the first impurity region of the second conductivity type C2 via an insulating film and an impurity region C2 of the second conductivity type @2 are connected to the substrate. 1. A semiconductor device comprising: a pace electrode provided on a surface of the semiconductor device; and a collector electrode and a drain bridge connecting the semiconductor device to a semiconductor substrate.