JPS5763842A - Preparation of semiconductor integrated circuit - Google Patents
Preparation of semiconductor integrated circuitInfo
- Publication number
- JPS5763842A JPS5763842A JP14032280A JP14032280A JPS5763842A JP S5763842 A JPS5763842 A JP S5763842A JP 14032280 A JP14032280 A JP 14032280A JP 14032280 A JP14032280 A JP 14032280A JP S5763842 A JPS5763842 A JP S5763842A
- Authority
- JP
- Japan
- Prior art keywords
- film
- groove
- etching
- si3n4
- preparation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To form an insulating and separating region having a structure whose surface is almost free from unevenness, by utilizing the oxidation of a thin semiconductor film. CONSTITUTION:On a p type Si substrate 20 are formed an n type embedded region 21 and an n type epitaxial layer 22, whereon an SiO2 film 23 and an Si3N4 film 24 are formed. Next, a groove is formed by plasma spatter etching of a prescribed separating region, and a thin oxide film 27 is formed on the surface of the groove. Then, after an Si3N4 film 28 is formed on the whole surface, etching is applied thereto and thereby the Si3N4 film 28 is left only on the side surface of the groove. Next, in a similar way, a thin polycrystalline or amorphous Si film 29 is formed on the surface and it is left, by etching, only on the side surface of the groove. Then, oxidation is conducted in pressurized steam, whereby an SiO2 film 30 for insulation is formed. By the oxidiation of the Si film 29, the surface is made smooth.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14032280A JPS6029219B2 (en) | 1980-10-06 | 1980-10-06 | Manufacturing method of semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14032280A JPS6029219B2 (en) | 1980-10-06 | 1980-10-06 | Manufacturing method of semiconductor integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5763842A true JPS5763842A (en) | 1982-04-17 |
JPS6029219B2 JPS6029219B2 (en) | 1985-07-09 |
Family
ID=15266112
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14032280A Expired JPS6029219B2 (en) | 1980-10-06 | 1980-10-06 | Manufacturing method of semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6029219B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4574423A (en) * | 1983-02-09 | 1986-03-11 | Fuji Seiki Kabushiki Kaisha | Rotary damper having a clutch spring and viscous fluid |
JPS6435284U (en) * | 1987-08-27 | 1989-03-03 | ||
US4981813A (en) * | 1987-02-24 | 1991-01-01 | Sgs-Thomson Microelectronics, Inc. | Pad oxide protect sealed interface isolation process |
US5629230A (en) * | 1995-08-01 | 1997-05-13 | Micron Technology, Inc. | Semiconductor processing method of forming field oxide regions on a semiconductor substrate utilizing a laterally outward projecting foot portion |
US6306726B1 (en) | 1999-08-30 | 2001-10-23 | Micron Technology, Inc. | Method of forming field oxide |
-
1980
- 1980-10-06 JP JP14032280A patent/JPS6029219B2/en not_active Expired
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4574423A (en) * | 1983-02-09 | 1986-03-11 | Fuji Seiki Kabushiki Kaisha | Rotary damper having a clutch spring and viscous fluid |
US4981813A (en) * | 1987-02-24 | 1991-01-01 | Sgs-Thomson Microelectronics, Inc. | Pad oxide protect sealed interface isolation process |
JPS6435284U (en) * | 1987-08-27 | 1989-03-03 | ||
US5629230A (en) * | 1995-08-01 | 1997-05-13 | Micron Technology, Inc. | Semiconductor processing method of forming field oxide regions on a semiconductor substrate utilizing a laterally outward projecting foot portion |
US6306726B1 (en) | 1999-08-30 | 2001-10-23 | Micron Technology, Inc. | Method of forming field oxide |
US6326672B1 (en) | 1999-08-30 | 2001-12-04 | Micron Technology, Inc. | LOCOS fabrication processes and semiconductive material structures |
Also Published As
Publication number | Publication date |
---|---|
JPS6029219B2 (en) | 1985-07-09 |
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