JPS5720074A - Sampling circuit for video signal - Google Patents
Sampling circuit for video signalInfo
- Publication number
- JPS5720074A JPS5720074A JP9402380A JP9402380A JPS5720074A JP S5720074 A JPS5720074 A JP S5720074A JP 9402380 A JP9402380 A JP 9402380A JP 9402380 A JP9402380 A JP 9402380A JP S5720074 A JPS5720074 A JP S5720074A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- output signal
- signal
- counter
- oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/91—Television signal processing therefor
- H04N5/92—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
PURPOSE:To reproduce an original picture excellent by a small-sized device by setting the oscillation frequency of a voltage-controlled oscillator M times that of sampling clock pulses, and by generating the sampling clock pulses by dividing the frequency of its output by M. CONSTITUTION:A voltage-controlled oscillator 3 oscillates at a higher frequency than a video signal frequency, and the frequency of the output signal of the oscillator 3 is divided by a counter 4; and the output signal of the counter 4 and a horizontal synchronizing signal included in a TV signal are compared mutually by a phase detector 1 to obtain an output signal which corresponds to the phase. The output signal of the detector 1 is supplied via an LPF2 to the oscillator 3 to constitute a phase-locked loop PLL. Further, a counter 7 reset to a constant value with the horizontal synchronizing signal is provided, and this counter 7 divides the frequency of the output signal of the oscillator 3 in the PLL circuit to generate sampling clock pulses 6 of a frequency equal to that of a video signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9402380A JPS5720074A (en) | 1980-07-11 | 1980-07-11 | Sampling circuit for video signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9402380A JPS5720074A (en) | 1980-07-11 | 1980-07-11 | Sampling circuit for video signal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5720074A true JPS5720074A (en) | 1982-02-02 |
Family
ID=14098955
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9402380A Pending JPS5720074A (en) | 1980-07-11 | 1980-07-11 | Sampling circuit for video signal |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5720074A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56137891U (en) * | 1980-03-12 | 1981-10-19 | ||
| JPS6412691A (en) * | 1987-07-06 | 1989-01-17 | Mitsubishi Electric Corp | Video signal sampling circuit |
| US4843471A (en) * | 1986-12-11 | 1989-06-27 | Fuji Photo Equipment Co., Ltd. | Video image storage device |
-
1980
- 1980-07-11 JP JP9402380A patent/JPS5720074A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56137891U (en) * | 1980-03-12 | 1981-10-19 | ||
| US4843471A (en) * | 1986-12-11 | 1989-06-27 | Fuji Photo Equipment Co., Ltd. | Video image storage device |
| JPS6412691A (en) * | 1987-07-06 | 1989-01-17 | Mitsubishi Electric Corp | Video signal sampling circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA2081400A1 (en) | Frequency synthesis using frequency controlled carrier modulated with pll feedback signal | |
| KR920702143A (en) | Display Synchronization Timing Signal Generation System for Video Processing | |
| EP0166428A3 (en) | Time base error compensation device for video signal reproducing apparatus | |
| JPS5720074A (en) | Sampling circuit for video signal | |
| KR830004009A (en) | Switched Television Horizontal Oscillator Frequency-Controlled Loop with Offset Voltage | |
| JPH0834589B2 (en) | Sampling clock generator | |
| JPS57174990A (en) | Hard-copying machine | |
| CA2192881A1 (en) | PLL Circuit and Noise Reduction Means for PLL Circuit | |
| JPS55132108A (en) | Sweep signal generator | |
| JPS5550191A (en) | Electronic timepiece | |
| EP0206247A3 (en) | Pll frequency synthesizer | |
| JPS6412691A (en) | Video signal sampling circuit | |
| JPS5357914A (en) | Synchronous oscillator | |
| DK224688A (en) | OSCILLATOR EQUIPMENT TO PROVIDE AT LEAST TWO DIFFERENT FREQUENCIES | |
| JPS56162580A (en) | Pll circuit | |
| JPS57180282A (en) | Hard copy device | |
| SE8204555D0 (en) | LINE SYNCHRONIZING CIRCUIT FOR AN IMAGE PRESENTATION DEVICE | |
| JP2573727B2 (en) | PLL circuit for video signal | |
| KR970011589B1 (en) | Apparatus for generating a synchronization signal | |
| JPS57201389A (en) | Character pattern information display device | |
| JPS5679588A (en) | Receiver of character broadcast | |
| JPS57201388A (en) | Character pattern information display device | |
| JPS5468109A (en) | Signal generation unit | |
| JPS57169868A (en) | Video signal storage device | |
| JPS5656044A (en) | Phase locked loop circuit |