JPS57162520A - A/d converting system - Google Patents
A/d converting systemInfo
- Publication number
- JPS57162520A JPS57162520A JP4693881A JP4693881A JPS57162520A JP S57162520 A JPS57162520 A JP S57162520A JP 4693881 A JP4693881 A JP 4693881A JP 4693881 A JP4693881 A JP 4693881A JP S57162520 A JPS57162520 A JP S57162520A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- digital quantity
- time
- triangular wave
- input signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
- H03M1/56—Input signal compared with linear ramp
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To set resolution at an optional value, by varying the frequency of the clock signal which is used to measure the time in case the digital quantity is obtained by measuring the gate time that is obtained by comparing an input signal with a triangular wave. CONSTITUTION:An analog comparator 4 compares a triangular wave signal with an input signal and produces an output signal only for the gate time corresponding to the period of input signal >= triangular wave signal. A clock signal produced by an oscillator 1 is supplied to a gate circuit 5 which opens just for the time when the output signal of the comparator 4 exists. A counter 6 counts the number of clock signals supplied in the gate time, and the digital quantity is obtained. The period is decreased for the clock signal when the digital quantity is small and then increase when the digital quantity is large, respectively. In such way, the resolution can be set at a certain value or at an optional value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4693881A JPS57162520A (en) | 1981-03-30 | 1981-03-30 | A/d converting system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4693881A JPS57162520A (en) | 1981-03-30 | 1981-03-30 | A/d converting system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57162520A true JPS57162520A (en) | 1982-10-06 |
Family
ID=12761253
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4693881A Pending JPS57162520A (en) | 1981-03-30 | 1981-03-30 | A/d converting system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57162520A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010022063A (en) * | 2004-02-23 | 2010-01-28 | Sony Corp | Method and apparatus for ad conversion |
-
1981
- 1981-03-30 JP JP4693881A patent/JPS57162520A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010022063A (en) * | 2004-02-23 | 2010-01-28 | Sony Corp | Method and apparatus for ad conversion |
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