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JPS5630322A - D/a converter - Google Patents

D/a converter

Info

Publication number
JPS5630322A
JPS5630322A JP10618479A JP10618479A JPS5630322A JP S5630322 A JPS5630322 A JP S5630322A JP 10618479 A JP10618479 A JP 10618479A JP 10618479 A JP10618479 A JP 10618479A JP S5630322 A JPS5630322 A JP S5630322A
Authority
JP
Japan
Prior art keywords
buffer
data
decimal
analog value
variable gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10618479A
Other languages
Japanese (ja)
Inventor
Koichi Kita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP10618479A priority Critical patent/JPS5630322A/en
Publication of JPS5630322A publication Critical patent/JPS5630322A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/68Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To convert digital data represented in floating decimal point mode into an analog value efficiently by a simple constitution, by providing a D/A converter and variable gain circuit. CONSTITUTION:Digital input data represented in floating decimal point mode have sign-bit and mantissa parts stored in buffer 1 and an exponent part in buffer 2. Then, D/A converting circuit 3 converts the mantissa part into an analog value with the polarity of the sign bit held in buffer 1 in the same manner with D/A conversion in normal fixed decimal point representation. Further, the value of the exponent part held in buffer 2 is converted by decoder 4 into decimal data. Variable gain amplifier 5 has the gain controlled by the decimal data obtained by this data 4 and the output analog value of D/A converting circuit 3 is amplified with the gain that corresponds to the decimal data and then outputted from variable gain amplifier 5.
JP10618479A 1979-08-21 1979-08-21 D/a converter Pending JPS5630322A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10618479A JPS5630322A (en) 1979-08-21 1979-08-21 D/a converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10618479A JPS5630322A (en) 1979-08-21 1979-08-21 D/a converter

Publications (1)

Publication Number Publication Date
JPS5630322A true JPS5630322A (en) 1981-03-26

Family

ID=14427121

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10618479A Pending JPS5630322A (en) 1979-08-21 1979-08-21 D/a converter

Country Status (1)

Country Link
JP (1) JPS5630322A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5840943U (en) * 1981-09-08 1983-03-17 ヤマハ株式会社 Digital to analog converter
JP2018010646A (en) * 2009-06-19 2018-01-18 シンギュラー コンピューティング、エルエルシー Processing with compact arithmetic processing elements
CN115428346A (en) * 2020-03-17 2022-12-02 哲库科技有限公司 Digital variable gain adjustment on baseband chip

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5840943U (en) * 1981-09-08 1983-03-17 ヤマハ株式会社 Digital to analog converter
JP2018010646A (en) * 2009-06-19 2018-01-18 シンギュラー コンピューティング、エルエルシー Processing with compact arithmetic processing elements
CN115428346A (en) * 2020-03-17 2022-12-02 哲库科技有限公司 Digital variable gain adjustment on baseband chip
CN115428346B (en) * 2020-03-17 2023-08-25 哲库科技(上海)有限公司 Baseband chip, device and method for wireless communication

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