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JPS5630739A - Formation of polycrystalline silicon wiring layer - Google Patents

Formation of polycrystalline silicon wiring layer

Info

Publication number
JPS5630739A
JPS5630739A JP10556979A JP10556979A JPS5630739A JP S5630739 A JPS5630739 A JP S5630739A JP 10556979 A JP10556979 A JP 10556979A JP 10556979 A JP10556979 A JP 10556979A JP S5630739 A JPS5630739 A JP S5630739A
Authority
JP
Japan
Prior art keywords
polycrystalline
sio2 film
wiring
injection
becomes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10556979A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Sato
Katsumi Murase
Michiyuki Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP10556979A priority Critical patent/JPS5630739A/en
Publication of JPS5630739A publication Critical patent/JPS5630739A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To enable multilayer wiring by a method wherein a polycrystalline Si at the unrequired portion of the wiring is oxidized, and make it an insulator to form an even wiring. CONSTITUTION:The polycrystalline Si 2 is vapor phased grown on an insulator 1 and a mask 3 is formed for an ion injection. As or other is injected after the polycrystalline Si 2 is etching eliminated as much as the expanded thickness by the oxidizing. When the mask 3 is eliminated and oxidized at a low temperature, a diffusion to the lateral direction is prevented and the oxidizing is accelerated by the As injection, the SiO2 film 4 is formed in thick at the injected part and in thin at the noninjected part, and the polycrystalline Si 2 is remained at the noninjected part. Since As is segregated and accumulated at the bottom of the SiO2 film, the density of As becomes thin at a side of the SiO2 film, the pattern conversion difference of the SiO2 film 4 becomes as much as the standard deviation of the projected range of As, the concave and the convex on the surface becomes also extremly even. By the injection of As or other to the remained polycrystalline Si 2 and the adding of a heat processing, a conductive layer 5 is obtained. According to this constitution, the fine wiring layer having a rectangular cross can be obtained in a high precision and the disconnection can be prevented and the high integration can be realized in the multilayer wiring.
JP10556979A 1979-08-21 1979-08-21 Formation of polycrystalline silicon wiring layer Pending JPS5630739A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10556979A JPS5630739A (en) 1979-08-21 1979-08-21 Formation of polycrystalline silicon wiring layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10556979A JPS5630739A (en) 1979-08-21 1979-08-21 Formation of polycrystalline silicon wiring layer

Publications (1)

Publication Number Publication Date
JPS5630739A true JPS5630739A (en) 1981-03-27

Family

ID=14411151

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10556979A Pending JPS5630739A (en) 1979-08-21 1979-08-21 Formation of polycrystalline silicon wiring layer

Country Status (1)

Country Link
JP (1) JPS5630739A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63232633A (en) * 1987-03-20 1988-09-28 Fujitsu Ltd Transmission signal phase synchronizing and controlling system
JPH01174040A (en) * 1987-12-28 1989-07-10 Matsushita Electric Ind Co Ltd Data transmission equipment
JPH01231436A (en) * 1988-03-11 1989-09-14 Fujitsu Ltd Signal phase correction control system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63232633A (en) * 1987-03-20 1988-09-28 Fujitsu Ltd Transmission signal phase synchronizing and controlling system
JPH01174040A (en) * 1987-12-28 1989-07-10 Matsushita Electric Ind Co Ltd Data transmission equipment
JPH01231436A (en) * 1988-03-11 1989-09-14 Fujitsu Ltd Signal phase correction control system

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