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JPS56158579A - Ghost erasing device - Google Patents

Ghost erasing device

Info

Publication number
JPS56158579A
JPS56158579A JP6186880A JP6186880A JPS56158579A JP S56158579 A JPS56158579 A JP S56158579A JP 6186880 A JP6186880 A JP 6186880A JP 6186880 A JP6186880 A JP 6186880A JP S56158579 A JPS56158579 A JP S56158579A
Authority
JP
Japan
Prior art keywords
circuit
fed
output
video signal
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6186880A
Other languages
Japanese (ja)
Other versions
JPS6316073B2 (en
Inventor
Hideo Iwata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP6186880A priority Critical patent/JPS56158579A/en
Publication of JPS56158579A publication Critical patent/JPS56158579A/en
Publication of JPS6316073B2 publication Critical patent/JPS6316073B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region
    • H04N5/21Circuitry for suppressing or minimising disturbance, e.g. moirĂ© or halo
    • H04N5/211Ghost signal cancellation

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)

Abstract

PURPOSE:To use only the transversal filter circuit and to simplify a ghost eraser, by automatic and optimum connection of a tapped delay circuit in which a plurality of weightings are possible with short time width and a plurality of fixed delay circuits. CONSTITUTION:A video signal picked up from a TV receiver is fed to an A/D conversion circuit 2 via an input switching circuit 11, and it is converted to a digital value at the circuit 2 and inputted to an operation processing circuit 3. Further, a video signal is separated at a timing signal generating circuit 4 to generate the timing signal to detect specific sections taking the synchronizing signal as the reference and it is fed to the circuit 3. At this circuit 3, operation is made and the output after discrimination of condition is fed to a weighting circuit 10 and a delay switching circuit 7 taking the video signal as the input. Further, the output of M sets of fixed delay circuits 6-1-6-M is fed to N sets of tapped delay circuits 5-1- 5-N, the respective outputs are added at an addition circuit 8, the output of the circuit 8 is fed to a switching circuit 11, allowing to connect the circuits 5-1-5-N and 6-1-6-M automatically in optimum condition.
JP6186880A 1980-05-09 1980-05-09 Ghost erasing device Granted JPS56158579A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6186880A JPS56158579A (en) 1980-05-09 1980-05-09 Ghost erasing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6186880A JPS56158579A (en) 1980-05-09 1980-05-09 Ghost erasing device

Publications (2)

Publication Number Publication Date
JPS56158579A true JPS56158579A (en) 1981-12-07
JPS6316073B2 JPS6316073B2 (en) 1988-04-07

Family

ID=13183525

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6186880A Granted JPS56158579A (en) 1980-05-09 1980-05-09 Ghost erasing device

Country Status (1)

Country Link
JP (1) JPS56158579A (en)

Also Published As

Publication number Publication date
JPS6316073B2 (en) 1988-04-07

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