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JPS5568678A - Junction type field effect transistor - Google Patents

Junction type field effect transistor

Info

Publication number
JPS5568678A
JPS5568678A JP14297678A JP14297678A JPS5568678A JP S5568678 A JPS5568678 A JP S5568678A JP 14297678 A JP14297678 A JP 14297678A JP 14297678 A JP14297678 A JP 14297678A JP S5568678 A JPS5568678 A JP S5568678A
Authority
JP
Japan
Prior art keywords
type
region
regions
layer
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14297678A
Other languages
Japanese (ja)
Inventor
Tadaichi Murata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP14297678A priority Critical patent/JPS5568678A/en
Publication of JPS5568678A publication Critical patent/JPS5568678A/en
Pending legal-status Critical Current

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  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To provide a junction type field effect transistor (J-FET) having pentode vacuum tube characteristics of preferable saturation property by growing an epitaxial layer on a semiconductor substrate becoming a drain region and providing a lower gate region at the bottom thereof and upper gate and source regions on the surface layer thereof.
CONSTITUTION: An n-type layer is epitaxially grown on an n+-type semiconductor substrate 4 becoming a drain region, and a plurality of p-type buried gate regions 1-1∼1-4 are formed in the bottom region thereof. An upper P+-type gate region 2 is formed on the surface layer of the n-type epitaxial layer while disposing it among the regions 1-1∼1-4, and n+-type source regions 3-1∼3-4 are formed in the n-type epitaxial layer surrounded by the region 2. Thus, a depletion layer among the upper gate region 2 and the lower gate regions 1-1∼1-4 can be expanded or contracted to thereby provide a J-FET having pentode vacuum tube characteristics.
COPYRIGHT: (C)1980,JPO&Japio
JP14297678A 1978-11-20 1978-11-20 Junction type field effect transistor Pending JPS5568678A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14297678A JPS5568678A (en) 1978-11-20 1978-11-20 Junction type field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14297678A JPS5568678A (en) 1978-11-20 1978-11-20 Junction type field effect transistor

Publications (1)

Publication Number Publication Date
JPS5568678A true JPS5568678A (en) 1980-05-23

Family

ID=15328024

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14297678A Pending JPS5568678A (en) 1978-11-20 1978-11-20 Junction type field effect transistor

Country Status (1)

Country Link
JP (1) JPS5568678A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4454523A (en) * 1981-03-30 1984-06-12 Siliconix Incorporated High voltage field effect transistor
JPS60224279A (en) * 1984-04-20 1985-11-08 Agency Of Ind Science & Technol Transistor
CN104183645A (en) * 2013-05-27 2014-12-03 瑞萨电子株式会社 Vertical-channel type junction sic power fet and method of manufacturing same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4454523A (en) * 1981-03-30 1984-06-12 Siliconix Incorporated High voltage field effect transistor
JPS60224279A (en) * 1984-04-20 1985-11-08 Agency Of Ind Science & Technol Transistor
CN104183645A (en) * 2013-05-27 2014-12-03 瑞萨电子株式会社 Vertical-channel type junction sic power fet and method of manufacturing same
JP2014229859A (en) * 2013-05-27 2014-12-08 ルネサスエレクトロニクス株式会社 VERTICAL CHANNEL JUNCTION SiC POWER FET AND METHOD FOR MANUFACTURING THE SAME
US9691908B2 (en) 2013-05-27 2017-06-27 Renesas Electronics Corporation Vertical-channel type junction SiC power FET and method of manufacturing same

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