Nothing Special   »   [go: up one dir, main page]

JPS5495126A - Display device - Google Patents

Display device

Info

Publication number
JPS5495126A
JPS5495126A JP202878A JP202878A JPS5495126A JP S5495126 A JPS5495126 A JP S5495126A JP 202878 A JP202878 A JP 202878A JP 202878 A JP202878 A JP 202878A JP S5495126 A JPS5495126 A JP S5495126A
Authority
JP
Japan
Prior art keywords
raster address
output
reverse
control bit
multiplexer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP202878A
Other languages
Japanese (ja)
Inventor
Masahiro Iwamura
Shigeo Kuboki
Yoji Nishio
Shigeaki Yoshida
Kenichi Fukushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP202878A priority Critical patent/JPS5495126A/en
Publication of JPS5495126A publication Critical patent/JPS5495126A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To double the number of special patterns without increasing a memory capacity by using a multiplexer to switch selectively and output a reverse raster address and a raster address according to the state of a control bit which is included in output information of a refresh mrmory.
CONSTITUTION: Interface circuit 20 which adjusts the input/output timing of coded display information inputted from the external is provided to provide a pattern generator control bit in coded display information, and simultaneously, a raster address in the order reverse to the raster address outputted from timing control circuit 200 is generated by reverse raster address generator 409. Then, multiplexer 300 is used to switch selectively the reverse raster address and the raster address according to the state of the control bit included in output information of refresh memory 30 and output them to pattern generator 50. As a result, the number of special patterns can be doubled without increasing a memory capacity.
COPYRIGHT: (C)1979,JPO&Japio
JP202878A 1978-01-13 1978-01-13 Display device Pending JPS5495126A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP202878A JPS5495126A (en) 1978-01-13 1978-01-13 Display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP202878A JPS5495126A (en) 1978-01-13 1978-01-13 Display device

Publications (1)

Publication Number Publication Date
JPS5495126A true JPS5495126A (en) 1979-07-27

Family

ID=11517867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP202878A Pending JPS5495126A (en) 1978-01-13 1978-01-13 Display device

Country Status (1)

Country Link
JP (1) JPS5495126A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5824954A (en) * 1981-08-06 1983-02-15 Fujitsu Ltd Address controlling system
JPS58193583A (en) * 1982-02-24 1983-11-11 デイジ−・システムズ・コ−ポレ−シヨン Sign generator for raster scan display and sign rotation
JPS6031182A (en) * 1983-08-01 1985-02-16 日本電気株式会社 Crt controller

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5824954A (en) * 1981-08-06 1983-02-15 Fujitsu Ltd Address controlling system
JPH0223892B2 (en) * 1981-08-06 1990-05-25 Fujitsu Ltd
JPS58193583A (en) * 1982-02-24 1983-11-11 デイジ−・システムズ・コ−ポレ−シヨン Sign generator for raster scan display and sign rotation
JPS6031182A (en) * 1983-08-01 1985-02-16 日本電気株式会社 Crt controller

Similar Documents

Publication Publication Date Title
JPS51147924A (en) Memory unit
JPS5345939A (en) Ram circuit
JPS51118341A (en) Shift register type memory
JPS5768982A (en) Display device
JPS5495126A (en) Display device
JPS5477533A (en) Signal generating device
JPS54144827A (en) Address signal supply system for memory circuit
JPS5365021A (en) Display unit
JPS5438732A (en) Input/output order accepting system
JPS5438726A (en) Display unit
JPS5663676A (en) Pattern generator
JPS57198595A (en) Dynamic memory driving circuit
JPS5455329A (en) Display unit
JPS53103338A (en) Large-scale integrated circuit
JPS5597637A (en) Interface circuit for character/pattern display unit
JPS5384437A (en) Control system for test pattern generation
JPS5339019A (en) Pattern display unit
JPS53132227A (en) Output unit for video data
JPS5510648A (en) Memory unit
JPS52149924A (en) Address converter
JPS5428615A (en) Write control system of pitch information
JPS52100849A (en) Input/output control unit
JPS54139428A (en) Picture element data generation circuit
JPS54116968A (en) Time limit device
JPS5436135A (en) Character pattern generating circuit