JPH11352513A - Liquid crystal display device - Google Patents
Liquid crystal display deviceInfo
- Publication number
- JPH11352513A JPH11352513A JP15722398A JP15722398A JPH11352513A JP H11352513 A JPH11352513 A JP H11352513A JP 15722398 A JP15722398 A JP 15722398A JP 15722398 A JP15722398 A JP 15722398A JP H11352513 A JPH11352513 A JP H11352513A
- Authority
- JP
- Japan
- Prior art keywords
- signal line
- pixel electrode
- liquid crystal
- substrate
- crystal display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2203/00—Function characteristic
- G02F2203/02—Function characteristic reflective
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、液晶表示装置に関
する。[0001] The present invention relates to a liquid crystal display device.
【0002】[0002]
【従来の技術】図4に、従来の反射型液晶表示装置10
0の平面図を示し、この図4におけるB−B線に沿う縦
断面を図5に示す。この装置は、スイッチング素子とし
て薄膜トランジスタ(以下、TFTという)114がマ
トリクス状に配置されたアレイ基板110と、透光性対
向電極136が形成された対向基板130と、これらの
基板110及び130の間に挟持された液晶層150と
を備えている。2. Description of the Related Art FIG.
0 is a plan view, and FIG. 5 shows a vertical cross section along the line BB in FIG. This device includes an array substrate 110 on which thin film transistors (hereinafter, referred to as TFTs) 114 as switching elements are arranged in a matrix, a counter substrate 130 on which a light-transmitting counter electrode 136 is formed, and a And a liquid crystal layer 150 interposed therebetween.
【0003】アレイ基板110上には、行方向に沿って
複数配列され、同方向に沿って配置されているTFT1
14のゲートが共通接続された走査線113と、これと
直交する列方向に沿って複数配列され、この方向に沿っ
て配置されているTFT114のソース、ドレインの一
方の端子が共通接続された信号線119とが配線されて
いる。TFT114の他方の端子は、絶縁膜を介して信
号蓄積容量線116との間で信号の蓄積を行う容量を構
成すると共に、コンタクト125を介して後述する反射
画素電極120に接続されている。[0003] On the array substrate 110, a plurality of TFTs 1 arranged in the row direction and arranged in the same direction.
A scanning line 113 in which fourteen gates are connected in common, and a plurality of scanning lines 113 arranged in a column direction orthogonal to the scanning line 113, and a signal in which one of the source and drain terminals of the TFT 114 arranged in this direction is connected in common The line 119 is wired. The other terminal of the TFT 114 forms a capacitor for storing a signal with the signal storage capacitor line 116 via an insulating film, and is connected to a reflective pixel electrode 120 described later via a contact 125.
【0004】走査線113、信号線119、蓄積容量線
116、TFT114の上面には有機絶縁層118が形
成されており、この有機絶縁層118の上面には各画素
毎に対応して反射画素電極120が形成されている。An organic insulating layer 118 is formed on the scanning line 113, the signal line 119, the storage capacitor line 116, and the upper surface of the TFT 114. On the upper surface of the organic insulating layer 118, a reflective pixel electrode is provided corresponding to each pixel. 120 are formed.
【0005】対向基板130には、基板132の表面上
にカラーフィルタ134と共通電極136とが積層され
ている。カラーフィルタ134は、各画素毎に赤、青、
緑の各色が配列された構成となっている。そして、基板
132における液晶層150とは反対側の表面上に、位
相差板あるいは偏向板等の光学フィルム188が貼り付
けられている。On the counter substrate 130, a color filter 134 and a common electrode 136 are laminated on the surface of the substrate 132. The color filter 134 has a red, blue,
It has a configuration in which green colors are arranged. Then, an optical film 188 such as a retardation plate or a polarizing plate is attached to a surface of the substrate 132 opposite to the liquid crystal layer 150.
【0006】このように反射型液晶表示装置100は、
有機絶縁層118を介して、TFT114や信号蓄積容
量線116の上層に反射画素電極120が設けられてい
る。これにより、図中上方から入射された光を反射画素
電極120によって反射する面積を増大させることがで
き、その結果としてバックライトがなくとも暗い場所で
明るい画像を表示することが可能となる。As described above, the reflection type liquid crystal display device 100 has:
A reflective pixel electrode 120 is provided above the TFT 114 and the signal storage capacitor line 116 via the organic insulating layer 118. Thus, the area where light incident from above in the drawing is reflected by the reflective pixel electrode 120 can be increased, and as a result, a bright image can be displayed in a dark place without a backlight.
【0007】[0007]
【発明が解決しようとする課題】しかし、従来の液晶表
示装置には次のような問題があった。図6(a)に示さ
れたように、緑の中間調背景301にラスターウィンド
ウ302を表示させた場合、ウィンドウ302の端部に
おいて縦クロストークが生じる。図4において、反射画
素電極120と信号線119とは有機絶縁層118を介
して対向するので、容量結合した状態にある。ところ
が、ある画素電極120と容量結合する信号線119
は、当該画素電極120に接続された1本の信号線11
9のみである。However, the conventional liquid crystal display has the following problems. As shown in FIG. 6A, when the raster window 302 is displayed on the green halftone background 301, vertical crosstalk occurs at the end of the window 302. In FIG. 4, since the reflection pixel electrode 120 and the signal line 119 are opposed to each other with the organic insulating layer 118 interposed therebetween, they are in a capacitively coupled state. However, the signal line 119 capacitively coupled to a certain pixel electrode 120
Represents one signal line 11 connected to the pixel electrode 120
9 only.
【0008】このため、本来同じ緑色を表示すべき緑の
中間調背景301であっても、ラスターウィンドウ30
2の下に隣接する画素303と、ラスターウィンドウ3
02から離れた位置にある画素304とでは、信号線1
19が容量結合により画素電極120に与える影響が異
なってくる。即ち、ラスターウィンドウ302の上下方
向に隣接する画素304では、ラスターウィンドウ30
2を表示するための信号電位が信号線119に印加され
ているので、容量結合を介してその影響を受けることに
なる。For this reason, even if the green halftone background 301 is supposed to display the same green color, the raster window 30
2 and a pixel 303 adjacent to the raster window 3
02 and the pixel 304 at a position away from the signal line 1
19 has a different effect on the pixel electrode 120 due to capacitive coupling. That is, in the pixel 304 vertically adjacent to the raster window 302, the raster window 30
Since the signal potential for displaying No. 2 is applied to the signal line 119, the signal potential is affected via the capacitive coupling.
【0009】ここで、図5(a)に示されたように、画
素303にはラスターウィンドウ302の影響を受けて
電圧VP1が印加され、画素304には本来の電圧VP0が
印加されるものとする。この場合の画素303と画素3
03とにそれぞれ印加される画素電位の時間的変化は、
図7に示されるようである。Here, as shown in FIG. 5A, a voltage VP1 is applied to the pixel 303 under the influence of the raster window 302, and an original voltage VP0 is applied to the pixel 304. I do. Pixel 303 and pixel 3 in this case
03, the temporal change of the pixel potential respectively applied to
As shown in FIG.
【0010】そして、電圧VP1とVP0は以下のように表
すことができる。中間調の信号電位をVsg、黒色での信
号電位をVsb、ラスターウィンドウ表示を行う信号電位
をVswとする。さらに、ある画素とこれにTFTを介し
て接続された信号線との間のカップリング率をPco、こ
の信号線に隣接するi本目の信号線と当該画素との間の
カップリング率をPciとする。 VP0=Vsg … (1) VP1=Vsg+Pc0(Vsb−Vsg)+Pc1(Vsw−Vsg)+Pc2(Vsb−Vsg) +Pc3(Vsw−Vsg)+ … =Vsg+(Pc0+Pc2+PC4+…)(Vsb−Vsg) +(Pc1+Pc3+PC5+…)(Vsw−Vsg) … (2) この結果、画素303における画素電極120と画素3
04における画素電極120とでは実効電圧が相違し輝
度差が生じるので、クロストークが発生する。このよう
な問題は、透過型液晶表示装置においても同様に発生し
ていた。The voltages VP1 and VP0 can be expressed as follows. The halftone signal potential is Vsg, the black signal potential is Vsb, and the signal potential for raster window display is Vsw. Further, a coupling ratio between a certain pixel and a signal line connected to the pixel via a TFT is Pco, and a coupling ratio between an i-th signal line adjacent to the signal line and the pixel is Pci. I do. VP0 = Vsg (1) VP1 = Vsg + Pc0 (Vsb-Vsg) + Pc1 (Vsw-Vsg) + Pc2 (Vsb-Vsg) + Pc3 (Vsw-Vsg) + ... = Vsg + (Pc0 + Pc2 + PC4 + c + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc + Pc) ) (Vsw−Vsg) (2) As a result, the pixel electrode 120 and the pixel 3 in the pixel 303
Since the effective voltage differs from that of the pixel electrode 120 in 04 and a luminance difference occurs, crosstalk occurs. Such a problem also occurs in a transmission type liquid crystal display device.
【0011】本発明は上記事情に鑑みてなされたもの
で、クロストークを防止することが可能な液晶表示装置
を提供することを目的とする。The present invention has been made in view of the above circumstances, and has as its object to provide a liquid crystal display device capable of preventing crosstalk.
【0012】[0012]
【課題を解決するための手段】本発明の液晶表示装置
は、基板上にそれぞれスイッチング素子を有する画素電
極がマトリクス状に配置され、列方向に複数の信号線が
配列され、列毎にそれぞれの前記信号線に前記スイッチ
ング素子が共通接続されたアレイ基板と、前記アレイ基
板と対向するように配置され、基板上に透光性対向電極
が設けられた対向基板と、前記アレイ基板と前記対向基
板との間に挟持された液晶層とを備え、各信号線は、列
方向に沿って、該信号線に接続される画素電極と異なる
信号線に接続される画素電極とに交互に覆われているこ
とを特徴とする。According to the liquid crystal display device of the present invention, pixel electrodes each having a switching element are arranged in a matrix on a substrate, and a plurality of signal lines are arranged in a column direction. An array substrate in which the switching elements are commonly connected to the signal lines, a counter substrate arranged to face the array substrate, and a light-transmitting counter electrode provided on the substrate, the array substrate and the counter substrate Each signal line is alternately covered with a pixel electrode connected to the signal line and a pixel electrode connected to a different signal line along the column direction. It is characterized by being.
【0013】また、前記画素電極が不透明反射電極であ
ってもよい。Further, the pixel electrode may be an opaque reflective electrode.
【0014】あるいは本発明の液晶表示装置は、基板上
にそれぞれスイッチング素子を有する画素電極がマトリ
クス状に配置され、列方向に複数の信号線が配列され、
列毎にそれぞれの前記信号線に前記スイッチング素子が
共通接続されたアレイ基板と、前記アレイ基板と対向す
るように配置され、基板上に透光性対向電極が設けられ
た対向基板と、前記アレイ基板と前記対向基板との間に
挟持された液晶層とを備え、各画素電極は複数の信号線
と重畳しており、前記画素電極に重畳された信号線の領
域は前記信号線の全幅を含む領域であることを特徴とす
る。Alternatively, in the liquid crystal display device of the present invention, pixel electrodes each having a switching element are arranged in a matrix on a substrate, and a plurality of signal lines are arranged in a column direction.
An array substrate in which the switching element is commonly connected to each of the signal lines for each column, a counter substrate disposed to face the array substrate, and a light-transmitting counter electrode provided on the substrate; A liquid crystal layer sandwiched between the substrate and the counter substrate, wherein each pixel electrode overlaps with a plurality of signal lines, and a region of the signal line overlapped with the pixel electrode has an entire width of the signal line. It is a region that includes.
【0015】ここで信号線の全幅とは、列方向に直交す
る方向の信号線の長さとする。Here, the total width of the signal line is the length of the signal line in a direction orthogonal to the column direction.
【0016】また、各信号線が前記画素電極に重畳され
る面積は、それぞれ略等しいことが望ましい。It is preferable that the area where each signal line overlaps the pixel electrode is substantially equal.
【0017】[0017]
【発明の実施の形態】以下、本発明のー実施の形態につ
いて図面を参照して説明する。Embodiments of the present invention will be described below with reference to the drawings.
【0018】図1に、本実施の形態による液晶表示装置
の横方向の断面構造を示し、この図1におけるA−A線
に沿う縦方向の断面構造を図2に示す。本装置200
は、スイッチング素子としてTFT30a、30b、3
0c、…、300a、300b、300c、…がマトリ
クス状に配置されたアレイ基板20と、透光性対向電極
54が形成された対向基板80と、これらの基板20及
び80の間に挟持された液晶層90とを備えている。FIG. 1 shows a horizontal cross-sectional structure of the liquid crystal display device according to the present embodiment, and FIG. 2 shows a vertical cross-sectional structure along the line AA in FIG. This device 200
Are TFTs 30a, 30b, 3
, 300a, 300b, 300c,... Are arranged in a matrix, an opposing substrate 80 on which a translucent opposing electrode 54 is formed, and sandwiched between these substrates 20 and 80. And a liquid crystal layer 90.
【0019】アレイ基板20は、基板22上において行
方向(図中左右方向)に沿って複数本配列され、同方向
に沿って配置されているTFT30a、30b、30
c、…、300a、300b、300c、…のゲートが
共通接続された走査線24、240…と、これと直交す
る列方向(図中上下方向)に沿って複数本配列され、こ
の方向に沿って配置されている信号線27a、27b、
27c、…、とが配置されている。ここで、信号線27
aはTFT30a、300a…のソース、ドレインの一
方の端子が共通接続され、信号線27bはTFT30
b、300b、…の一方の端子が共通接続され、信号線
27cはTFT30c、300c、…の一方の端子が共
通接続されている。TFT30a、30b、30c、
…、300a、300b、300c、…の他方の端子
は、絶縁膜を介して信号蓄積容量線26との間で蓄積容
量を構成し、さらにコンタクト27を介して後述する画
素電極50a、50b、50c、…、500a、500
b、500c、…に接続されている。A plurality of array substrates 20 are arranged on the substrate 22 along a row direction (horizontal direction in the figure), and the TFTs 30a, 30b, 30 are arranged along the same direction.
, 300a, 300b, 300c,..., and a plurality of scanning lines 24, 240... which are connected in common, and a plurality of scanning lines are arranged in a column direction (vertical direction in FIG. Signal lines 27a, 27b,
27c,... Are arranged. Here, the signal line 27
are connected to one of the source and drain terminals of the TFTs 30a, 300a..., and the signal line 27b is connected to the TFT 30a.
One terminal of the TFTs 30c, 300c,... is commonly connected to the signal line 27c. TFTs 30a, 30b, 30c,
, 300a, 300b, 300c,... Constitute a storage capacitor with the signal storage capacitor line 26 via an insulating film, and further, via a contact 27, a pixel electrode 50a, 50b, 50c described later. , ..., 500a, 500
, 500c,...
【0020】より詳細には、TFT30a、30b、3
0c、…、300a、300b、300c、…は、チャ
ネル領域が形成される半導体層と、その両端に位置しソ
ース、ドレイン電極とオーミック接続される低抵抗半導
体層とを有する。低抵抗半導体層上に、ソース電極、ド
レイン電極が接続され、このうちの一方の電極がコンタ
クトホール29を介して画素電極50a、50b、50
c、…、500a、500b、500c、…に接続され
ている。More specifically, the TFTs 30a, 30b, 3
, 300a, 300b, 300c,... Have a semiconductor layer in which a channel region is formed, and low-resistance semiconductor layers located at both ends thereof and ohmic-connected to source and drain electrodes. A source electrode and a drain electrode are connected on the low-resistance semiconductor layer, and one of the electrodes is connected to the pixel electrodes 50 a, 50 b, and 50 through a contact hole 29.
,..., 500a, 500b, 500c,.
【0021】走査線24、240、…、信号線27a、
27b、27c、…、TFT30a、30b、30c、
…、300a、300b、300c、…の上面に図示さ
れていない保護膜が形成され、保護膜の上面には例えば
アクリル系樹脂から成る有機絶縁層118が形成されて
いる。この有機絶縁層118の上面に、各画素毎に対応
して反射画素電極50a、50b、50c、…、500
a、500b、500c、…が形成されている。反射画
素電極50a、50b、50c、…、500a、500
b、500c、…は、図中上方から入射された外部光を
反射する作用を有するように、例えば銀やアルミニウ
ム、あるいはこれらの合金等の反射率の高い材料により
形成されている。The scanning lines 24, 240,..., The signal lines 27a,
27b, 27c,..., TFTs 30a, 30b, 30c,
, 300a, 300b, 300c,..., A not-shown protective film is formed on the upper surface, and an organic insulating layer 118 made of, for example, an acrylic resin is formed on the upper surface of the protective film. On the upper surface of the organic insulating layer 118, the reflection pixel electrodes 50a, 50b, 50c,.
a, 500b, 500c,... are formed. Reflective pixel electrodes 50a, 50b, 50c, ..., 500a, 500
are formed of a material having a high reflectivity, such as silver, aluminum, or an alloy thereof, so as to reflect external light incident from above in the drawing.
【0022】対向基板80において、基板132の表面
上にカラーフィルタ52と共通電極54とが積層されて
いる。カラーフィルタ52は、各画素毎に赤、青、緑の
各色が配列された構成となっている。基板132におけ
る液晶層90とは反対側の表面上には、位相差板あるい
は偏向板等の光学フィルム188が貼り付けられてい
る。アレイ基板20と対向基板80との間には、液晶層
90が挟持されている。液晶層90としては、例えばネ
マティック液晶等の材料を用いることができる。In the counter substrate 80, a color filter 52 and a common electrode 54 are laminated on the surface of a substrate 132. The color filter 52 has a configuration in which red, blue, and green colors are arranged for each pixel. On the surface of the substrate 132 opposite to the liquid crystal layer 90, an optical film 188 such as a retardation plate or a polarizing plate is attached. A liquid crystal layer 90 is sandwiched between the array substrate 20 and the counter substrate 80. As the liquid crystal layer 90, for example, a material such as a nematic liquid crystal can be used.
【0023】アレイ基板20上に設けられたTFT30
a、30b、…により反射画素電極50a、50b、…
に印加される信号電位が画素毎にスイッチングされる。
図中上方から対向基板80を介して入射された外部光
が、反射画素電極50a、50b、…により反射され、
画素を単位として液晶層90により透過率が制御されて
所定の画像が形成される。The TFT 30 provided on the array substrate 20
The reflective pixel electrodes 50a, 50b,.
Is switched for each pixel.
External light incident from above in the figure via the counter substrate 80 is reflected by the reflective pixel electrodes 50a, 50b,.
The transmittance is controlled by the liquid crystal layer 90 for each pixel, and a predetermined image is formed.
【0024】そして、図4及び図5に示された従来の装
置と異なり、本実施の形態では反射画素電極50a、5
0b、50c、…、500a、500b、500c、…
のそれぞれの下方には、有機絶縁層118を介して2本
の信号線が対向するように配置されている。例えば、反
射画素電極50aに対しては、この画素に対応する信号
線27aの部分27a1のみならず、隣接する画素に対
応する信号線27bの部分27b2が対向している。反
射画素電極50bに対しては、この画素に対応する信号
線27bの部分27b1のみならず、隣接する画素に対
応する信号線27cの部分27c2が対向している。さ
らに、反射画素電極50aと対向する信号線27aの部
分27a1の面積と、信号線27bの部分27b2の面
積とは略同一であり、同様に反射画素電極50bと対向
する信号線27bの部分27b1の面積と、信号線27
cの部分27c2の面積とは略同一である。Unlike the conventional devices shown in FIGS. 4 and 5, in this embodiment, the reflective pixel electrodes 50a, 50a
0b, 50c, ..., 500a, 500b, 500c, ...
The two signal lines are arranged below each of the layers through the organic insulating layer 118 so as to face each other. For example, not only the portion 27a1 of the signal line 27a corresponding to this pixel but also the portion 27b2 of the signal line 27b corresponding to an adjacent pixel faces the reflective pixel electrode 50a. Not only the portion 27b1 of the signal line 27b corresponding to this pixel but also the portion 27c2 of the signal line 27c corresponding to the adjacent pixel faces the reflective pixel electrode 50b. Furthermore, the area of the portion 27a1 of the signal line 27a facing the reflective pixel electrode 50a is substantially the same as the area of the portion 27b2 of the signal line 27b, and similarly, the area of the portion 27b1 of the signal line 27b facing the reflective pixel electrode 50b. Area and signal line 27
The area of the portion 27c2 of c is substantially the same.
【0025】このように配線することで、絶縁膜118
を介してそれぞれの反射画素電極50a、50b、50
c、…、500a、500b、500c、…が二本の信
号線27a、27b、27c、…と容量結合する。例え
ば、反射画素電極50aは信号線27a及び27bと略
均等な面積で容量結合し、これに隣接する反射画素電極
50bは信号線27b及び27cと略均等な面積で容量
結合する。このため、ある反射画素電極とこれに隣接す
る他の反射画素電極との間の輝度差が緩和され、クロス
トークを防止することができる。この結果、図6に示さ
れたように緑の中間調背景301にラスターウィンドウ
302を表示させた場合、ウィンドウ302の下に隣接
する画素303に印加される電圧は、従来よりもウィン
ドウを表示する電圧の影響を受けず、他の領域の画素3
04に印加される本来の電圧VP0に接近したものとな
る。従って、ウィンドウ302の端部において縦クロス
トークの発生が防止される。By wiring in this manner, the insulating film 118 is formed.
Through the respective reflective pixel electrodes 50a, 50b, 50
, 500a, 500b, 500c,... are capacitively coupled to the two signal lines 27a, 27b, 27c,. For example, the reflective pixel electrode 50a is capacitively coupled to the signal lines 27a and 27b with a substantially equal area, and the adjacent reflective pixel electrode 50b is capacitively coupled to the signal lines 27b and 27c with a substantially equal area. For this reason, a luminance difference between a certain reflection pixel electrode and another reflection pixel electrode adjacent thereto is reduced, and crosstalk can be prevented. As a result, when the raster window 302 is displayed on the green halftone background 301 as shown in FIG. 6, the voltage applied to the pixel 303 adjacent below the window 302 displays the window more than before. Pixel 3 in other area without being affected by voltage
04 approaches the original voltage VP0 applied. Therefore, occurrence of vertical crosstalk at the end of the window 302 is prevented.
【0026】ところで、1本の信号線を2つの画素電極
と均等に容量結合させるには、例えば図3に示されるよ
うに、2つの画素電極201及び202の間に1本の信
号線203を配置することも考えられる。このような構
成では、信号線203の電位が容量結合を介して2つの
画素電極201及び202に与える影響を平均化するこ
とはできる。In order to uniformly capacitively couple one signal line to two pixel electrodes, for example, as shown in FIG. 3, one signal line 203 is connected between two pixel electrodes 201 and 202. It is also conceivable to arrange them. With such a configuration, the influence of the potential of the signal line 203 on the two pixel electrodes 201 and 202 via capacitive coupling can be averaged.
【0027】しかし、信号線203が画素電極201又
は202のいずれかの下に完全に覆われるように配置さ
れないと、信号線203の電位と対向電位とにより画素
電極の存在しない部分の液晶層が応答することになる。
この結果、信号線203の上部で不所望な表示を行って
しまう。よって、信号線は図3のように配置するのでは
なく、上記実施の形態のように、複数の画素電極のうち
各々の電極のみによって完全に覆われる部分を有するよ
うに配置する必要がある。即ち、図1に示された画素電
極50bを例にとると、この画素電極50bは信号線2
7b1の全幅を含む領域と信号線27c2の全幅を含む
領域と重畳する必要がある。ここで、信号線の全幅と
は、図示されたように列方向に直交する方向の信号線の
幅とする。However, if the signal line 203 is not disposed so as to be completely covered under either the pixel electrode 201 or 202, the liquid crystal layer in the portion where the pixel electrode does not exist may be formed by the potential of the signal line 203 and the opposite potential. Will respond.
As a result, an undesired display is performed above the signal line 203. Therefore, the signal lines need not be arranged as shown in FIG. 3 but arranged so as to have a portion completely covered by only each of the plurality of pixel electrodes as in the above embodiment. That is, taking the pixel electrode 50b shown in FIG. 1 as an example, this pixel electrode 50b is connected to the signal line 2
It is necessary to overlap a region including the entire width of 7b1 with a region including the entire width of the signal line 27c2. Here, the total width of the signal line is the width of the signal line in a direction orthogonal to the column direction as illustrated.
【0028】上述した実施の形態は一例であり、本発明
を限定するものではない。例えば、上記実施の形態では
1つの画素電極と2本の信号線とが対向するように配置
されている。しかし、2本に限らず3本以上の信号線と
1つの画素電極とが対向するように配置されていても、
同様な作用及び効果が得られる。但し、信号線の本数が
増えると信号線の長さが長くなり、配線領域の増加を招
くことになるので通常は3本以下にした方が望ましい。The above-described embodiment is merely an example, and does not limit the present invention. For example, in the above embodiment, one pixel electrode and two signal lines are arranged to face each other. However, even if not only two but also three or more signal lines and one pixel electrode are arranged so as to face each other,
Similar functions and effects can be obtained. However, if the number of signal lines increases, the length of the signal lines increases, which leads to an increase in the wiring area. Therefore, it is usually preferable to reduce the number to three or less.
【0029】また、本実施の形態は反射型液晶表示装置
を対象としているが、透過型液晶表示装置においても同
様に本発明を適用することで、クロストークを防止する
ことが可能である。但し、透過型液晶表示装置では画素
電極が透光性を有し、1つの画素電極の下に2本以上の
信号線を配置すると、開口率を確保することが困難にな
りやすい。これに対し、上記実施の形態のように反射型
液晶表示装置では画素電極が不透明な反射画素電極であ
るため、1つの画素の下に複数本の信号線を配置しても
開口率には影響せず、高輝度な表示が可能である。Although the present embodiment is directed to a reflection type liquid crystal display device, crosstalk can be prevented by applying the present invention to a transmission type liquid crystal display device. However, in a transmissive liquid crystal display device, a pixel electrode has a light-transmitting property, and when two or more signal lines are arranged under one pixel electrode, it is difficult to secure an aperture ratio. On the other hand, in the reflective liquid crystal display device as in the above embodiment, the pixel electrode is an opaque reflective pixel electrode, so even if a plurality of signal lines are arranged under one pixel, the aperture ratio is affected. Without doing so, a high-luminance display is possible.
【0030】[0030]
【発明の効果】以上説明したように、本発明の液晶表示
装置によれば、絶縁膜を介して1本の信号線がー画素電
極のみと対向する部分と他の画素電極のみと対向する部
分とを有するので、複数の画素電極との間で容量結合す
ることになり、画素電極間での輝度差を緩和してクロス
トークを防止することが可能である。As described above, according to the liquid crystal display device of the present invention, the portion where one signal line faces only the pixel electrode and the portion where only one pixel electrode faces only the other pixel electrode via the insulating film. Therefore, capacitive coupling is performed between the pixel electrodes and a plurality of pixel electrodes, and a luminance difference between the pixel electrodes can be reduced to prevent crosstalk.
【図1】本発明の第1の実施の形態による液晶表示装置
の平面方向の構造を示した横断面図。FIG. 1 is a cross-sectional view showing a structure in a planar direction of a liquid crystal display device according to a first embodiment of the present invention.
【図2】図1のA−A線に沿う縦断面構造を示した断面
図。FIG. 2 is a sectional view showing a longitudinal sectional structure along the line AA in FIG. 1;
【図3】液晶表示装置において1本の信号線が二つの画
素電極間に配置されている様子を示した平面図。FIG. 3 is a plan view showing a state in which one signal line is arranged between two pixel electrodes in a liquid crystal display device.
【図4】従来の液晶表示装置の平面方向の構造を示した
横断面図。FIG. 4 is a cross-sectional view showing a structure of a conventional liquid crystal display device in a plane direction.
【図5】図1のB−B線に沿う縦断面構造を示した断面
図。FIG. 5 is a sectional view showing a longitudinal sectional structure along the line BB of FIG. 1;
【図6】画面上に表示されたウィンドウとその周辺領域
とを示した説明図。FIG. 6 is an explanatory diagram showing a window displayed on a screen and a peripheral area thereof.
【図7】従来の液晶表示装置の画素電極に印加される信
号電圧の時間的変化を示したタイムチャート。FIG. 7 is a time chart showing a temporal change of a signal voltage applied to a pixel electrode of a conventional liquid crystal display device.
20 アレイ基板 22、132 基板 24、240 走査線 26 信号蓄積容量線 27a、27a1、27a2、27b、27b1、27
b2、27c、27c1、27c2 信号線 29 コンタクト 30a、30b、30c、300a、300b、300
c TFT 50a、50b、50c、500a、500b、500
c 反射画素電極 52 カラーフィルタ 54 共通電極 80 対向基板 90 液晶層 118 絶縁層 188 光学フィルム 200 液晶表示装置20 Array substrate 22, 132 Substrate 24, 240 Scan line 26 Signal storage capacitor line 27a, 27a1, 27a2, 27b, 27b1, 27
b2, 27c, 27c1, 27c2 Signal line 29 Contact 30a, 30b, 30c, 300a, 300b, 300
c TFT 50a, 50b, 50c, 500a, 500b, 500
c Reflective pixel electrode 52 Color filter 54 Common electrode 80 Counter substrate 90 Liquid crystal layer 118 Insulating layer 188 Optical film 200 Liquid crystal display
Claims (4)
る画素電極がマトリクス状に配置され、列方向に複数の
信号線が配列され、列毎にそれぞれの前記信号線に前記
スイッチング素子が共通接続されたアレイ基板と、 前記アレイ基板と対向するように配置され、基板上に透
光性対向電極が設けられた対向基板と、 前記アレイ基板と前記対向基板との間に挟持された液晶
層とを備える液晶表示装置において、 各信号線は、列方向に沿って、該信号線に接続される画
素電極と異なる信号線に接続される画素電極とに交互に
覆われていることを特徴とする液晶表示装置。A pixel electrode having a switching element on a substrate is arranged in a matrix, a plurality of signal lines are arranged in a column direction, and the switching element is commonly connected to each signal line for each column. An array substrate, a counter substrate disposed to face the array substrate, and provided with a light-transmitting counter electrode on the substrate, and a liquid crystal layer sandwiched between the array substrate and the counter substrate. In the liquid crystal display device, each signal line is alternately covered along a column direction with a pixel electrode connected to the signal line and a pixel electrode connected to a different signal line. apparatus.
とを特徴とする請求項1記載の液晶表示装置。2. The liquid crystal display device according to claim 1, wherein said pixel electrode is an opaque reflective electrode.
る画素電極がマトリクス状に配置され、列方向に複数の
信号線が配列され、列毎にそれぞれの前記信号線に前記
スイッチング素子が共通接続されたアレイ基板と、 前記アレイ基板と対向するように配置され、基板上に透
光性対向電極が設けられた対向基板と、 前記アレイ基板と前記対向基板との間に挟持された液晶
層とを備える液晶表示装置において、 各画素電極は複数の信号線と重畳しており、前記画素電
極に重畳された信号線の領域は前記信号線の全幅を含む
領域であることを特徴とする液晶表示装置。3. A pixel electrode having a switching element on a substrate is arranged in a matrix, a plurality of signal lines are arranged in a column direction, and the switching element is commonly connected to each signal line for each column. An array substrate, a counter substrate disposed to face the array substrate, and provided with a light-transmitting counter electrode on the substrate, and a liquid crystal layer sandwiched between the array substrate and the counter substrate. In a liquid crystal display device, each pixel electrode overlaps with a plurality of signal lines, and a region of the signal line overlapped with the pixel electrode is a region including the entire width of the signal line.
はそれぞれ略等しいことを特徴とする請求項3記載の液
晶表示装置。4. The liquid crystal display device according to claim 3, wherein the area where each signal line overlaps the pixel electrode is substantially equal.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15722398A JP4180690B2 (en) | 1998-06-05 | 1998-06-05 | Liquid crystal display |
TW088108412A TW548452B (en) | 1998-06-05 | 1999-05-21 | Liquid crystal display apparatus |
KR10-1999-0020266A KR100427884B1 (en) | 1998-06-05 | 1999-06-02 | Liquid Crystal Display Device |
US09/325,538 US6259493B1 (en) | 1998-06-05 | 1999-06-04 | Active matrix LCD with pixels alternately overlapped with data lines |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15722398A JP4180690B2 (en) | 1998-06-05 | 1998-06-05 | Liquid crystal display |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH11352513A true JPH11352513A (en) | 1999-12-24 |
JP4180690B2 JP4180690B2 (en) | 2008-11-12 |
Family
ID=15644923
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15722398A Expired - Fee Related JP4180690B2 (en) | 1998-06-05 | 1998-06-05 | Liquid crystal display |
Country Status (4)
Country | Link |
---|---|
US (1) | US6259493B1 (en) |
JP (1) | JP4180690B2 (en) |
KR (1) | KR100427884B1 (en) |
TW (1) | TW548452B (en) |
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- 1999-06-02 KR KR10-1999-0020266A patent/KR100427884B1/en not_active IP Right Cessation
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Also Published As
Publication number | Publication date |
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TW548452B (en) | 2003-08-21 |
KR100427884B1 (en) | 2004-04-30 |
KR20000005852A (en) | 2000-01-25 |
US6259493B1 (en) | 2001-07-10 |
JP4180690B2 (en) | 2008-11-12 |
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