JPH11341081A - Transmitter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To transmit/receive data of a low error ratio through an equilibrium transmission line. SOLUTION: The transmitter is provided with a data compensation signal generation means 11 for generating a data compensation signal CLK, CLK/, a data signal generation means 1 for generating a data signal S to be transmitted synchronously with the data compensation signal, a transmitting means 1 for sending the data signal and the data compensation signal to an equilibrium transmission line, a transmission line protection means 3 for protecting a receiving means 2 from a fault on the transmission line, the receiving means for receiving and outputting the data signal and the data compensation signal sent through the transmission line, a receiving timing detection means 20 for detecting the effective timing of the data signal inputted to a data processing means 21 based on the data compensation signal outputted from the receiving means, and the data processing means 21 for entering the data signal from the receiving means based on the effective timing and processing the signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission apparatus for exchanging data via a balanced transmission line.

[0002]

2. Description of the Related Art FIG. 3 is a block diagram showing a conventional transmission apparatus for exchanging data via a balanced transmission line. FIGS. 4A and 4B are explanatory diagrams of the operation of a conventional transmission device for exchanging data via a balanced transmission line. FIG. 4A shows a signal waveform to be transmitted, and FIG. 4B shows a signal waveform to be transmitted. FIG. 4C shows one differential signal waveform converted into a differential signal, FIG. 4C shows the other differential signal waveform obtained by converting a signal waveform to be transmitted into a differential signal, and FIG. 3 shows an output signal waveform output by the receiving means based on the differential signal. FIG. 5 is an explanatory diagram of the operation of the receiving means in a state where data transmission / reception is performed via an ideal balanced transmission path. FIG. 5 (a) shows a differential signal waveform input to the receiving means. FIG. 5B shows an output signal waveform output by the receiving means. FIG. 6 is a circuit diagram showing the transmission path protection means and the reception means. FIG.
FIGS. 7A and 7B are explanatory diagrams of the operation of the receiving means when the balanced transmission line is disconnected. FIG. 7A shows a differential signal waveform input to the receiving means, and FIG. 3 shows a signal waveform. FIG. 8 is a diagram for explaining the operation of the receiving means in a state where data transmission / reception is performed via a realistic balanced transmission line. FIG. 8A shows a signal waveform to be transmitted.
FIG. 8B shows the waveform of the differential signal input to the receiving means, and FIG. 8C shows the waveform of the output signal output from the receiving means.

[0003] A balanced transmission line has an
It has characteristics that it is resistant to common mode noise, capable of high-speed transmission, capable of long-distance transmission, and easy to connect to a bus, and is widely used.

As shown in FIG. 3, in a transmission apparatus for exchanging data via a balanced transmission line L, when a signal S to be transmitted is input to the transmission means 1, the transmission means 1 S _a, and sent to the balanced transmission line L upon converted to S _b, the receiving means 2 differential signals S _a, the difference in S _b, for receiving a signal S 'that has been transmitted. FIG. 4 shows a specific signal relationship among the signal S to be transmitted, the differential signals S _{a and} S _b , and the transmitted signal S ′.

When a short circuit or disconnection occurs in the balanced transmission line L, the difference value cannot be obtained on the receiving side, so that the signal value cannot be specified. In the worst case, the receiving side device may be damaged. There is. In order to avoid such a situation, as shown in FIG. 6, referred to as fail-safe circuit in front of the receiving means 2, the voltage dividing resistors R _1, ... transmission line protection constituted by R ₄ Means 3 is inserted to avoid the failure of the receiving device.

For example, if the transmission line protection means 3 is not provided, the difference value (S _a -S _b ) becomes 0 when the balanced transmission line L is disconnected.
V, and the transmitted signal S ′ cannot be specified. Normally, as shown in FIG. 5, the receiving means 2 includes a high-side threshold H ₀ for signal determination with a zero level Z ₀ interposed therebetween.
And a Low side threshold L _0, the difference value (S _a -S _b) is in the range W of the threshold H ₀ and the threshold value L _0, it can not be identified received signal. However, the provision of the transmission line protection means 3 allows the resistance R to be maintained even when the balanced transmission line L is disconnected.
_1, by the action of R _2, the differential signal S _a of the receiving unit _2, S _b
Is not the zero level Z ₀ , for example, a level H ₁ exceeding a threshold value H ₀ as shown in FIG. 7A, and the output signal of the receiving means 2 as shown in FIG. Hi
gh can be fixed. Of course, it is also possible to fix the output signal of the receiving means 2 to Low.

[0007]

By the way, in the transmission device of the balanced transmission line into which the transmission line protection means 3 is inserted as described above, the differential signals S _{a and} S _{b at} the input of the receiving means 2 are used.
Is normally shifted to the low side or the high side. As a result, the data signal coming through the balanced transmission line L in which the transmission line protection means 3 is inserted is 50% in the high period and 50% in the low period when transmitted from the transmission unit 1.
Even if the data signal has a duty ratio of 50%,
At the time when the signal is received by the receiving means 2, the High period and the Low period are different.

For example, even if a data signal having a duty ratio of 50%, such as a clock signal as shown in FIG. 8A, is transmitted from the transmitting means, the receiving means as shown in FIG. if Shojire deterioration such as the difference signal is shifted to the Low side as the second input, be a long data signal High period T _h is the short and Low period T _l as shown in FIG. 8 (c), the difference signal If degradation such as shifting to the high side occurs, the data signal will be longer (higher) but shorter (lower), though not shown, as compared to the data signal with the same duty ratio having the same high and low periods as when it occurred. However, there is a problem that the transmission error rate is increased.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a low transmission error rate and low reliability even when a transmission line protection means is inserted in a balanced transmission line. And to provide an excellent transmission device with high performance.

[0010]

According to the present invention, there is provided a transmission apparatus for transmitting and receiving data via a balanced transmission line, comprising:
Data compensation signal generating means for generating a data compensation signal;
A data signal generating means for generating a data signal to be transmitted in synchronization with the data compensation signal, a transmission means for sending the data signal and the data compensation signal to a balanced transmission path, and a transmission for protecting the receiving means from a failure in the balanced transmission path Path protection means, reception means for receiving and outputting a data signal and a data compensation signal transmitted via a balanced transmission path, and data input to the data processing means based on the data compensation signal from the reception means It comprises a reception timing detecting means for detecting a valid timing of a signal, and a data processing means for receiving and processing a data signal from the receiving means based on the valid timing.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a transmission apparatus according to the present invention will be described below in detail with reference to FIGS. FIG. 1 is a block diagram showing a transmission device. 2A and 2B are timing charts of main signals for explaining the operation of the transmission apparatus. FIG. 2A shows a data signal at the time of occurrence, and FIG.
2C is a clock signal at the time of generation, FIG. 2C is an inverted clock signal at the time of generation, FIG. 2D is a data signal at the time of reception, and FIG.
2E shows a clock signal at the time of reception, FIG. 2F shows an inverted clock signal at the time of reception, and FIG. 2G shows an exclusive OR signal of the clock signal at reception and the inverted clock signal. In FIG. 1, the same parts as those of the transmission device described in the related art are denoted by the same reference numerals.

As shown in FIG. 1, the transmission apparatus comprises a transmitting means 1, a data signal generating means 10, a data compensation signal generating means 11, a balanced transmission line L, a receiving means 2, and a receiving timing detecting means 20. , Data processing means 21 and transmission path protection means 3.

The data signal generating means 10 generates a data signal S for transmission and outputs it to the transmitting means 1. The data compensation signal generating means 11 has a duty ratio of 50% for the high period and 50% for the low period corresponding to the data compensation signal.
A clock signal CLK which is a 0% signal and an inverted clock signal CLK / obtained by inverting the clock signal CLK are output to the transmitting means 1. The switching timing of the data signal S from High to Low and the switching timing of Low to High are synchronized with the switching timing of the clock signal CLK from High to Low and the switching timing of Low to High. The transmitting means 1 transmits the data signal S, the clock signal CLK, and the inverted clock signal CLK /
The signal is converted into a signal form that can be transmitted to the balanced transmission line L, and then transmitted to the balanced transmission line L.

The balanced transmission line L is composed of a multi-core twisted pair cable or the like. The transmission line protection unit 3 is inserted between the balanced transmission line L and the reception unit 2 to protect the reception unit 2 from failure even if the balanced transmission line L is disconnected for some reason. And, as described in the related art, is usually composed of a voltage dividing resistor.

The receiving means 2 receives the data signal S, the clock signal CLK, and the inverted clock signal CLK / which are transmitted from the transmitting means 1 to the balanced transmission line L and transmitted through the transmission line protection means 3. The clock signal CLK and the inverted clock signal CLK / in the received signal are converted into a clock signal CLK 'and an inverted clock signal CLK /' that can be processed by the reception timing detection means 20, and the reception timing detection means 20 And outputs the data signal S in the received signal to the data processing unit 21.
Is converted into a data signal S ′ that can be processed and output to the data processing means 21.

The reception timing detecting means 20 calculates an exclusive OR of the clock signal CLK 'and the inverted clock signal CLK /', and outputs the result of the exclusive OR signal EXOR.
And outputs it to the data processing means 21. The data processing unit 21 ignores the data invalid period T _M , which is the low period of the output of the reception timing detection unit 20, and ignores the data valid period T _U, which is the high period of the output of the reception timing detection unit 20.
The data signal S 'is determined and read in synchronization with the data signal S'.

The data signal S, the clock signal CLK, the inverted clock signal CLK /, the clock signal CLK ', and the inverted clock signal CLK /' are described above.
, The data signal S ′, and the exclusive OR signal EXOR have a timing relationship as shown in FIG.

That is, each of the data signal S, the clock signal CLK, and the inverted clock signal CLK /
Non-ideal realistic balanced transmission line L and transmission line protection means 3
Is received by the receiving means 2 via the
A clock signal CLK ′, which is an output signal of
For example, each of the inverted clock signal CLK / 'and the data signal S' has a narrow High period and a wide Low period degradation.

Then, in this case, the High of the data signal S '
Since the period is narrowed, when the data processing unit 21 reads the data signal S ′, the data determination timing (setup period and hold period) of the High signal is severe due to the narrowed High period.

However, in the transmission apparatus as described above, the data processing means 21 determines that the reception timing detecting means 20 uses the clock signal CLK 'and the inverted clock signal CL.
K / ', based on the exclusive OR signal EXOR generated from the data OR, avoids the data invalid period T _{M at} which the data signal S' is indefinite, and the data valid period at which the data signal S 'is determined data signal S in synchronization with the T _U reading 'to accept the data signal S'.

Therefore, in the transmission device as described above, the signal transmitted through the balanced transmission line L and the transmission line protection means 3 may have a narrow High period and a wide Low period. However, it is possible to exchange data with a low transmission error rate and high reliability.

Although the above description has been made on the assumption that the signal transmitted through the balanced transmission line L and the transmission line protection means 3 has a narrow High period and a wide Low period deterioration, Even in the case where the high period is wide and the low period is narrow, it is possible to exchange data with a low transmission error rate and high reliability.

[0023]

According to the first aspect of the present invention, the data processing means sequentially determines and reads the data signal based on the effective timing signal from the detection of the reception timing, so that the data signal is transmitted via the balanced transmission path. Even if the data signal deteriorates during transmission and becomes a data signal with a narrow High period and a wide Low period, or a data signal with a wide High period and a narrow Low period, a low transmission error rate and high reliability There is an effect that an excellent transmission device capable of exchanging data can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a transmission device according to an embodiment of the present invention.

FIG. 2 is a timing chart of a main signal explaining the operation of the transmission apparatus.

FIG. 3 is a block diagram showing a conventional transmission device for exchanging data via a balanced transmission line.

FIG. 4 is an explanatory diagram of an operation of a conventional transmission device which exchanges data via a balanced transmission line.

FIG. 5 is an explanatory diagram of an operation of the receiving means in a state where data transmission / reception is performed via an ideal balanced transmission path.

FIG. 6 is a circuit diagram showing a transmission path protection unit and a reception unit.

FIG. 7 is an explanatory diagram of the operation of the receiving means when the balanced transmission line is disconnected.

FIG. 8 is an explanatory diagram of the operation of the receiving means in a state where data transmission / reception is performed via a realistic balanced transmission path.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 transmission means 10 data signal generation means 11 data compensation signal generation means 2 reception means 20 reception timing detection means 21 data processing means 3 transmission path protection means L balanced transmission path S data signal S 'data signal CLK data compensation signal CLK' data compensation Signal CLK / Data compensation signal CLK / 'Data compensation signal

Claims (1)

[Claims] 1. A transmission apparatus for transmitting and receiving data via a balanced transmission path, comprising: a data compensation signal generating means for generating a data compensation signal; and a data generating means for synchronizing a data signal to be transmitted with the data compensation signal. Signal generating means, transmitting means for transmitting the data signal and the data compensation signal to the balanced transmission path, transmission path protecting means for protecting the receiving means from a failure in the balanced transmission path, and transmission via the balanced transmission path Receiving means for receiving and outputting the data signal and the data compensation signal,
Receiving timing detecting means for detecting the valid timing of a data signal input to the data processing means based on the data compensation signal from the receiving means, and data processing means for receiving and processing the data signal from the receiving means based on the valid timing A transmission device comprising: