JPH1096950A - Active matrix substrate and liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable transverse electric field driving with a high opening rate by electrically insulating and superposing gate wirings from and on canon wirings each other in a display region. SOLUTION: Semiconductor layers 3 of TFTs are formed on a transparent substrate 1 and gate insulating layers are formed. Further, gate electrodes 5 are formed and worked of polycrystalline Si films, etc. Next, n-regions 6 and p-regions are formed on the semiconductor layers 3. SiO2 , films, etc., are formed as insulating layers 8 thereon and further, contact holes are formed. Metallic films are formed and worked as the gate wirings 10. Contact holes 12 are then formed at the insulating layers 8, 11 and, thereafter, drain wirings 13, drain electrodes 14, pixel electrodes 15, light shielding films 16, common potential lines, etc., are formed and worked of metallic films. Further, a protective insulating film 18 is formed and after contact holes, etc., are formed on this protective insulating film 18, the comon wirings 20 are formed of oxide conductive films, etc. At this time, the canon wirings 20 are formed in the arrangement to be superposed on the gate wirings 10 in the display part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix substrate for a liquid crystal display device, and more particularly to an active matrix substrate for a liquid crystal display device.
The present invention relates to a liquid crystal display device suitable for driving liquid crystal by a lateral electric field method in which a substantially parallel electric field is applied between opposed electrodes.

[0002]

2. Description of the Related Art An active matrix type liquid crystal display device using an active element is widely used as a display terminal because it is thin and lightweight and has high image quality. An active matrix liquid crystal display device is manufactured by sandwiching liquid crystal between an active matrix substrate having an active matrix element such as a thin film transistor (TFT) and a substrate facing the active matrix substrate. The liquid crystal is controlled by an electric field applied between the pixel electrode and the counter electrode, and an image is formed by modulating and emitting light incident on the substrate.

Recently, in order to widen the viewing angle of a liquid crystal display device, a lateral electric field type liquid crystal display device in which a pixel electrode and a counter electrode are formed on an active matrix substrate and an electric field is applied substantially parallel to the substrate has been announced. JP-A-7-3605
Publication No. 8 and references "Proceedings of the 15th Interna"
nation Display Research Conference P.707 1995
In the technology disclosed in `` Year '', the direction of the liquid crystal is controlled by a horizontal electric field instead of a vertical electric field when viewed from the line of sight,
It is said that it is possible to widen the viewing angle. That is, according to the disclosed technology, since the counter electrode is connected to the common potential, it is necessary to form a common wiring in addition to the gate wiring and the drain wiring on the substrate, and the gate wiring and the common wiring are arranged on the substrate in parallel. They are arranged so that they do not overlap.

[0004]

However, in the active matrix substrate structure according to the prior art, the gate wiring and the common wiring are arranged in parallel, and the area occupied by the gate wiring, the common wiring and the drain wiring cannot be used as an opening. Therefore, there is a disadvantage that the aperture ratio becomes small. For this reason, when a liquid crystal display device is manufactured using this active matrix substrate, there is a disadvantage that the luminance is reduced. Further, when the brightness is improved by brightly illuminating the backlight, there is a disadvantage that the cooling mechanism needs to be strong and the volume of the display device increases.

Accordingly, it is an object of the present invention to provide an active matrix substrate capable of driving a horizontal electric field with a high aperture ratio. Another object is to provide a liquid crystal display device having a wide viewing angle and high luminance.

[0006]

A feature of an active matrix substrate that achieves the above object is that the active matrix substrate has a display area formed on a transparent substrate and includes a gate wiring and a common wiring. The gate wiring and the common wiring are electrically insulated and overlapped with each other.

Another feature is that, in an active matrix substrate that includes an active element, a gate wiring, and a common wiring on a transparent substrate and forms a display area and a peripheral circuit area, the potential of the common wiring is set to a gate ON level.
In some cases, a switching circuit that becomes the same potential as the gate potential of the gate wiring and keeps the common potential when the gate is turned off is provided in the peripheral circuit area, and the gate wiring and the common wiring are electrically connected in the display area. Insulate and overlap.

According to the present invention, the display area is increased by the area occupied by the common wiring, so that the aperture ratio of the pixel can be increased. Further, when the gate is turned on, the gate wiring and the common wiring have the same potential, and the influence of the capacitance between the two wirings can be ignored, so that the two wirings can be overlapped without increasing the load for gate driving.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The embodiments of the present invention will be described below with reference to the drawings (FIGS. 1 to 3) of the embodiments described later. The embodiment of the present invention is implemented by the following active matrix substrate configuration. T on transparent substrate 1
An FT semiconductor layer 3 is formed. As the semiconductor layer 3, thermal CVD (Chemical Vapor Deposit) is used.
(ion) method, a polycrystalline Si film formed by laser annealing or thermal annealing of an amorphous Si film formed by a low-pressure CVD method or a plasma CVD method, and the like. Next, the gate insulating layer 4 is formed. Examples of the gate insulating layer 4 include SiO ₂ and a thermal oxide film manufactured by a plasma CVD method. Further, the gate electrode 5 is formed and processed with a polycrystalline Si film or the like. Cr,
Examples include Al, Ta, Mo, and alloys using these metals. Next, the n-region 6 and the p-region 7 are formed by doping the semiconductor layer with phosphorus or boron by a method such as ion doping or laser annealing.

On this, an SiO ₂ film or the like is formed as an insulating layer 8, and further, a contact hole 9 is formed. Then, a metal film is formed and processed as the gate wiring 10. Examples of the metal film include Cr, Al, Ta, Mo, and alloys using these metals. When the gate electrode 5 is formed of metal, the gate wiring 10 can be formed and processed in the same manner. After forming the contact holes 12 in the gate insulating layer 4 and the insulating layers 8 and 11, the drain wiring 13, the drain electrode 14, the pixel electrode 15, the light shielding film 16 (or the counter electrode 21 in FIG. 8), the common potential line 17 and the like are formed. Forming with a metal film. Examples of the metal film include Cr, Al, Ta, Mo, and alloys using these metals.

Further, a protective insulating film 18 is formed. The protective insulating film 18 was formed by plasma CVD.
An iO ₂ film, a SiN film, or the like can be given. Then, after forming a contact hole 19 and the like on the protective insulating film 18, a common wiring 20 is formed using an oxide conductive film or the like. At this time, the common wiring 20 is formed so as to overlap the gate wiring 10 in the display portion. Note that a coating film for a terminal portion can be formed using the oxide conductive film or the like. As described above, the gate wiring 10 and the common wiring 20 are connected to the insulating layer 1.
1 and the like, the gate wiring 10 and the common wiring 20 are electrically insulated even when they are formed so as to overlap each other in the display portion.

That is, the feature of the active matrix substrate of the present invention resides in that a gate wiring and a common wiring are stacked via an insulating layer. In the conventional technology, these wirings are formed side by side on different planes on the substrate.
(Adjacent formation), these wiring regions could not be used as openings. On the other hand, in the active matrix substrate according to the present invention, compared with the prior art,
The opening of the display area can be enlarged by the amount of the common wiring. Specifically, the pixel size is 88 μm × 264
In the case of μm, an aperture ratio of about 10% can be improved. The use of the active matrix substrate according to the present invention provides a liquid crystal display device having a wide viewing angle and high luminance.

However, when the gate wiring and the common wiring are overlapped with each other while being electrically insulated, the luminance is improved, but the capacity between the gate wiring and the common wiring is increased and the load of gate driving is increased. It turned out that there was a point. As a result, the distortion of the gate voltage waveform becomes large, and in particular, the TFT of the pixel far from the gate terminal cannot be sufficiently turned on, and a predetermined potential may not be written to the pixel electrode. For this reason, it has been found that the switching circuit should be formed in the peripheral circuit region so that the potential of the common wiring becomes the gate potential only when the gate is ON and becomes the common potential when the gate is OFF. This makes it possible to reduce the distortion of the gate potential waveform when the gate is turned on. At the moment when the gate is turned off, the potential of both the gate wiring and the common wiring falls, so that distortion is reduced.

That is, another feature of the active matrix substrate of the present invention is that n-type and p-type field-effect transistors are provided in the peripheral circuit region and the gate is selected (gate ON).
Only when a common line is set to a gate potential (switching circuit). With this mechanism, the gate wiring and the common wiring have the same potential when the gate is selected, and the capacitance between the two wirings can be ignored. Therefore, it is possible to reduce the distortion of the gate waveform even in the superimposed configuration.

The switching circuit has the following configuration. N-type and p-type transistors are arranged, and a gate wiring is connected to a gate electrode of these transistors, and a common wiring is connected to a source electrode of these transistors. Further, a gate wiring is connected to the drain electrode of the n-type transistor, and a common potential line is connected to the drain electrode of the p-type transistor. When the gate is turned on, a positive potential is applied to the gate, the n-type transistor is turned on, and the p-type transistor is turned off.
It becomes F. Therefore, the potential of the common wiring becomes the gate potential.

On the other hand, when the gate is turned off, a negative potential is applied to the gate, so that the n-type field effect transistor is turned off and the p-type transistor is turned on. Therefore, the potential of the common wiring becomes the common potential. As described above, it is possible to operate so that the potential of the common wiring becomes the gate potential only when the gate is turned on, and becomes the common potential when the gate is turned off. Therefore, when the gate is ON, the gate wiring and the common wiring have the same potential, the influence of the capacitance between the two wirings can be ignored, and the gate driving load can be reduced even when the two wirings are stacked. .

As the n-type and p-type transistors, it is preferable to use a field-effect transistor using polycrystalline Si for a semiconductor layer. This is a method in which a polycrystalline Si thin film is formed on a transparent substrate such as glass or quartz using a thermal CVD method using silane or disilane as a source gas, or an amorphous Si thin film formed by low-pressure CVD or plasma CVD is laser-annealed. This is because it is possible to form the film. Also,
A gate insulating film such as SiO ₂ can be formed by a plasma CVD method, a thermal oxidation method, or the like. Further, n-type and p-type transistors can be manufactured by an ion doping method using phosphorus, boron, or the like, and a driving speed sufficient to control switching of potential can be obtained.

As described above, in the active matrix substrate according to the present invention, since the gate wiring and the common wiring are arranged so as to overlap with each other, it is possible to increase the aperture ratio of the pixel, and it is possible to connect the active matrix substrate to a bright liquid crystal display device. it can. Then, an alignment film is formed on the active matrix substrate, and the liquid crystal is sealed by bonding to an opposing substrate via a spacer, whereby a liquid crystal display device with high luminance can be manufactured. In other words, the power consumption of the backlight can be reduced when used at the same luminance as the conventional technology. Since the heat generated by the power consumption is reduced, the cooling mechanism of the display device such as a cooling fan can be simplified. As a result, the volume of the display device can be reduced, so that the display device can be applied to a display device such as a notebook-type portable computer.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. Embodiment 1 FIG. 1 is a plan view of a pixel portion and a peripheral circuit (part) of an active matrix substrate according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view (AA cross section) of a main portion of the pixel portion. . FIG. 3 is a sectional view (BB section) of a peripheral circuit (part). The first embodiment will be described with reference to these drawings.

Underlayer _{2 made} of SiO ₂ on transparent substrate 1
To form The SiO ₂ film was formed by a plasma CVD method using Si (C ₂ H ₅ O) ₄ and O ₂ as raw materials. An amorphous Si film was formed thereon to a thickness of 50 nm. The amorphous Si film was formed at a substrate temperature of 450 ° C. by low-pressure CVD using Si ₂ H ₆ as a raw material. This film was irradiated with an excimer laser to be crystallized to produce a polycrystalline Si film. This polycrystalline Si film was processed into an island shape by a photolithography process to form a semiconductor layer 3. On this, a gate insulating layer 4 made of a SiO ₂ film was formed in the same manner as the base film 2. Further, an amorphous Si film was formed by low-pressure CVD and irradiated with an excimer laser to form a polycrystalline Si film. The gate electrode 5 was processed by a photolithography process, and the gate insulating film was further processed.

Next, a photomask was formed, and the polycrystalline Si film was doped with phosphorus by ion doping to form an n region 6. After removing the photomask, a photomask is formed again, and the polycrystalline Si film is doped with boron by ion doping.
Region 7 was formed. Further, the dopant was activated by irradiation with an excimer laser. Then, as the insulating layer 8, Si
An O ₂ film was formed in the same manner as the base film. Further, the substrate was treated with plasma hydrogen. After the formation of the contact hole 9, an Al film was formed as the gate wiring 10 by sputtering, and was processed by a photolithography process. Further, a SiO ₂ film was formed as the insulating layer 11 by the same method as the base film, and the contact hole 12 was formed by a photolithography process.

On this, a Cr film was formed by a sputtering method, and a drain wiring 13, a drain electrode 14, a pixel electrode 15, a light shielding film 16, and a common potential line 17 were formed by a photolithography process. Further, a protective insulating film 1 is formed thereon.
8 and a contact hole 19 was formed by a photolithography process. Next, an ITO (Indium Tin Oxide) film was formed as a common wiring 20 and a counter electrode 21 by a sputtering method, and then processed by a photolithography process. At this time, via the insulating layer 11 and the like,
The common wiring 20 is arranged so as to overlap with the gate wiring 10 in a pixel portion as a display area.

FIG. 4 shows a circuit diagram of a part of the peripheral circuit of the obtained matrix substrate. FIG. 5 shows the potential of the gate wiring and the potential of the common wiring with respect to the driving waveform of this circuit. From this figure, it can be seen that the potential (Vg) of the gate wiring is gate ON
In the case of the potential (Vgon), the potential (Vc) of the common wiring is also
(Vgon), and the potential (Vg) of the gate wiring becomes O
In the case of the FF potential (Vgoff), the potential (V
It can be seen that c) becomes the common potential (Vcom). And it was confirmed that the distortion of the gate potential had no practical problem.

An alignment film was formed on the manufactured active matrix substrate, and was adhered to a counter substrate via a spacer, and liquid crystal was sealed. In the obtained liquid crystal display device, an improvement in luminance of 10% or more was observed as compared with the case of the conventional active matrix substrate shown in FIG. Also,
It has been found that when the luminance is set to be equal to that of the conventional structure, the power consumption of the backlight can be reduced and the backlight can be used without particularly providing a cooling mechanism such as a cooling fan.

[Embodiment 2] FIG. 7 is a plan view of a pixel portion and a peripheral circuit (part) of an active matrix substrate of another embodiment, and FIG. ). The second embodiment will be described with reference to these drawings.

In the same manner as in Example 1, a base film 2, a semiconductor layer 3, a gate insulating layer 4, a gate electrode 5,
n region 6, p region 7, insulating layer 8, contact hole 9,
Gate wiring 10, insulating layer 11, and contact hole 12 were formed. On this, a Cr film was formed by a sputtering method, and a drain wiring 13, a drain electrode 14, a pixel electrode 15, a common potential line 17, and a counter electrode 21 were formed by a photolithography process. Further, a protective insulating film 18 is formed thereon, and the contact hole 1 is formed by a photolithography process.
9 was formed. Next, an ITO film was formed as the common wiring 20 by a sputtering method and then processed in a photolithography process. At this time, the common wiring 20 is
(Display area) The gate wiring 10 and the insulating layer 11 were arranged so as to overlap with each other via the insulating layer 11 and the like. Further, it was electrically connected to the counter electrode 21 through the contact hole 19. Further, the peripheral circuit has the same configuration as that of the first embodiment (the same configuration as the BB section in FIG. 3).

An alignment film was formed on the manufactured active matrix substrate, and was adhered to a counter substrate via a spacer to encapsulate liquid crystal. In the obtained liquid crystal display device, an improvement in luminance of 10% or more was observed as compared with the case of the conventional active matrix substrate shown in FIG. Also,
It has been found that when the luminance is set to be equal to that of the conventional structure, the power consumption of the backlight can be reduced and the backlight can be used without particularly providing a cooling mechanism such as a cooling fan.

Embodiment 3 FIG. 9 is a plan view of a pixel portion and a peripheral circuit (part) of an active matrix substrate according to another embodiment. FIG. 10 is a cross-sectional view (A "-A" cross section) of a main portion of the pixel portion, and FIG. 11 is a cross-sectional view (B "-B" cross section) of a peripheral circuit (part). The third embodiment will be described with reference to these drawings.

A base film 2, a semiconductor layer 3, and a gate insulating layer 4 were formed on a transparent substrate 1 in the same manner as in Example 1. On this, Ta was formed by a sputtering method, and processed into a gate electrode 5 and a gate wiring 10 by a photolithography process. Next, a photomask was formed, and the polycrystalline Si film was doped with phosphorus by ion doping to form an n region 6. After removing the photomask, a photomask was formed again, and the polycrystalline Si film was doped with boron by ion doping to form a p region 7. Further, the dopant was activated by irradiation with an excimer laser. Further, the substrate was treated with plasma hydrogen. Next, a SiO ₂ film is used as the insulating layer 11 for the base film 2.
The contact hole 12 was formed by a photolithography process.

On this, a Cr film is formed by a sputtering method, and a drain wiring 13, a drain electrode 14, a pixel electrode 15, a common potential line 17, a counter electrode 21, and a drain-gate contact portion of a peripheral circuit are formed by a photolithography process. No. 22 was formed. Further, a protective insulating film 1 is formed thereon.
8 and a contact hole 19 was formed by a photolithography process. Then, as the common wiring 20, IT
After the O film was formed by a sputtering method, it was processed in a photolithography process. At this time, the common wiring 20 was arranged so as to overlap with the gate wiring 10 via the insulating layer 11 in the pixel portion (display area). Further, it was electrically connected to the counter electrode 21 through the contact hole 19.

An alignment film was formed on the manufactured active matrix substrate, and was adhered to a counter substrate via a spacer, and liquid crystal was sealed. In the obtained liquid crystal display device, an improvement in luminance of 10% or more was observed as compared with the case of the conventional active matrix substrate shown in FIG. Also,
It has been found that when the luminance is set to be equal to that of the conventional structure, the power consumption of the backlight can be reduced and the backlight can be used without particularly providing a cooling mechanism such as a cooling fan.

[0032]

According to the present invention, it is possible to increase the aperture ratio of a pixel, and it is possible to obtain a bright liquid crystal display device. This is particularly effective in a liquid crystal display device driven by a horizontal electric field method. In addition, when used at the same luminance as the related art, there is an effect that the power consumption of the backlight can be reduced.

[Brief description of the drawings]

FIG. 1 is a plan view showing an active matrix substrate according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a pixel unit of FIG.

FIG. 3 is a sectional view showing a peripheral circuit of FIG. 1;

FIG. 4 is a circuit diagram showing a peripheral circuit of FIG. 3;

FIG. 5 is a diagram showing driving waveforms of the peripheral circuit of FIG. 3;

FIG. 6 is a plan view illustrating a conventional active matrix substrate (pixel unit).

FIG. 7 is a plan view illustrating an active matrix substrate according to a second embodiment of the present invention.

FIG. 8 is a cross-sectional view illustrating the pixel unit of FIG. 7;

FIG. 9 is a plan view showing an active matrix substrate according to a third embodiment of the present invention.

FIG. 10 is a cross-sectional view illustrating the pixel unit of FIG. 9;

FIG. 11 is a sectional view showing the peripheral circuit of FIG. 9;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Transparent substrate, 2 ... Base film, 3 ... Semiconductor layer, 4 ... Gate insulating layer, 5 ... Gate electrode, 6 ... n region, 7 ... p region, 8
... insulating layer, 9 ... contact hole, 10 ... gate wiring,
11 ... insulating layer, 12 ... contact hole, 13 ... drain wiring, 14 ... drain electrode, 15 ... pixel electrode, 16 ...
Light shielding film, 17: common potential line, 18: protective insulating film, 1
9 contact hole, 20 common wiring, 21 counter electrode, 22 drain-gate contact part of peripheral circuit

Continued on the front page (72) Inventor Akio Mimura 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture Within Hitachi Research Laboratory, Hitachi, Ltd.

Claims (5)

[Claims] 1. An active matrix substrate having a display region formed on a transparent substrate and including a gate line and a common line, wherein the gate line and the common line are electrically insulated and overlapped in the display region. An active matrix substrate characterized by being combined. 2. An active matrix substrate including an active element, a gate line, and a common line on a transparent substrate and forming a display region and a peripheral circuit region. A switching circuit which has the same potential as the gate potential and maintains the common potential when the gate is turned off is provided in the peripheral circuit area, and the gate wiring and the common wiring are superposed and electrically insulated in the display area. An active matrix substrate, characterized in that: 3. The switching circuit according to claim 2, wherein
An n-type and p-type transistor formed on a transparent substrate, wherein a gate electrode of the n-type and p-type transistors is connected to the gate wiring, a source electrode is connected to the common wiring, and a drain electrode of the n-type transistor Wherein an active matrix substrate is connected to the gate wiring, and a drain electrode of the p-type transistor is connected to a common potential line. 4. The active matrix substrate according to claim 3, wherein said n-type and p-type transistors are field-effect transistors manufactured using polycrystalline Si. 5. A liquid crystal display device, wherein a liquid crystal is driven by applying a horizontal electric field to the liquid crystal using the active matrix substrate according to claim 1.