JPH1074084A - Electronic musical instrument - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the electronic musical instrument in which natural and pleasant musical sound changes are obtained in accordance with the operating strength of a keyboard. SOLUTION: A control means 5 controls the filter characteristics of a digital filter 92 included in a musical sound generating means 9 based on the operating strength which is detected by a detecting means 3 and generation instructed by a sound generation instructing means 2, the resonant frequency information and the information indicating the sharpness of the resonances selected from a first table means that stores plural resonant frequency information corresponding to the operating strength and a second table means that stores the information indicating the sharpness of the plural resonances corresponding to the operating strength.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic musical instrument such as an electronic piano, and more particularly to an electronic musical instrument for controlling the characteristics of musical tones generated in accordance with the strength of keys pressed on a keyboard.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 21, for example, as shown in FIG. 21, the cutoff frequency of a low-pass filter is changed and controlled based on so-called touch information, which is the strength at the time of depressing a key on a keyboard, and the characteristic of a tone generated An electronic musical instrument for controlling a musical instrument is known.

[0003]

However, in the above-described conventional electronic musical instrument, when the cutoff frequency of the low-pass filter is changed and controlled, as shown in FIG. 21, the key touches tc1 and tc2 are performed. , Tc3, ..., the roll-off or slope characteristics were constant,
Depending on the timbre, the degree of change in the tone characteristics may give a very unnatural impression.

SUMMARY OF THE INVENTION The present invention has been made in order to eliminate the above-mentioned drawbacks, and provides an electronic musical instrument capable of obtaining a natural and good tone change in accordance with the operation strength of a keyboard when a key is pressed. With the goal.

[0005]

An electronic musical instrument according to the present invention comprises: sounding instruction means for instructing the start and stop of sounding of musical sounds; and detecting means for detecting the operation intensity when sounding is instructed by the sounding instruction means. Control means for controlling generation of a musical tone based on a sounding instruction by the sounding instruction means and a detection result of the detecting means; and a musical sound generating means for generating a musical sound controlled by the control means. Includes a digital filter whose filter characteristics are controlled by the control means by a value indicating the resonance frequency and the sharpness of the resonance, and generates a musical tone with the filter characteristics controlled by the control means. First table means for storing a plurality of pieces of resonance frequency information correspondingly, and second table means for storing a plurality of pieces of information indicating values of the sharpness of the resonance corresponding to the operation intensity. And controlling the filter characteristic with resonance frequency information and information on a value indicating the sharpness of resonance selected from the first table and the second table based on the detection result of the detection means. And

Further, the digital filter is a low-pass filter, and the resonance frequency determines a cutoff frequency of the filter.

The control means for controlling the filter characteristics includes a storage means for storing a base value of resonance frequency information and a base value of resonance sharpness information for each of a plurality of timbres;
A first adder for adding the resonance frequency information from the first table means and the resonance frequency base value from the storage means; a resonance sharpness information from the second table means and a resonance from the storage means; And a second adder for adding a base value of the sharpness information.

[0008] The resonance sharpness information is stored as a logarithmic value.

The digital filter includes a filter coefficient generating circuit for generating at least four filter coefficients (A, a, b, f) based on the resonance frequency information and the resonance sharpness information; A, a, b,
and f) a multiplier for multiplying the tone signal by f).

The filter coefficient generator includes a cosine function generator for generating a filter coefficient A obtained by subtracting a cosine value of resonance frequency information from 1;
, A coefficient d multiplier for generating a filter coefficient a, a sine function generator for generating a sine value of the resonance frequency information, and a coefficient D multiplier for forming a filter coefficient b by multiplying the sine value by a coefficient D The coefficient D is 1/2 of the reciprocal of the resonance sharpness information Q, and the coefficient d is 1/2 of the reciprocal of the resonance sharpness information Q (when Q is 1 or more) or a constant value. (When Q is 1 or less).

The control means for controlling the filter characteristic includes the second table means storing the information on the sharpness of the resonance as a logarithmic value, and the filter coefficient generating circuit takes a complement of the logarithmic value. A complement circuit, a log-linear variable conversion circuit for converting the output of the complement circuit into a linear variable value, dividing means for dividing the output of the log-linear variable conversion circuit by 2 to obtain the coefficient value D, A comparator for comparing the coefficient value D with a constant value 1/2, and an output of the comparator
Selecting means for outputting the coefficient value D as a coefficient value d when ≤1 / 2, and outputting the constant value 1/2 as a coefficient value d when the output of the comparator indicates D> 1/2. It is characterized by including.

Further, the filter coefficient generation circuit includes a function generator that receives the filter coefficient b as input and outputs f (b) = b / (1 + b) as a filter coefficient f, and the function generator includes: f (b) = b (0 ≦ b <１ ／) f (b) = b / 2 + (2/16) (１ ／ ≦ b <１ ／) f (b) = b / 4 + (4 / 16) (1/2 ≦ b <3/2) f (b) = b / 8 + (7/16) (3/2 ≦ b <2) f (b) = b / 16 + (9/16) (2) ≦ b <4) in a polygonal line approximation circuit that is generated in each range of the filter coefficient b (0 ≦ b <4).

The polygonal line approximation circuit includes a range identification circuit for identifying each range of the filter coefficient b, an offset generation circuit for generating an offset constant value based on a range information output of the range identification circuit, 1/2, 1/4, 1/8, 1/16 with coefficient b as input
, For each range, and an adder for adding the offset generation circuit and each output of the divider.

The digital filter includes a coefficient a multiplier for multiplying the input tone signal by the filter coefficient a,
A coefficient b multiplier for multiplying the output signal of the digital filter by the filter coefficient b, a first adder for adding each output of the coefficient a multiplier and the coefficient b multiplier, and a first adder A first delay circuit that delays the output by one sample time, a first multiplier that multiplies the output of the coefficient a multiplier by 2, and a coefficient A multiplier that multiplies the output signal of the digital filter by the filter coefficient A A second multiplier for multiplying the output of the coefficient A multiplier by 2, a second adder for adding the outputs of the first multiplier and the second multiplier, and the second addition. A second delay circuit that delays the output of the delay unit by one sample time, a third adder that adds the outputs of the coefficient a multiplier and the second delay circuit, and an output of the third adder. Multiply the above filter coefficient f and output the digital filter Characterized in that it comprises a coefficient f multiplier that.

Further, the digital filter adds fourth and fifth and sixth additions of the input and output of each of the coefficient b multiplier, coefficient A multiplier and coefficient f multiplier to obtain a coefficient multiplied output. It further comprises a vessel.

An electronic musical instrument according to the present invention comprises a sounding instruction means for instructing start and stop of sounding of a musical tone, a detecting means for detecting an operation intensity when sounding is instructed by the sounding instruction means, and a sounding instruction means. Control means for controlling generation of a musical tone based on a sounding instruction and a detection result of the detection means; and musical tone generating means for generating a musical tone controlled by the control means, wherein the musical tone generating means has a resonance frequency and a resonance frequency. Including a digital filter whose filter characteristic is controlled by the control means by a value indicating the sharpness of the tone, generating a musical tone with the filter characteristic controlled by the control means,
The control means comprises: first table means for storing a plurality of pieces of resonance frequency information corresponding to the operation intensity; and a second table for storing a plurality of pieces of information indicating values of resonance sharpness corresponding to the resonance frequency information. Means for selecting resonance frequency information from the first table based on the detection result of the detection means, and selecting a value indicating the sharpness of resonance from the second table based on the selected resonance frequency information. It is characterized by doing.

Further, the digital filter is a low-pass filter, and the resonance frequency determines a cutoff frequency of the filter.

The control means for controlling the filter characteristics includes a storage means for storing a base value of resonance frequency information and a base value of resonance sharpness information for each of a plurality of timbres.
A first adder for adding the resonance frequency information from the first table means and the resonance frequency base value from the storage means; a resonance sharpness information from the second table means and a resonance from the storage means; And a second adder for adding a base value of the sharpness information.

Further, the resonance sharpness information is stored as a logarithmic value.

The digital filter includes a filter coefficient generating circuit for generating at least four filter coefficients (A, a, b, f) based on the resonance frequency information and the resonance sharpness information; A, a, b,
and f) a multiplier for multiplying the tone signal by f).

The filter coefficient generator includes a cosine function generator for generating a filter coefficient A obtained by subtracting a cosine value of resonance frequency information from 1;
, A coefficient d multiplier for generating a filter coefficient a, a sine function generator for generating a sine value of the resonance frequency information, and a coefficient D multiplier for forming a filter coefficient b by multiplying the sine value by a coefficient D The coefficient D is 1/2 of the reciprocal of the resonance sharpness information Q, and the coefficient d is 1/2 of the reciprocal of the resonance sharpness information Q (when Q is 1 or more) or a constant value. (When Q is 1 or less).

The control means for controlling the filter characteristics includes the second table means storing the information on the sharpness of the resonance as a logarithmic value, and the filter coefficient generating circuit takes the complement of the logarithmic value. A complement circuit, a log-linear variable conversion circuit for converting the output of the complement circuit into a linear variable value, dividing means for dividing the output of the log-linear variable conversion circuit by 2 to obtain the coefficient value D, A comparator for comparing the coefficient value D with a constant value 1/2, and an output of the comparator
Selecting means for outputting the coefficient value D as a coefficient value d when ≤1 / 2, and outputting the constant value 1/2 as a coefficient value d when the output of the comparator indicates D> 1/2. It is characterized by including.

The filter coefficient generating circuit includes a function generator that receives the filter coefficient b as input and outputs f (b) = b / (1 + b) as a filter coefficient f, and the function generator includes: f (b) = b (0 ≦ b <１ ／) f (b) = b / 2 + (2/16) (１ ／ ≦ b <１ ／) f (b) = b / 4 + (4 / 16) (1/2 ≦ b <3/2) f (b) = b / 8 + (7/16) (3/2 ≦ b <2) f (b) = b / 16 + (9/16) (2) ≦ b <4) in a polygonal line approximation circuit that is generated in each range of the filter coefficient b (0 ≦ b <4).

The broken line approximation circuit includes a range identification circuit for identifying each range of the filter coefficient b, an offset generation circuit for generating an offset constant value based on a range information output of the range identification circuit, 1/2, 1/4, 1/8, 1/16 with coefficient b as input
, For each range, and an adder for adding the offset generation circuit and each output of the divider.

The digital filter includes a coefficient a multiplier for multiplying the input tone signal by the filter coefficient a,
A coefficient b multiplier for multiplying the output signal of the digital filter by the filter coefficient b, a first adder for adding each output of the coefficient a multiplier and the coefficient b multiplier, and a first adder A first delay circuit that delays the output by one sample time, a first multiplier that multiplies the output of the coefficient a multiplier by 2, and a coefficient A multiplier that multiplies the output signal of the digital filter by the filter coefficient A A second multiplier for multiplying the output of the coefficient A multiplier by 2, a second adder for adding the outputs of the first multiplier and the second multiplier, and the second addition. A second delay circuit that delays the output of the delay unit by one sample time, a third adder that adds the outputs of the coefficient a multiplier and the second delay circuit, and an output of the third adder. Multiply the above filter coefficient f and output the digital filter Characterized in that it comprises a coefficient f multiplier that.

Further, the digital filter adds fourth and fifth and sixth additions of the inputs and outputs of the coefficient b multiplier, the coefficient A multiplier and the coefficient f multiplier to obtain a coefficient multiplication output. It further comprises a vessel.

[0027]

According to the present invention, the value indicating the resonance frequency and the sharpness of the resonance for controlling the filter characteristics of the musical sound generating means are arbitrarily changed according to the operation intensity at the time of sounding instruction by the sounding instruction means. You. According to the present invention, the resonance frequency for controlling the filter characteristic of the musical sound generating means is arbitrarily changed according to the operation intensity at the time of sounding instruction by the sounding instruction means, and according to the changed resonance frequency. The value indicating the sharpness of the resonance for controlling the filter characteristic of the musical tone generating means is arbitrarily changed.

[0028]

Embodiments of the present invention will be described below with reference to the drawings.

The electronic musical instrument according to the present invention is applied to, for example, an electronic musical instrument 100 as shown in FIG.

As shown in FIG. 1, the electronic musical instrument 100 includes a damper pedal 1, a keyboard circuit 2, a key scanning / touch detection circuit 3 connected to the keyboard circuit 2, and a panel circuit 4.
, CPU 5, and ROM (read only mem)
ory) 6 and RAM (random accesss)
memory 7, an interface circuit 8, and a tone generation circuit 9 connected to the interface circuit 8. Then, a damper pedal 1, a key scanning / touch detection circuit 3, a panel circuit 4, a CPU 5, a ROM 6, a RAM
7 and the interface circuit 8
And are configured to communicate with each other.

The tone generating circuit 9 includes a waveform generating circuit 91, a digital filter circuit 92, an amplitude envelope generating circuit 94, and a digital filter circuit 9 connected to the interface circuit 8 and the data bus CID, respectively.
A multiplier 93 to which each output of the 2 and amplitude envelope generation circuit 94 is supplied, an accumulation circuit 95 to which the output of the multiplier 93 is supplied, and a digital / analog (D / A / D) to which the output of the accumulation circuit 95 is supplied. A) Converter 96 and D / A converter 9
And a sound system 97 to which the output of the waveform generating circuit 6 is supplied. The output of the waveform generating circuit 91 is supplied to the digital filter circuit 92.

First, a series of operations of the entire electronic musical instrument 100 will be described.

The CPU 5 is composed of a microprocessor and controls various operations of the entire apparatus according to a program stored in the ROM 6 in advance.

The ROM 6 is a memory for a program of the CPU 5, and a program for determining the operation of the CPU 5 is stored in advance. In addition to the program, the ROM 6 stores a tone color parameter, a tone color control table by touching a key, and the like. Here, the tone color parameter indicates a parameter indicating an output waveform of the waveform generation circuit 91, a resonance frequency described later of the digital filter circuit 92, a roll-off or slope characteristic of the filter, that is, a sharpness of a peak and a trough of a frequency characteristic curve. Parameter for specifying value Q, amplitude envelope generation circuit 9
4 controls the envelope signal output.

The RAM 7 is a working memory for the CPU 5, and is used to temporarily store processing contents when the CPU 5 performs various processing. The RAM 7 also stores information on the current state of the panel circuit 4 and the like.

Although not shown, the keyboard circuit 2 is provided with two switches for each key.
It has a configuration of a matrix circuit via a diode.

The key scanning / touch detection circuit 3 includes the keyboard circuit 2
The state of each switch is scanned to detect key press and key release events and to detect the key press strength (touch) according to the change in the switch state. Then, the key scanning / touch detection circuit 3 performs a key press (key ON) and a key release (key OF).
The detection result of the event F) is supplied to the CPU 5 as key information, and the detection result of the touch at the time of key depression is supplied to the CPU 5 as touch data.

The panel circuit 4 is provided with a tone color selection switch, an effect selection switch, a volume setting switch, and the like (not shown).
Read by U5.

When the damper pedal 1 is operated, the switch is turned on.
It is read by the CPU 5 as / OFF information.

Accordingly, the CPU 5 determines the key information and touch data of the keyboard circuit 2 detected by the key scanning / touch detection circuit 3, the state of each switch of the panel circuit 4, the ON / OFF state of the damper pedal 1, and the like. In addition to controlling the operation of the entire apparatus, it supplies each piece of information stored in the ROM 6 to the musical tone generation circuit 9 via the interface circuit 8.

The interface circuit 8 comprises a synchronizing circuit and the like, and synchronizes the data transfer from the CPU 5 to the tone generating circuit 9 with the operation timing of the tone generating circuit 9. That is, the interface circuit 8
When data is transferred from the CPU 5 to the tone generating circuit 9, the data output from the CPU 5 onto the bus line 10 is synchronized with the operation timing of the tone generating circuit 9 by the data bus C.
It is supplied to the tone generation circuit 9 via the ID. Further, according to the instruction of the CPU 5, the interface circuit 8 transmits a forced transition signal Wf for requesting a forced phase transition described later.
And a request signal RQ from the amplitude envelope generation circuit 94.
A clear signal Clf for clearing f is supplied to the amplitude envelope generating circuit 94.

Although not shown, the waveform generating circuit 91
It is composed of a phase accumulator, a waveform memory, a sample interpolation circuit and the like, and generates a tone signal GWD for a plurality of channels in a time-division manner in accordance with an instruction from the CPU 5.

The digital filter circuit 92 includes a CPU 5
A digital tone signal FWD generated by performing a digital filter operation on the tone signal GWD from the waveform generating circuit 91 is generated in a time-division manner with the filter characteristics designated by the following.

The amplitude envelope generating circuit 94 includes a CPU
5, an amplitude envelope signal Ec for a plurality of channels is generated in a time-division manner.

The multiplier 93 is a digital filter circuit 9
2 is multiplied by the amplitude envelope signal Ec from the amplitude envelope generation circuit 94, and the result of the multiplication is supplied to the accumulation circuit 95 in a time division manner.

The accumulation circuit 95 accumulates the multiplication results for a plurality of channels supplied from the multiplier 93 in a time-division manner, synthesizes the multiplication results for all the channels, and generates a digital tone signal.

The D / A converter 96 converts the digital tone signal obtained by the accumulation circuit 95 into an analog signal and supplies the analog signal to the sound system 97.

The sound system 97 includes an amplifier and a speaker (not shown), and outputs a tone signal from the D / A converter 96 as sound.

The above is a series of operations of the electronic musical instrument 100 as a whole.

Next, the CPU 5 will be specifically described.

As described above, the CPU 5 supplies each piece of information stored in the ROM 6 to the musical sound generation circuit 9 through the interface circuit 8.
The information stored in the OM 6 is, for example, a pointer table Ta, a waveform address table Tb, a parameter table Tc, and the like.

The pointer table Ta is a table stored as a part of the tone color parameter. As shown in FIG. 2, the number Wn of the waveform to be used and the parameter W to be used corresponding to the N key numbers Kn And the number Pn. This pointer table Ta is referred to in the sound generation start processing of the CPU 5.

The waveform address table Tb is a table stored as timbre parameters and, as shown in FIG. 3, is composed of addresses Wa corresponding to M waveform numbers Wn. The address Wa includes a start address ST, a loop top address LT, and a loop end address LE, and indicates an address of a waveform memory of the waveform generation circuit 91. This waveform address table Tb is represented by C
It is referred to in the sound generation start processing of PU5. As a result, the information of the waveform address corresponding to the depressed key is supplied to the waveform generation circuit 91, and the waveform of the tone signal GWD output from the waveform generation circuit 91 is controlled.

The parameter table Tc is a table stored as timbre parameters and, as shown in FIG. 4, comprises parameters Pv corresponding to L parameter numbers Pn. The parameter Pv includes an attack speed AS, an attack level AL, a decay 1 speed D1S, a decay 1 end value D1E, a decay 2 speed D2S, and a release speed RS.

Here, for example, it is assumed that the digital filter circuit 92 has the characteristics of a low-pass filter, and that the resonance frequency substantially corresponds to the cutoff frequency. Therefore, in the electronic musical instrument 100, the digital filter circuit 9 is controlled by changing and controlling the resonance frequency and the value of Q.
The second filter characteristic is controlled. Therefore, the parameter Pv is the resonance frequency bias ωoB
And Q bias QB.

As described above, the parameter Pv indicates a parameter for specifying the resonance frequency and Q of the digital filter circuit 92, a parameter for controlling the envelope signal output from the amplitude envelope generation circuit 94, and the like. Such a parameter table Tc is referred to in the sound generation start processing of the CPU 5. Among the parameters referred to at this time, that is, among the parameters corresponding to the depressed key, the amplitude envelope generation circuit 94
Are temporarily stored in the RAM 7. The remaining parameters are supplied to a digital filter circuit 92 and an amplitude envelope generation circuit 94, and the filter characteristics of the digital filter circuit 92 and the envelope signal output from the amplitude envelope generation circuit 94 are controlled.

The ROM 6 stores the pointer table Ta, the waveform address table Tb, and the parameter table Tc as described above, as well as the TD-ωo table Td and the TD-Q table Td shown in FIG.
e is also stored. The CPU 5 uses the TD-ωo table Td and the TD-Q table Te stored in the ROM 6 to arbitrarily change and control the filter characteristics of the digital filter circuit 92 according to the touch of a key.

That is, the CPU 5 first uses the key information from the key scanning / touch detection circuit 3 to set the resonance frequency bias value (or base value) ωoB corresponding to the pressed key.
And the Q bias value (or base value) QB from the parameter table Tc. Next, the CPU 5 executes the processing shown in FIG.
As shown in the table, the touch data TD from the key scanning / touch detection circuit 3 is converted using the TD-ωo table Td, and the converted data and the resonance frequency bias ωoB read from the parameter table Tc are added by the adder 181. I do. Then, the CPU 5 determines the addition output of the adder 181 as the resonance frequency ωo. Further, the CPU 5
Using the DQ table Te, the touch data TD from the key scanning / touch detection circuit 3 is converted, and the converted data and the Q bias QB read from the parameter table Tc are converted.
Are added by the adder 182. Then, the CPU 5
The addition output of the adder 182 is determined as the value of Q. And
The CPU 5 applies the determined resonance frequencies ωo and Q to the digital filter circuit 92 via the interface circuit 8.
To supply.

Therefore, the digital filter circuit 92
Are controlled to, for example, amplitude-frequency characteristics as shown in FIG.

FIG. 6 shows the amplitude-frequency characteristics when the value of Q is smaller than "1" in a linear expression. A detailed description of the control process of the amplitude envelope signal in the CPU 5 will be described later.

Next, the digital filter circuit 92 will be specifically described.

As shown in FIG. 7, the digital filter circuit 92 includes a memory 921 for the resonance frequency ωo to which the resonance frequency ωo is supplied from the CPU 5, and a Q
Memory 922 to which the value of
And a filter coefficient generating circuit 923 to which each output of the memory 922 is supplied, and an output of the filter coefficient generating circuit 923 to be supplied and a tone signal GW from the waveform generating circuit 91.
And a filter operation circuit 924 to which D is supplied. The output of the filter operation circuit 924 is supplied to the multiplier 93.

The memory 921 for the resonance frequency ωo (hereinafter referred to as ωo memory) 921 is, for example, a RAM having the same number of words as the number of sounding channels, and stores the resonance frequency ωo from the CPU 5 for each channel. And ωo memory 9
21 supplies the stored resonance frequency ωo to the filter coefficient generation circuit 923 in a time-division manner.

Memory for Q (hereinafter referred to as Q memory) 9
22 is, for example, RA of the same number of words as the number of sounding channels.
M, and stores Q from the CPU 5 for each channel. Then, the Q memory 922 supplies the stored Q to the filter coefficient generation circuit 923 in a time-division manner.

The filter coefficient generation circuit 923 generates filter coefficients A, a, b, and f based on the resonance frequency ωo from the ωo memory 921 and Q from the Q memory 922, and supplies the filter coefficients to the filter operation circuit 924. I do.

Here, the transfer function of the digital filter according to the present embodiment obtained by bilinearly converting the transfer function of the analog secondary low-pass filter is as follows:

[0067]

(Equation 1)

Equation 1 is obtained. However, the filter amplitude −
The coefficient a is determined so that the maximum value of the frequency characteristic becomes approximately 1. ωo is a resonance frequency expressed by normalizing the sampling frequency, and 0 <ωo <π. Q is a quality factor determined by the filter design.

Then, in the above equation 1, if f = b / (1 + b),

[0070]

(Equation 2)

Equation 2 is obtained. In the calculation of f = b / (1 + b), an approximate calculation is performed.

That is, the filter coefficient generating circuit 923
Includes, for example, three circuits of a first circuit 923a, a second circuit 923b, and a third circuit 923c.

As shown in FIG. 8, the first circuit 923a
Complement circuit 101 to which Q from Q memory 922 is supplied
And a logarithmic / linear conversion circuit 102 to which the output of the complement circuit 101 is supplied; a 1-bit right shift circuit 103 to which the output of the logarithmic / linear conversion circuit 102 is supplied; Value (= "1/2")
Are supplied to the selector 104, and the output of the comparator 105 is supplied to the selector 104. The output D of the 1-bit right shift circuit 103 and the output d of the selector 104
Are supplied to the second circuit 923b.

The comparator 105 compares the output D of the 1-bit right shift circuit 103 with a predetermined value (= “１ ／”), and supplies the comparison result to the selector 104. The selector 104, based on the comparison result of the comparator 105,
The output D of the 1-bit right shift circuit 103 and a predetermined value (=
"1/2") is selected and output. Therefore, the output D (=) of the 1-bit right shift circuit 103 (1/2 divider) is supplied from the first circuit 923a to the second circuit 923b.
1 / (2Q)), and when Q is equal to or greater than “1” (Q ≧ 1 or D ≦ 1/2), the value of the output d of the selector 104 becomes “d = 1 / (2Q) , And when Q is smaller than “1” (Q <1 or D> １ ／),
The value of the output d of the selector 104 is supplied at “d = １ ／”.

As shown in FIG. 9, the second circuit 923b
The Cosine generator 106 and the Sine generator 107 to which the resonance frequency ωo from the ωo memory 921 is respectively supplied.
And a multiplier 108 to which the output of the Cosine generator 106 is supplied, and a multiplier 109 to which the output of the Sine generator 107 is supplied.
The output of the multiplier 6, the output of the multiplier 108, and the output of the multiplier 109 are supplied to the filter operation circuit 924 in FIG. 7 as the filter coefficients A, a, and b, and the output of the multiplier 109 (= filter coefficient b). Is also supplied to the third circuit 923c.

Although not shown, the Cosine generator 106 comprises a ROM table and its interpolation circuit.
“1−” obtained from the resonance frequency ωo from the memory 921
The value of “cosωo” is supplied to the filter operation circuit 924 as the filter coefficient A, and the filter coefficient A is supplied to the multiplier 108. The multiplier 108 is a Cosine
The first coefficient 923 is added to the filter coefficient A from the generator 106.
The output d is multiplied by the output d, and the multiplication result is supplied to the filter operation circuit 924 as a filter coefficient a. Although not shown, the Sine generator 107 includes a ROM table and its interpolation circuit, and supplies the value of “sinωo” obtained from the resonance frequency ωo from the ωo memory 921 to the multiplier 109. The multiplier 109 multiplies the output (= sinωo) of the sine generator 107 by the output D of the first circuit 923a, and supplies the multiplication result as a filter coefficient b to the filter operation circuit 924 and the third circuit 923c.

The third circuit 923c is composed of a polygonal line approximation circuit. As shown in FIG. 10, the section identification circuit 110 and the barrel shifter 111 to which the filter coefficient b from the second circuit 923b is supplied, respectively, The offset generation circuit 112 to which the output is supplied, and the barrel shifter 1
11 and an adder 113 to which the outputs of the offset generation circuit 112 are supplied. The output of the section identification circuit 110 is also supplied to the barrel shifter 111. The output of the adder 113 is the filter coefficient f
Is supplied to the filter operation circuit 924 in FIG.

The section discriminating circuit 110 includes a second circuit 923b
Is a kind of encoder that generates 3-bit section information by the upper 4 bits of the filter coefficient b from the filter coefficient b, and supplies the 3-bit section information corresponding to the filter coefficient b to the offset generation circuit 112 and the barrel shifter 111 according to Table 1. .

[0079]

[Table 1]

The barrel shifter 111 includes the section identification circuit 11
In accordance with Table 2, the filter coefficient b from the second circuit 923b is right-shifted (divided by a power of 2) and supplied to the adder 113 according to the 3-bit section information from 0.

[0081]

[Table 2]

The offset generation circuit 112 generates a 4-bit offset value according to Table 3 based on the 3-bit section information from the section identification circuit 110, and supplies the offset value to the adder 113.

[0083]

[Table 3]

The adder 113 is provided with the barrel shifter 1
11 and the output of the offset generation circuit 112, and the result of addition is supplied to the filter operation circuit 924 as a filter coefficient f.

Therefore, the filter operation circuit 924 is supplied with a filter coefficient f obtained by approximating a broken line. That is, when f (b) = b / (1 + b) is within the range of “0 ≦ b <4”, f (b) ≒ b (0 ≦ b <１ ／) f (b) ≒ (b / 2) + (2/16) (１ ／ ≦ b <１ ／) f (b) ≒ (b / 4) + (4/16) (１ ／ ≦ b <3/2) f (b) ≒ ( b / 8) + (7/16) (3/2 ≦ b <2) f (b) ≒ (b / 16) + (9/16) (2 ≦ b <4) It is supplied to the filter operation circuit 924 as f.

As shown in FIG. 11, the filter operation circuit 924 generates the tone signal G from the waveform generation circuit 91 shown in FIG.
A multiplier 121 to which WD is supplied, an adder 122 to which an output of the multiplier 121 is supplied, a 1-bit left shift circuit 12
3 and an adder 124, a multiplier 128 supplied with the output of the adder 122, and an adder 129 supplied with the output of the multiplier 128. The output of the adder 122 is also supplied to the adder 129. The output of the adder 129 is supplied to the multiplier 93 of FIG. 1 as a musical tone waveform FWD. Further, the filter operation circuit 924 includes a one-sample delay memory 12 to which the output of the adder 124 is supplied.
5, an adder 126 to which the outputs of the one-bit left shift circuit 123 and the one-sample delay memory 125 are supplied, and a one-sample delay memory 1 to which the output of the adder 126 is supplied
27, and the one-sample delay memory 127 is supplied to the adder 122. further,
The filter operation circuit 924 includes multipliers 131 and 133 to which outputs of the adder 129 are respectively supplied, an adder 130 to which respective outputs of the adders 129 and 131 are supplied,
A 1-bit left shift circuit 132 to which the output of the adder 130 is supplied, and an adder 134 to which each output of the adder 129 and the multiplier 133 are supplied. The output of the 1-bit left shift circuit 132 is added. The output of the adder 134 is supplied to the adder 124, and the output of the adder 134 is supplied to the adder 124.

The multiplier 121 is connected to the waveform generator 9
1 to the tone signal GWD from
3 is multiplied by the filter coefficient a obtained in
Is added to the output of the adder 122 by the filter coefficient generation circuit 923.
Is multiplied by the filter coefficient f obtained in step (1). The multiplier 131 multiplies the tone waveform FWD output from the adder 129 by the filter coefficient A obtained by the filter coefficient generation circuit 923, and the multiplier 133 outputs the tone waveform FWD output from the adder 129. Is multiplied by the filter coefficient b obtained by the filter coefficient generation circuit 923.

The one-sample delay memories 125 and 1
27 is, for example, RA of the same number of words as the number of sounding channels.
M, which gives a delay amount of one sample for the digital filter operation to the input signal.

With the above configuration, the filter operation circuit 924 generates the tone signal GW from the waveform generation circuit 91.
D is subjected to a filter operation.

As described above, the digital filter circuit 9
Reference numeral 2 denotes a filter characteristic which is arbitrarily changed and controlled by the CPU 5 in accordance with a touch of a key. Is supplied to the multiplier 93. The output of the amplitude envelope generating circuit 94 is also supplied to the multiplier 93.

Next, the amplitude envelope generating circuit 94 will be specifically described.

The amplitude envelope generating circuit 94 has a structure shown in FIG.
As shown in the figure, the time variable signal generation circuit 941 and the amplitude level reproduction circuit 9 supplied with the respective parameters from the CPU 5
42, and a phase transition control circuit 943 connected to the amplitude level reproduction circuit 942. The outputs of the time variable signal generation circuit 941 and the phase transition control circuit 943 are supplied to the amplitude level reproduction circuit 942, The output of the reproduction circuit 942 is supplied to the phase transition control circuit 943. Further, the phase transition control circuit 943 includes a forced transition signal Wf and a clear signal C
If is supplied. Further, the parameter request signal RQf from the phase transition control circuit 943
Is supplied to the interface circuit 8, and the output of the amplitude level reproduction circuit 942 is supplied to the multiplier 93.

The time variable signal generation circuit 941 generates a time variable signal α normalized by the speed parameter τ from the CPU 5 to generate a phase transition control circuit 943.
And an amplitude level reproduction circuit 942. This parameter τ is involved in determining the phase time of the amplitude envelope, and includes the attack speed AS, the decay 1 speed D1S or the decay 2 speed D2S in the parameter table Tc shown in FIG.
Corresponds to Release Speed RS.

That is, the time variable signal generation circuit 941
As shown in FIG. 13, a memory 141 for the parameter τ from the CPU 5, a selector 142 to which the output of the memory 141 and the phase transition signal trn from the phase transition control circuit 943 are supplied, and an output of the selector 142 are supplied. A memory 143 for the parameter τ and a multiplier 144 to which the output of the memory 143 is supplied are provided. The output of the memory 143 is also supplied to the selector 142. Further, the time variable signal generation circuit 941 receives the phase transition signal trn from the phase transition control circuit 943.
A selector 145 to which the output of the selector 145 is supplied, a memory 146 for the time variable signal α to which the output of the selector 145 is supplied, and a subtractor 14 to which the output of the memory 146 is supplied.
7 and the output of the memory 146 is a multiplier 144
The output of the subtracter 147 is supplied to the selector 145, the phase transition control circuit 943, and the amplitude level reproduction circuit 942, respectively.

A memory 141 for parameter τ (hereinafter referred to as τB memory) 141 is composed of, for example, a RAM having the same number of words as the number of sounding channels. I do.

The memory for parameter τ (hereinafter referred to as τW memory) 143 is composed of, for example, a RAM having the same number of words as the number of sounding channels, and stores a parameter output from the selector 142 as a parameter τW for each channel.

Here, the selector 142 stores the parameter τB stored in the τB memory 141 and the τW memory 14
3 is supplied to the selector 142. When the phase transition signal trn from the phase transition control circuit 943 becomes “true” (= “1”), the selector 142
The parameter τB stored in the τB memory 141 is supplied to the τW memory 143. Therefore, the τW memory 143
, The parameter τB is stored as the parameter τW used in the current phase.

The phase transition signal trn output from the phase transition control circuit 943 is set to “true” in response to a forced transition signal Wf requesting a forced phase transition according to an instruction from the CPU 5. This will be described later in detail.

On the other hand, a memory for the time variable signal α (hereinafter, α
The memory 146 includes, for example, a RAM having the same number of words as the number of sounding channels, and stores the time variable signal α from the selector 145 for each channel.

The multiplier 144 multiplies the time variable signal α stored in the α memory 146 by the parameter τW used in the current phase stored in the τW memory 143, and supplies the result of the multiplication to the subtractor 147. .

The subtractor 147 subtracts the multiplication result of the multiplier 144 from the time variable signal α stored in the α memory 146, and outputs the subtraction result as the time variable signal α.

The predetermined value “1” and the time variable signal α output from the subtractor 147 are supplied to the selector 145.
3 is "false" (= "0")
When the time variable signal α from the subtractor 147 becomes α
The predetermined value “1” is supplied to the α memory 146 when the phase transition signal trn from the phase transition control circuit 943 becomes “true” (= “1”). Therefore, the current value of the normalized time variable signal α is stored in the α memory 146.
For example, α (n) = α (n−1) −α (n−1) * τW, and the phase transition signal trn is “true”.
(= “1”), it is initialized to “1”.

As described above, the time variable signal generating circuit 94
The time variable signal α obtained in step 1 is
2 and the phase transition control circuit 943.

The amplitude level reproducing circuit 942 reproduces the amplitude level of the amplitude envelope from the parameter L from the CPU 5 and the time variable signal α from the time variable signal generating circuit 941, and converts the current value of the amplitude envelope into the amplitude envelope signal. It is supplied to the multiplier 93 as Ec. Parameter L
Is a value obtained by changing the attack level AL in the parameter table Tc of FIG. 4 according to the key touch data in the attack phase, and is the decay 1 end value D1E itself in the parameter table Tc in the decay phase.

At this time, the CPU 5
Is selected from the parameter L and “0” in accordance with the parameter z. The parameter z specifies the meaning of the parameter L, and the parameter z is “0 (false)”.
, The parameter L is treated as the target value of the amplitude envelope control, and when the parameter z is “1 (true)”, the parameter L is treated as the end value of the time variable signal, and 0 (zero) is designated as the target value. It is considered to have been done.

Further, the amplitude level reproduction circuit 942 outputs the CP
The parameter LW and the parameter zW used in the current phase from U5 are supplied to the phase transition control circuit 943.

That is, the amplitude level reproduction circuit 942 is
As shown in FIG. 14, a memory 151 for a parameter L and a memory 152 for a parameter z, each of which is supplied with a parameter from the CPU 5, an output of the memory 152, and a phase transition signal trn from a phase transition control circuit 943 are supplied. A selector 155 and a memory 158 for a parameter z to which the output of the selector 155 is supplied are provided. The output of the memory 158 is output as a parameter zW, and the selector 155 and a selector 1 to be described later.
59 as well. The amplitude level reproduction circuit 942 includes a selector 154 to which the output of the memory 151 and the phase transition signal trn from the phase transition control circuit 943 are supplied, a memory 157 for a parameter L to which the output of the selector 154 is supplied, 1
57, an output of the memory 158, and a selector 159 to which a predetermined value “0” is supplied.
The output of 57 is output as the parameter LW and also supplied to the selector 154. Further, the amplitude level reproduction circuit 942 includes a selector 153 to which the phase transition signal trn from the phase transition control circuit 943 is supplied, a memory 156 for an amplitude envelope initial value Ei to which the output of the selector 153 is supplied, a memory 156, A subtractor 160 to which each output of the selector 159 is supplied, and a multiplier 161 to which the output of the subtractor 160 and the time variable signal α from the time variable signal generation circuit 941 are supplied
And an adder 162 to which the outputs of the multiplier 161 and the selector 159 are supplied. The output of the adder 162 is output as the amplitude envelope signal Ec and also supplied to the selector 153. ing. The output of the memory 156 is also supplied to the selector 153.

The memory for parameter z (hereinafter referred to as zB memory) 152 is, for example, a RAM having the same number of words as the number of sounding channels.
Is stored for each channel as a parameter zB used in the next phase.

The memory 158 for the parameter z (hereinafter referred to as zW memory) is composed of, for example, a RAM having the same number of words as the number of sound channels, and stores the parameter output from the selector 155 as the parameter zW for each channel.

Here, the selector 155 stores the parameter zB stored in the zB memory 152 and the zW memory 15.
8 is supplied to the selector 155. When the phase transition signal trn from the phase transition control circuit 943 becomes “true” (= “1”),
The parameter zB stored in the zB memory 152 is supplied to the zW memory 158. Therefore, the zW memory 158
, The parameter zB from the selector 155 is stored as the parameter zW used in the current phase.

On the other hand, a memory for parameter L (hereinafter, L
The B memory 151 includes, for example, a RAM having the same number of words as the number of sounding channels, and stores a parameter L from the CPU 5 as a parameter LB used in the next phase for each channel.

The memory for parameter L (hereinafter referred to as LW memory) 157 is composed of, for example, a RAM having the same number of words as the number of sounding channels, and stores the parameters output from the selector 154 as the parameter LW for each channel.

Here, the selector 154 stores the parameter LB stored in the LB memory 151 and the LW memory 15
7 is supplied to the selector 154. When the phase transition signal trn from the phase transition control circuit 943 becomes “true” (= “1”),
The parameter LB stored in the LB memory 151 is supplied to the LW memory 157. Therefore, the LW memory 157
, The parameter LB from the selector 154 is stored as the parameter LW used in the current phase.

The memory (hereinafter referred to as Ei memory) 156 for the amplitude envelope initial value Ei is composed of, for example, a RAM having the same number of words as the number of sounding channels.
The output from 53 is stored as an initial value Ei for each channel.

Here, the selector 159 is supplied with the parameter LW used in the current phase stored in the LW memory 157 and a predetermined value “0”.
Selects one of the parameter LW and a predetermined value “0” based on the parameter zW used in the current phase stored in the zW memory 158, and selects the subtractor 160 and the adder 1
62.

The subtractor 160 subtracts the output value of the selector 159 from the initial value Ei stored in the Ei memory 156, and supplies the result of the subtraction to the multiplier 161.

The multiplier 161 multiplies the subtraction result of the subtractor 160 by the time variable signal α from the time variable signal generation circuit 941 and supplies the multiplication result to the adder 162.

The adder 162 adds the multiplication result of the multiplier 161 and the output value of the selector 159, outputs the addition result as an amplitude envelope signal Ec, and supplies the amplitude envelope signal Ec to the selector 153.

The selector 153 is supplied with the amplitude envelope signal Ec from the adder 162 and the initial value Ei stored in the Ei memory 156 as described above. When the transition signal trn becomes “true” (= “1”), the amplitude envelope signal Ec from the adder
The data is supplied to the i-memory 156. That is, when the phase transition signal trn becomes “true” (= “1”), the amplitude envelope signal Ec of the current phase is set to the new initial value Ei.
Is stored in the Ei memory 156. The amplitude envelope signal Ec of the current phase is obtained by an arithmetic expression of Ec = (Ei−LW) * α + LW, and “(Ei−LW)” is a gain for the time variable signal α.

As described above, the amplitude level reproducing circuit 94
2, the amplitude envelope signal Ec is supplied to the multiplier 93 shown in FIG. 1, and the parameter LW and the parameter zW are supplied to the phase transition control circuit 943.

The phase transition control circuit 943 detects whether the time variable signal α from the time variable signal generation circuit 941 has reached the phase end value, and detects that the time variable signal α has reached the phase end value. The phase transition signal t
rn is supplied to the time variable signal generating circuit 941 and the amplitude level reproducing circuit 942, and the parameter request signal RQf of the next phase is output to the C through the interface circuit 8.
Supply to PU5. At this time, the parameter LW can also be used as the phase end value based on the parameter zW from the amplitude level reproduction circuit 942. The phase transition signal trn output from the phase transition control circuit 943 is a forced transition signal Wf from the interface circuit 8, that is, the CPU 5
In response to a signal requesting a compulsory phase transition in accordance with the instruction of (1). The parameter request signal RQf output from the phase transition control circuit 943 is cleared by a clear signal Clf from the interface circuit 8, that is, a signal instructed by the CPU 5.

That is, the phase transition control circuit 943
As shown in FIG. 15, a selector 171 to which the parameters LW and zW and a phase end value (fixed value) of the time variable signal α from the amplitude level reproducing circuit 942 are supplied, an output of the selector 171 and a time variable signal generation A comparator 172 to which the time variable signal α from the circuit 941 is supplied;
2 and an OR gate 173 to which the forced transition signal Wf from the interface circuit 8 is supplied, and a NOT to which the forced transition signal Wf from the interface circuit 8 is supplied
A gate 175, a NOT gate 176 to which a clear signal Clf from the interface circuit 8 is supplied, an OR gate 174 to which an output of the comparator 172 is supplied,
AND gate 177 to which respective outputs of gates 175 and 176 and OR gate 174 are supplied, and AND gate 177
And a memory 178 to which the output of
The output of the memory 178 is also supplied to the gate 174. Then, the output of the OR gate 173 is output as the phase transition signal trn,
Is output as a parameter request signal RQf.

The selector 171 is connected to the amplitude level reproducing circuit 9.
42, the parameter LW from the amplitude level reproduction circuit 942 is supplied to the comparator 172 as the phase end value, and the parameter zW from the amplitude level reproduction circuit 942 is “true” (= “1”). "False" (=
At the time of “0”), the phase end value (fixed value) is supplied to the comparator 172.

The comparator 172 detects the end value of the current phase by comparing the phase end value from the selector 171 with the time variable signal α from the time variable signal generation circuit 941. Then, the comparator 172 supplies the detection signal to the OR gates 173 and 174.

Therefore, the OR gate 173 includes a forced transition signal Wf from the interface circuit 8, that is, a signal for requesting a forced phase transition according to an instruction from the CPU 5, and a detection signal for detecting the end value of the current phase from the comparator 172. The output of the OR gate 173 is supplied to the time variable signal generation circuit 941 and the amplitude level reproduction circuit 942 of FIG. 12 as the phase transition signal trn.

On the other hand, the AND gate 177 receives the forced transition signal Wf from the interface circuit 8 via the NOT gate 175, the clear signal Clf from the interface circuit 8 via the NOT gate 176, and the output of the OR gate 174. And the output of the AND gate 177 is supplied to the memory 178.

The memory 178 comprises, for example, a RAM having the same number of words as the number of sound channels, and an AND gate 177.
Is stored as a parameter request signal RQf for each channel.

Here, the OR gate 174 has the memory 1
The parameter request signal RQf stored in 78 and the detection signal of the end value of the current phase from the comparator 172 are supplied, and the output of the OR gate 174 is supplied to the AND gate 177 as described above.

Therefore, the memory 178 stores the parameter request signal RQf of the next phase, and this parameter request signal RQf is supplied to the CPU 5 through the interface circuit 8 shown in FIG.

As described above, the amplitude envelope signal Ec obtained by the amplitude envelope generating circuit 94 is supplied to the multiplier 93, and the multiplier 93 multiplies the tone signal FWD obtained by the digital filter circuit 92 by the multiplier 93. The Rukoto. The amplitude envelope signal Ec output from the amplitude envelope generation circuit 94 is controlled by the CPU 5, whereby the electronic musical instrument 100 operates in response to the operation of the damper pedal 1.

Next, the control processing of the amplitude envelope generating circuit 94 in the CPU 5 will be specifically described.

First, in the electronic musical instrument 100, the shape of the amplitude envelope is as shown in FIG.
That is, the key ON phase is composed of an attack phase AP and decay phases DP1 and DP2, and the key OFF phase is a release phase RP
It consists of. Here, ON / OFF of the damper pedal 1
The key-off phase is composed of a plurality of phases to be described later. The parameters for controlling the amplitude envelope include an attack phase AP, decay phases DP1 and DP2, and a release phase RP. Only the parameters corresponding to the four phases are used.

In order to control the amplitude envelope as described above, the CPU 5 first supplies the parameter τ, the parameter L and the parameter z of the attack phase AP to the amplitude envelope generating circuit 94 at the start of sound generation.
The forced transition signal Wf of the interface circuit 8 is set to “true”. At this time, the parameter z of the attack phase AP
Is set to “false”, and the parameter L is set to the target level, that is, the attack level.

Next, the CPU 5 executes the decay phase DP
The parameter τ, parameter L, and parameter z of 1 are supplied to the amplitude envelope generation circuit 94. At this time, the parameter z of the decay phase DP1 is set to “true”, and the parameter L is set to the phase end value of the decay phase DP1. Further, the forced transition signal Wf is set to “false”.

Next, the CPU 5 outputs the parameter request signal RQf of the next phase from the amplitude envelope generating circuit 94.
Is recognized as "true", the clear signal Clf
Is set to “true”, the parameter request signal R
While clearing Qf, the parameter τ, parameter L and parameter z of the decay phase DP2 are supplied to the amplitude envelope generation circuit 94. At this time, the forced transition signal Wf is set to “false”, and the parameter L of the decay phase DP2 is set to “0”. The decay phase DP2
Since the parameter L of the decay phase DP2 is set to “0”, any of “true” and “false” may be used.

Then, when the sound generation stop is instructed by releasing the key, the CPU 5 supplies the parameter τ, the parameter L and the parameter z of the release phase RP to the amplitude envelope generating circuit 94 and outputs the forced transition signal Wf of the interface circuit 8. "True". At this time, the parameter L of the release phase RP is set to “0”. In addition, regarding the parameter z of the release phase RP, since the parameter L of the release phase RP is set to “0”,
It may be either “true” or “false”.

When the damper pedal 1 is turned on when the phase is in the release phase RP, that is, when the prohibition of sound generation stop is instructed, the CPU 5 sets the parameters τ, L and z of the decay phase DP2 to the amplitude envelope. It is supplied to the generation circuit 94. At this time, the forced transition signal Wf is set to “true”.

Here, FIG. 16 shows the CPU 5 as described above.
It is a figure which shows the phase transition by the process of FIG.

The attack phase ap shown in FIG.
(N), the attack phase ap (F) corresponds to the first N state and the first F state, respectively, and the decay phase dp1
(N), the decay phase dp1 (F) corresponds to the second N state and the second F state, respectively, and the decay phase dp2
(N), the decay phase dp2 (F) corresponds to the third N state and the third F state, respectively, and the release phase rp corresponds to the fourth phase.
Corresponds to the state.

As shown in FIG. 16, the electronic musical instrument 1
At 00, ON (N) / OFF (F) of the damper pedal 1
19, the attack phase ap (N), the attack phase ap (F), and the decay phase dp1 for the four phases of the attack phase AP, the decay phases DP1 and DP2, and the release phase RP shown in FIG. (N), decay phase dp1
(F), decay phase dp2 (N), decay phase dp2 (F), and release phase rp are defined. And attack phase ap
(F), three phases of decay phase dp1 (F) and decay phase dp2 (F) are phases corresponding to the state of key OFF and damper pedal 1ON. However, as described above, the attack phase ap
(N) and attack phase ap (F), decay phase dp1 (N) and decay phase dp1 (F), and decay phase dp2 (N) and decay phase dp
2 (F) have the same parameters.

Then, as the phase at the time of key ON,
Attack phase ap (N), decay phase dp1
(N) and three phases of decay phase dp2 (N) are used, and the phases at the time of key OFF are release phase rp, attack phase ap (F), decay phase dp1 (F) and decay phase dp2.
(F) is used.

In FIG. 16, "KN" is key ON, "KF" is key OFF, "PN" is damper pedal ON, "PF" is damper pedal OFF, "trn" is a phase transition signal, and "&" It represents the logical product.

First, as in the conventional example (FIG. 20), when an arbitrary key is newly turned on to give an instruction to start sound generation, the CPU sets a key-off phase (release phase) of a plurality of sound channels. rp), the key is assigned to any of the channels, and sound generation start processing is performed. Accordingly, the phase proceeds from “release phase rp → attack phase ap (N)”. Then, if the key is in the ON state as it is, the “attack phase ap
→ Decay phase dp1 (N) → Decay phase d
p2 (N) ”and the decay phase d
p2 (N) stays and the decay phase dp
Mute at 2 decay rate.

Next, when an instruction to stop sounding is given by turning off the key, the phase shifts from “decay phase dp2 (N) → decay phase dp2 (F)” according to the control parameter output by the CPU. . At this time, if the damper pedal is ON, that is, if the sound generation stop is prohibited, the decay phase dp2
(F). However, decay phase d
Since the control parameters corresponding to p2 (N) and the decay phase dp2 (F) are the same, there is no change in the musical tone being sounded.

On the other hand, if the damper pedal is off, that is, if the stop of sound generation is permitted, the control parameter output by the CPU causes the control unit to output the "decay phase dp2
(F) → release phase rp ”. At this time, when the damper pedal is turned on again, the phase is shifted from “release phase rp → decay phase dp2 (F)” (redamper).

If the key is turned off when the key is turned on and the phase is in the attack phase ap (N), the following is obtained: “attack phase ap (N) → attack phase ap”
(F) "and the phase is shifted. At this time, since the parameters of the attack phase ap (N) and the attack phase ap (F) are the same, the musical tone being generated does not change.

Then, at this time, the damper pedal 1 is turned on.
In this case, the phase remains in the attack phase ap (F) until the phase transition signal trn is present. Then, in accordance with the phase transition signal trn generated each time the time variable signal α reaches the end value, the phase progresses from “attack phase ap (F) → decay phase dp1 (F) → decay phase dp2 (F)” to decay phase dp2. The sound is muted at the attenuation rate of.

On the other hand, when the damper pedal 1 is OFF, the phase is shifted from “attack phase ap (F) → release phase rp”.

The phase is the decay phase dp1.
If the key is turned off when the state is at (N), the decay phase dp1 (N) → decay phase dp1
(F) "and the phase is shifted. At this time, the decay phase dp1 (N) and the decay phase dp1 (F)
Since the parameters have the same parameters, the musical tone being generated does not change.

At this time, the damper pedal 1 is turned on.
In this case, the phase remains in the decay phase dp1 (F) until the next phase transition signal trn is generated in the amplitude envelope generation circuit 94. And
According to the phase transition signal trn generated each time the time variable signal α reaches the end value, the “decay phase dp1
(F) → decay phase dp2 (F) ”.

On the other hand, when the damper pedal 1 is OFF, the phase is shifted from “decay phase dp1 (F) → release phase rp”.

As described above, in the electronic musical instrument 100, the attack phase AP is defined as two attack phases ap (N) and apache phase ap (F) corresponding to ON / OFF of the damper pedal 1, and the decay phase DP1
Is defined as two decay phases dp1 (N) and decay phase dp1 (F), the decay phase DP2 is defined as two decay phases dp2 (N) and decay phase dp2 (F), and the attack phase ap is defined.
(F), the decay phase dp1 (F) and the decay phase dp2 (F) are defined as phases corresponding to the state of the key OFF and the state of the damper pedal 1 ON to control the amplitude envelope. When key 1 is ON, key ON
Even if it is turned off immediately afterwards, it is possible to prevent the attack from rising halfway,
The amplitude envelope can always be controlled with a two-stage decay configuration. Further, the amplitude envelope generating circuit 94
Can hold each parameter of two phases, the CPU 5 outputs the parameter request signal RQf from the amplitude envelope generation circuit 94.
As a result, as shown in FIG.
(N) and decay phase dp2 (N), and decay phase dp1 (F) and decay phase dp2 (F)
, The phase progress can be easily managed.

Also, in the electronic musical instrument 100, by providing two TD-ωo tables Td and TD-Q table Te as shown in FIG. 5, the resonance frequency ωo for specifying the filter characteristics of the digital filter circuit 92 is determined. Since the value of Q is arbitrarily changed and controlled according to the touch of the key, it is possible to make the tone characteristic change by the touch of the key natural.

In the above-described electronic musical instrument 100, the control for changing the filter characteristics as shown in FIG. 6 is performed. However, as shown in FIG. May be controlled.

[0155] Further, each memory composed of RAMs of the same number of words as the number of sound channels used in the electronic musical instrument 100 may be memories composed of shift registers of the same number of stages.

Also, the CPU 5 arbitrarily changes and controls the filter characteristics of the digital filter circuit 92 in accordance with the touch of the key according to the flow graph as shown in FIG. The change control may be performed by a flow graph. That is, in this case, the touch data TD from the key scanning / touch detection circuit 3 is converted by using the TD-ωo table Td, and the converted data is supplied to the adder 181.
Ωo-Q provided in place of the TD-Q table Te
Further conversion is performed using the table Te ′, and the converted data is supplied to the adder 182. Also, ωo-Q
The table Te 'is assumed to be stored in the ROM 6.

[0157]

As described above, according to the present invention, the resonance frequency and the sharpness of the resonance for controlling the filter characteristics of the musical sound generating means are controlled in accordance with the operation intensity at the time of sounding instruction by the sounding instruction means. By arbitrarily changing the indicated value, even if the generated musical tone has any timbre, the characteristic change of the musical tone can be made natural. Therefore, the change of the musical tone according to the operation intensity can always be made natural and favorable.

According to the present invention, the resonance frequency for controlling the filter characteristics of the musical sound generating means is arbitrarily changed in accordance with the operation intensity at the time of sounding instruction by the sounding instruction means,
By changing the value indicating the sharpness of the resonance for controlling the filter characteristic of the tone generating means arbitrarily according to the changed resonance frequency, the tone generated has any tone. However, it is possible to make the tone characteristic change natural. Therefore, the change of the musical tone according to the operation intensity can always be made natural and favorable.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an electronic musical instrument to which an electronic musical instrument according to the present invention is applied.

FIG. 2 is a diagram for explaining a pointer table stored in a ROM.

FIG. 3 is a diagram for explaining a waveform address table stored in a ROM.

FIG. 4 is a diagram for explaining a parameter table stored in a ROM.

FIG. 5 is a flowchart illustrating a filter characteristic control process of a CPU.

FIG. 6 is a diagram for explaining filter characteristics of a digital filter circuit.

FIG. 7 is a block diagram showing a configuration of the digital filter circuit.

FIG. 8 is a block diagram showing a configuration of a first circuit of a filter coefficient generation circuit of the digital filter circuit.

FIG. 9 is a block diagram showing a configuration of a second circuit of the filter coefficient generation circuit of the digital filter circuit.

FIG. 10 is a block diagram showing a configuration of a third circuit of the filter coefficient generation circuit of the digital filter circuit.

FIG. 11 is a block diagram showing a configuration of a filter operation circuit of the digital filter circuit.

FIG. 12 is a block diagram illustrating a configuration of an amplitude envelope generation circuit.

FIG. 13 is a block diagram showing a configuration of a time variable signal generation circuit of the amplitude envelope generation circuit.

FIG. 14 is a block diagram showing a configuration of an amplitude level reproducing circuit of the amplitude envelope generating circuit.

FIG. 15 is a block diagram showing a configuration of a phase transition control circuit of the amplitude envelope generation circuit.

FIG. 16 is a diagram for explaining a phase transition of an amplitude envelope in the electronic musical instrument.

FIG. 17 is a diagram for describing management of the phase progress of the CPU.

FIG. 18 is a flowchart illustrating a filter characteristic control process of the CPU.

FIG. 19 is a diagram for explaining the shape of an amplitude envelope.

FIG. 20 is a diagram for explaining phase transition of a conventional amplitude envelope.

FIG. 21 is a diagram for explaining conventional filter characteristics.

[Explanation of symbols]

 Reference Signs List 1 damper pedal 2 keyboard circuit 3 key operation / touch detection circuit 4 panel circuit 5 CPU 6 ROM 7 RAM 8 interface circuit 9 musical sound generation circuit 91 waveform generation circuit 92 digital filter circuit 93 multiplier 94 amplitude envelope generation circuit 95 accumulation circuit 96 D / A converter 97 Sound system 100 Electronic musical instrument

Claims (22)

[Claims] 1. A sounding instruction means for instructing start and stop of sounding of a musical tone, a detecting means for detecting an operation intensity when sounding is instructed by the sounding instruction means, a sounding instruction by the sounding instruction means and the detecting means Control means for controlling the generation of a musical tone based on the detection result, and musical tone generating means for generating a musical tone controlled by the control means, wherein the musical tone generating means comprises a resonance frequency and a value indicating the sharpness of resonance. The digital filter has a filter characteristic controlled by the control means, generates a musical tone with the filter characteristic controlled by the control means, and the control means stores a plurality of pieces of resonance frequency information corresponding to the operation intensity. And a second table storing information of a plurality of values indicating the sharpness of the resonance corresponding to the operation intensity. Based on the results electronic musical instrument and controlling the filter characteristic by the information value indicating the sharpness of elected the resonance frequency information and resonance from said first and second tables. 2. The electronic musical instrument according to claim 1, wherein the digital filter is a low-pass filter, and the resonance frequency determines a cutoff frequency of the filter. 3. The control means for controlling the filter characteristic includes: a storage means for storing a base value of resonance frequency information and a base value of resonance sharpness information for each of a plurality of timbres; A first adder for adding the resonance frequency information and the resonance frequency base value from the storage means, and adding the resonance sharpness information from the second table means and the base value of the resonance sharpness information from the storage means; The electronic musical instrument according to claim 1, further comprising a second adder that performs the operation. 4. The electronic musical instrument according to claim 1, wherein said resonance sharpness information is stored as a logarithmic value. 5. The digital filter, comprising: a filter coefficient generating circuit for generating at least four filter coefficients (A, a, b, f) based on the resonance frequency information and resonance sharpness information; A, a, b, f)
2. An electronic musical instrument according to claim 1, further comprising: a multiplier for multiplying the tone signal by the multiplier. 6. A cosine function generator for generating a filter coefficient A obtained by subtracting a cosine value of resonance frequency information from 1 and a filter coefficient a by multiplying the filter coefficient A by a coefficient d. A coefficient d multiplier, a sine function generator that generates a sine value of the resonance frequency information, and a coefficient D multiplier that multiplies the sine value by a coefficient D to form a filter coefficient b. The coefficient d is １ ／ of the reciprocal of the resonance sharpness information Q (when Q is 1 or more) or a constant value (when Q is 1 or less) The electronic musical instrument according to claim 5, wherein 7. A control means for controlling the filter characteristic, wherein the information on the sharpness of the resonance is stored as a logarithmic value.
Wherein the filter coefficient generation circuit comprises a complement circuit for taking the complement of the logarithmic value, a log-linear variable conversion circuit for converting the output of the complement circuit to a linear variable value, and a log-linear variable conversion Division means for dividing the output of the circuit by 2 to obtain the coefficient value D, a comparator for comparing the coefficient value D with a constant value 1/2, and when the output of the comparator indicates D≤1 / 2 The coefficient value D is output as a coefficient value d, and the output of the comparator is D>
7. The electronic musical instrument according to claim 6, further comprising: selecting means for outputting said constant value 1/2 as a coefficient value d when indicating 1/2. 8. The filter coefficient generation circuit includes a function generator that receives the filter coefficient b as an input and outputs f (b) = b / (1 + b) as a filter coefficient f, wherein the function generator includes: f (b) = b (0 ≦ b <１ ／) f (b) = b / 2 + (2/16) (１ ／ ≦ b <１ ／) f (b) = b / 4 + (4 / 16) (1/2 ≦ b <3/2) f (b) = b / 8 + (7/16) (3/2 ≦ b <2) f (b) = b / 16 + (9/16) (2) 8. The electronic musical instrument according to claim 7, wherein the electronic musical instrument is a broken-line approximation circuit that generates ≦ b <4) in each range of the filter coefficient b (0 ≦ b <4). 9. The line approximation circuit includes: a range identification circuit for identifying each range of the filter coefficient b; an offset generation circuit for generating an offset constant value based on a range information output of the range identification circuit; A divider that performs a division of 1/2, 1/4, 1/8, 1/16 for each range with the coefficient b as an input, and an adder that adds each output of the offset generation circuit and the divider. The electronic musical instrument according to claim 8, comprising: 10. The digital filter comprises: a coefficient a multiplier for multiplying an input tone signal by the filter coefficient a; and a filter coefficient b for an output signal of the digital filter.
, A first adder that adds the outputs of the coefficient a multiplier and the coefficient b multiplier, and a first adder that adds the outputs of the coefficient a multiplier and the coefficient b multiplier.
A delay circuit that delays the output of the adder by one sample time, a first multiplier that multiplies the output of the coefficient a multiplier by 2, and a coefficient that multiplies the output signal of the digital filter by the filter coefficient A An A multiplier, a second multiplier that multiplies the output of the coefficient A multiplier by 2, a second adder that adds each output of the first multiplier and the output of the second multiplier,
A second delaying the output of the second adder by one sample time.
, A third adder for adding the outputs of the coefficient a multiplier and the second delay circuit, and a digital filter for multiplying the output of the third adder by the filter coefficient f. 9. The electronic musical instrument according to claim 8, further comprising a coefficient f multiplier for obtaining an output. 11. The digital filter according to claim 4, wherein said input and output of each of said coefficient b multiplier, coefficient A multiplier and coefficient f multiplier are added to obtain a coefficient multiplied output. The electronic musical instrument according to claim 10, further comprising an instrument. 12. A sounding instruction means for instructing start and stop of sounding of a musical tone, a detecting means for detecting an operation intensity when sounding is instructed by the sounding instruction means, a sounding instruction by the sounding instruction means and the detecting means Control means for controlling the generation of a musical tone based on the detection result, and musical tone generating means for generating a musical tone controlled by the control means, wherein the musical tone generating means comprises a resonance frequency and a value indicating the sharpness of resonance. The digital filter has a filter characteristic controlled by the control means, generates a musical tone with the filter characteristic controlled by the control means, and the control means stores a plurality of pieces of resonance frequency information corresponding to the operation intensity. And a second table storing information of a plurality of values indicating the sharpness of the resonance corresponding to the resonance frequency information. An electronic device comprising: selecting resonance frequency information from the first table based on a detection result of a stage; and selecting a value indicating a sharpness of resonance from the second table based on the selected resonance frequency information. Musical instruments. 13. The electronic musical instrument according to claim 12, wherein the digital filter is a low-pass filter, and the resonance frequency determines a cutoff frequency of the filter. 14. The control means for controlling the filter characteristic includes: storage means for storing a base value of resonance frequency information and a base value of resonance sharpness information for each of a plurality of timbres; A first adder for adding the resonance frequency information and the resonance frequency base value from the storage means, and adding the resonance sharpness information from the second table means and the base value of the resonance sharpness information from the storage means; 13. The electronic musical instrument according to claim 12, further comprising a second adder that performs the operation. 15. The electronic musical instrument according to claim 12, wherein said resonance sharpness information is stored as a logarithmic value. 16. The digital filter according to claim 1, wherein at least four digital filters are provided based on the resonance frequency information and the resonance sharpness information.
A filter coefficient generating circuit for generating two filter coefficients (A, a, b, f);
13. The electronic musical instrument according to claim 12, further comprising: a multiplier for multiplying the tone signal by f). 17. The filter coefficient generation circuit generates a cosine function generator that generates a filter coefficient A obtained by subtracting a cosine value of resonance frequency information from 1, and forms a filter coefficient a by multiplying the filter coefficient A by a coefficient d. A coefficient d multiplier, a sine function generator that generates a sine value of the resonance frequency information,
A coefficient D multiplier for multiplying the sine value by a coefficient D to form a filter coefficient b, wherein the coefficient D is の of the reciprocal of resonance sharpness information Q, and the coefficient d is a resonance sharpness 17. The electronic musical instrument according to claim 16, wherein the reciprocal of the information Q is 1/2 (when Q is 1 or more) or a constant value (when Q is 1 or less). 18. A control means for controlling the filter characteristic, wherein the information on the sharpness of the resonance is stored as a logarithmic value.
Wherein the filter coefficient generation circuit comprises a complement circuit for taking the complement of the logarithmic value, a log-linear variable conversion circuit for converting the output of the complement circuit to a linear variable value, and a log-linear variable conversion Division means for dividing the output of the circuit by 2 to obtain the coefficient value D, a comparator for comparing the coefficient value D with a constant value 1/2, and when the output of the comparator indicates D≤1 / 2 The coefficient value D is output as a coefficient value d, and the output of the comparator is D>
18. The electronic musical instrument according to claim 17, further comprising: selecting means for outputting said constant value 1/2 as a coefficient value d when indicating 1/2. 19. The filter coefficient generation circuit includes a function generator that receives the filter coefficient b as input and outputs f (b) = b / (1 + b) as a filter coefficient f, wherein the function generator includes: f (b) = b (0 ≦ b <１ ／) f (b) = b / 2 + (2/16) (１ ／ ≦ b <１ ／) f (b) = b / 4 + (4 / 16) (1/2 ≦ b <3/2) f (b) = b / 8 + (7/16) (3/2 ≦ b <2) f (b) = b / 16 + (9/16) (2) 19. The electronic musical instrument according to claim 18, wherein the electronic musical instrument is a broken line approximation circuit that generates ≤b <4) in each range of the filter coefficient b (0≤b <4). 20. The polygonal line approximation circuit, a range identification circuit for identifying each range of the filter coefficient b, an offset generation circuit for generating an offset constant value based on a range information output of the range identification circuit, and the filter A divider that performs a division of 1/2, 1/4, 1/8, 1/16 for each range with the coefficient b as an input, and an adder that adds each output of the offset generation circuit and the divider. 20. The electronic musical instrument according to claim 19, comprising: 21. The digital filter, comprising: a coefficient a multiplier for multiplying an input tone signal by the filter coefficient a; and a filter coefficient b for an output signal of the digital filter.
, A first adder that adds the outputs of the coefficient a multiplier and the coefficient b multiplier, and a first adder that adds the outputs of the coefficient a multiplier and the coefficient b multiplier.
A first delay circuit for delaying the output of the adder by one sample time, a first multiplier for multiplying the output of the coefficient a multiplier by 2, and a coefficient for multiplying the output signal of the digital filter by the filter coefficient A An A multiplier, a second multiplier that multiplies the output of the coefficient A multiplier by 2, a second adder that adds the respective outputs of the first multiplier and the second multiplier,
A second delaying the output of the second adder by one sample time.
, A third adder for adding the respective outputs of the coefficient a multiplier and the second delay circuit, and a digital filter for multiplying the output of the third adder by the filter coefficient f. 20. The electronic musical instrument according to claim 19, further comprising a coefficient f multiplier for obtaining an output. 22. A fourth, fifth, and sixth adder for adding the input and output of each of the coefficient b multiplier, coefficient A multiplier, and coefficient f multiplier to obtain a coefficient multiplied output. The electronic musical instrument according to claim 21, further comprising an instrument.