JPH10326884A - Semiconductor substrate, its manufacture and its composite member - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture an SOI substrate which is stable, uniform, and free of defects at low cost without causing no destruction of a porous layer before a stuck base body is separated, and securely and easily separation the base body after its sticking. SOLUTION: On a 1st base body 10 which has porous layers 11 and 12 formed on its surface a nonporous semiconductor layer 13 is formed, on its surface a 2nd base body 14 is stuck, and the porous layers 11 and 12 are separated to transfer a porous semiconductor layer 13 on the surface of the 2nd base body 14, thus manufacturing a semiconductor substrate. In this case, the porous area includes the 1st porous layer 11 which is adjacent to the nonporous semiconductor layer 13 and the 2nd porous layer 12 which has porosity larger and smaller thickness than those of the 1st porous layer 11, the porous region is formed such that the thickness of the 2nd porous layer 12 is <=80% of that of the 1st porous layer 11, and the porosity of the 2nd porous layer 12 is 30 to 60% of that of the 1st porous layer 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor substrate, a method of manufacturing the same, and a composite member thereof, and more particularly, to a semiconductor substrate having a plurality of porous layers, a method of manufacturing the same, and a composite member thereof.

[0002]

2. Description of the Related Art The formation of a single-crystal Si semiconductor layer on an insulator is performed by using a semiconductor-on-insulator (SO
I) A number of advantages that are widely known as technology and cannot be reached with a bulk Si substrate for fabricating a normal Si integrated circuit,
Much research has been done on the use of devices utilizing SOI technology. That is, by using the SOI technology, (1) dielectric separation is easy and high integration is possible, (2) the radiation resistance is excellent, and (3) the floating capacitance is higher than the bulk Si substrate. Reduced, faster possible,
(4) A well process can be omitted; (5) Latch-up can be prevented; (6) A fully depleted field-effect transistor can be formed by thinning; Advantages such as tenderness, etc. are obtained.

[0003] In order to realize many of the above advantages in device characteristics, researches have been made on a method of forming an SOI structure for several decades. The contents are summarized in, for example, the following documents. Special Issue: “Si
ngle-crystal silicon on non-single-crystal insulat
ors "; edited by GWCullen, Journal of Crystal Growt
h, volume63, no3, pp429-590 (1983).

Also, SOS (silicon-on-sapphire), which is formed by heteroepitaxy of Si on a single-crystal sapphire substrate by CVD (chemical vapor deposition), has been known for a long time. Although the technology achieved some success, a large amount of crystal defects due to the lattice mismatch between the Si layer and the underlying sapphire substrate, the incorporation of aluminum from the sapphire substrate into the Si layer, and above all the high cost of the substrate The delay in increasing the area has hindered the spread of its applications.

[0005] In recent years, attempts have been made to realize an SOI structure without using a sapphire substrate. This attempt is roughly divided into the following two.

(1) After the surface of the Si single crystal substrate is oxidized, a window is opened to partially expose the Si substrate, and the portion is used as a seed to epitaxially grow in the lateral direction to form SiO _2.
An Si single crystal layer is formed thereon (in this case, SiO ₂
On top, with the deposition of a Si layer. ).

(2) Using an Si single crystal substrate itself as an active layer, and forming SiO ₂ thereunder (this method does not involve the deposition of a Si layer).

Further, the device on the compound semiconductor is Si
High performance that cannot be obtained with, for example, high speed, light emission, etc.
have. Currently, these devices are mostly G
It is formed by epitaxial growth on a compound semiconductor substrate such as aAs.

However, compound semiconductor substrates have problems such as being expensive, having low mechanical strength, and making it difficult to form large-area wafers.

For these reasons, attempts have been made to heteroepitaxially grow compound semiconductors on Si wafers which are inexpensive, have high mechanical strength, and can be used to produce large-area wafers.

As means for achieving the above (1), CVD is used.
A method of directly growing a single crystal layer Si in a lateral direction by a method, a method of depositing an amorphous Si and a solid-phase lateral epitaxial growth by a heat treatment, and a method of applying an electron beam or a laser beam to an amorphous or polycrystalline Si layer. A method in which a single crystal layer is grown on SiO ₂ by converging and irradiating an energy beam such as a laser beam, and a method in which a molten region is scanned in a band shape by a rod-shaped heater (Zone Melting R)
ecrystallization) is known.

Each of these methods has its advantages and disadvantages, but it has great problems in controllability, productivity, uniformity, and quality, and there is no industrially practical method yet. For example, the CVD method requires sacrificial oxidation to make a thin film flat, and the solid phase growth method has poor crystallinity. Further, the beam annealing method has a problem in controllability such as processing time by convergent beam scanning, beam overlap, focus adjustment, and the like. Among them, Zone Melting Recrystallizati
Although the on method is the most mature and relatively large-scale integrated circuits have been prototyped, a large number of crystal defects such as sub-grain boundaries still remain. Absent.

In the above method (2) in which the Si substrate is not used as a seed for epitaxial growth, the following four types of methods can be mentioned.

(A) An oxide film is formed on a Si single crystal substrate having a V-shaped groove anisotropically etched on its surface, and a polycrystalline Si layer is deposited on the oxide film as thick as the Si substrate. Si
Polishing from the back side of the substrate, V
A dielectrically separated Si single crystal region surrounded by the groove is formed. In this method, the crystallinity is good, but the step of depositing polycrystalline Si several hundred microns thick,
There is a problem from the viewpoint of controllability and productivity in the process of polishing the i-substrate from the back surface to leave only the separated Si active layer.

(B) Simox (SIMOX: Separa)
This is a method of forming an SiO ₂ layer by ion implantation of oxygen into a Si single crystal substrate called “tion by ion implanted oxygen”, which is the most mature method at present because it has good compatibility with the Si process. However, SiO ₂
In order to form a layer, oxygen ions are formed at 10 ¹⁸ ions /
It is necessary to implant more than ² cm ² , but the implantation time is long, the productivity is not high, and the wafer cost is high. Furthermore, many crystal defects remain, and from an industrial point of view, the quality has not reached a level sufficient to produce a minority carrier device.

(C) This is a method of forming an SOI structure by dielectric isolation by oxidation of porous Si. This method
Proton ion implantation of an N-type Si layer on the surface of a P-type Si single crystal substrate (Imai et al., J. Crystal Growth, vol. 63, 547 (198
3)) Alternatively, an island is formed by epitaxial growth and patterning, and HF is
This is a method in which only the P-type Si substrate is made porous by anodization in a solution, and then N-type Si islands are dielectrically separated by accelerated oxidation. In this method, the separated Si region is determined before the device process, and there is a problem that the degree of freedom in device design may be limited.

(D) In addition to the above-described conventional SOI forming method, in recent years, a Si single crystal substrate has been bonded to another thermally oxidized Si single crystal substrate using heat treatment or an adhesive. Attention has been focused on a method of forming an SOI structure. This method requires that the active layer for the device be uniformly thinned. That is, it is necessary to reduce the thickness of a Si single crystal substrate having a thickness of several hundred microns to the order of microns or less. There are two types of thinning as described below.

(A) Thinning by polishing (b) Thinning by selective etching However, it is difficult to make a uniform thinning by the polishing of (a). In particular, when the thickness is reduced to a submicron, the variation becomes tens of percent, and the uniformity is a serious problem. If the diameter of the wafer is further increased, the difficulty will only increase.

Although the etching of (b) is effective for uniform thinning, (i) the selectivity is not sufficient at most to 10 ² , (ii) the surface properties after etching are poor,
(Iii) Since ion implantation or epitaxial growth or heteroepitaxial growth on a high concentration B-doped Si layer is used, there are problems such as poor crystallinity of a semiconductor layer (SOI layer) on an insulating film (C. Harendt) , et.al., J.Elec
t.Mater.Vol.20,267 (1991), H.Baumgart, et.al., Extende
d Abstract of ECS 1st International Symposium of W
afer Bonding, pp-733 (1991), CEHunt, Extended Abstra
ct of ECS1st International Symposium of Wafer Bond
ing, pp-696 (1991)).

Further, the semiconductor substrate using the bonding is
Inevitably, two wafers are required, and one of them is almost completely removed and discarded by polishing, etching, etc., thereby wasting limited earth resources.

Therefore, in the SOI by bonding, the current method has many problems in controllability, uniformity, and economy.

In general, on a light-transmitting substrate represented by glass, the deposited thin-film Si layer reflects the disorder of the substrate due to the disorder of the crystal structure thereof. ) Or, it is only a polycrystalline layer at best, and a high-performance device cannot be manufactured. This is due to the fact that the crystal structure of the substrate is amorphous, and even if a Si layer is simply deposited, a high-quality single crystal layer cannot be obtained.

Incidentally, the light-transmitting substrate is important in forming a contact sensor or a projection type liquid crystal image display device as a light receiving element. In order to further increase the density, resolution, and precision of pixels (picture elements) of sensors and display devices, high-performance driving elements are required. As a result, it is necessary that the element provided on the light transmitting substrate be manufactured using a single crystal layer having excellent crystallinity.

Therefore, it is difficult to fabricate a driving element having a required or sufficient performance in the amorphous Si or polycrystalline Si due to its crystal structure having many defects.

As described above, a compound semiconductor substrate is indispensable for manufacturing a compound semiconductor device. However, compound semiconductor substrates are expensive, and
It is very difficult to increase the area.

Further, it has been attempted to epitaxially grow a compound semiconductor such as GaAs on a Si substrate. However, the grown film has poor crystallinity due to differences in lattice constant and thermal expansion coefficient, and it is difficult to apply the film to a device. It has become very difficult.

In order to alleviate lattice misfit, attempts have been made to epitaxially grow a compound semiconductor on porous Si. However, due to the low thermal stability of porous Si and the change over time, devices are manufactured. Inside or
Lack of stability and reliability as a substrate after fabrication.

In such a method for manufacturing an SOI wafer, a non-single-crystal semiconductor layer is formed on a porous layer as disclosed in Japanese Patent Application Laid-Open No. Hei 5-21338. The method of transferring the SOI layer is that the uniformity of the thickness of the SOI layer is excellent, that the crystal defect density of the SOI layer is easy to keep low, the surface flatness of the SOI layer is good, This is very excellent in that the above-described device is not required, and that the same device can be used for a wide SOI film thickness range from several hundred angstroms to about 10 microns.

Further, as described in one embodiment of JP-A-7-302889, after the first substrate and the second substrate are bonded, only the first and second substrates are formed on the only porous layer. Separating the two substrates without destroying them, smoothing the residual layers of the porous layers remaining on the surfaces of the first and second substrates, forming porous again, and reusing The first substrate can be reused many times. Therefore, a great effect is obtained that the manufacturing cost can be greatly reduced and the manufacturing process itself can be simplified.

[0030]

However, when the bonded wafer is to be separated by the porous layer, the above method is basically possible, but there are some problems to be solved. First, when the bonded wafer is to be separated by the porous layer, a part of the first substrate or the second substrate is ruptured or the non-porous single crystal semiconductor layer formed on the porous layer Defects such as cracks and dislocations may occur. Although the cause is unknown and the frequency is low, separation may not be possible in the porous layer. To separate more stably, as disclosed in another embodiment of JP-A-7-302889, it is necessary to change the formation current during the anodization to form two porous layers. It is effective.

When such a method is adopted, separation of the bonded substrates becomes easy, however, on the other hand, the porous substrate can be separated in any step from the anodizing step of the porous layer to the completion of the bonding. The layers are destroyed first. Then, the bonding becomes impossible, and the porous layer broken in the middle and the non-porous single crystal layer formed on it cause particles, contaminating the manufacturing process. May be. For example, if any part of the porous layer is peeled off during the chemical conversion step of the anodizing apparatus, the substrate can no longer uniformly form a non-porous single crystal layer on its surface.

When the porous layer is peeled off in the electrolytic solution of the anodization tank, it is rare that only the porous layer is peeled off and collected, and the porous layer is partially peeled off. . Alternatively, the peeled porous layer is finely broken, and particles composed of fine pieces of the porous layer are scattered.
When these particles adhere to the surface of the other first substrate, the uniformity of the surface of the porous layer is reduced, or a pinhole of the non-porous semiconductor layer is formed when the non-porous semiconductor layer is formed. Alternatively, it causes a decrease in the uniformity of the film thickness of the semiconductor layer and a crystal defect. Further, due to the adhesion particles described above, a void may be formed as a non-adhesion portion when two substrates are bonded to each other.

The above-mentioned phenomenon that the porous layer is peeled off before bonding does not occur only in the anodizing step, but also in the subsequent oxidizing step using a heating furnace or the non-porous semiconductor layer forming step using a CVD apparatus. This can occur in all steps before and after the bonding step, such as an annealing step in a heating furnace that increases the bonding strength after bonding, and a cleaning step that is required as many times as necessary between each step.

If a part of the porous layer is broken at any of these steps, a desired semiconductor substrate cannot be formed, and various processing apparatuses are contaminated with particles made of the fragments of the porous layer. The use of these devices must be stopped and the particles must be thoroughly removed.

Even if the porous layer is not broken before the separation step, the thickness of the porous layer remaining on the surface of the non-porous semiconductor layer transferred onto the second substrate after the separation is reduced. It may not be uniform in the plane of the substrate. This is due to partial collapse or peeling of the porous layer. If the porous layer having the non-uniform thickness remains as described above, the non-porous semiconductor layer may be partially excessively etched in the subsequent etching step, and may not be a layer having a uniform thickness.

An object of the present invention is to provide a semiconductor substrate in which a porous region is unlikely to be broken before separation of a bonded substrate, and a method for manufacturing the same.

Another object of the present invention is to provide a semiconductor substrate in which separation of a predetermined position of a porous region occurs with good reproducibility, and a method for manufacturing the same.

Still another object of the present invention is to provide a semiconductor substrate capable of providing a high-quality SOI substrate at low cost and a method for manufacturing the same.

[0039]

According to the present invention, there is provided a method for preparing a first substrate having a porous region and a non-porous semiconductor layer disposed on the porous region, the method comprising: Bonding the first and second substrates to each other in the porous region, and removing the porous region remaining on the separated second substrate. Wherein the porous region has a first porous layer adjacent to the non-porous semiconductor layer, and a first porous layer having a higher porosity and a smaller thickness than the first porous layer. A second porous layer having a thickness of 80% or less of the first porous layer and a porosity of the second porous layer of 30% to 60%. The porous region is formed such that

Further, the composite member for a semiconductor substrate of the present invention comprises:
A first substrate, a porous region provided on the first substrate, a non-porous semiconductor layer provided on the porous region,
A second substrate provided on the non-porous semiconductor layer; and a composite member for a semiconductor substrate having the porous region, the first porous layer adjacent to the non-porous semiconductor layer, A second porous layer having a higher porosity and a smaller thickness than the first porous layer, wherein the thickness of the second porous layer is 80% of the thickness of the first porous layer. Is the following,
The porosity of the second porous layer is 30% to 60%.

Here, the term “porosity” refers to pores in the volume of the porous layer relative to the material of the porous layer.
re) represents the proportion of the volume occupied.

In order to facilitate separation after bonding,
The porosity of the second porous layer is 30% or more and 60% or less, preferably 40% or more and 60% or less. It is not impossible to perform the separation at a lower porosity. However, at the time of separation, the first substrate, the second substrate, or the non-porous layer formed on the porous layer of the first substrate is partially broken, cracked, or slipped. Dislocation may occur. To prevent these,
The porosity of the second porous layer is in the range of 30 to 60%. When the thickness of the first porous layer adjacent to the non-porous semiconductor layer is t1, and the thickness of the second porous layer is t2, 0.8t1 ≧ t2, that is, t2 is equal to t1. 80% or less, more preferably 50% or less.

By doing so, the thickness of the porous region remaining on the non-porous semiconductor layer after separation becomes substantially uniform over the second substrate surface. Therefore, when the remaining porous region is thereafter selectively etched, the thickness of the non-porous semiconductor layer remaining without being etched becomes uniform.

The presence of the porous region having the above-described relative relationship between the porosity and the thickness can prevent the porous region from peeling or collapsing before the separation step.

[0045]

Embodiments of the present invention will be described in detail with reference to the drawings.

[Basic Method for Manufacturing Semiconductor Substrate]
With reference to FIG. 1, a basic method for manufacturing a semiconductor substrate of the present invention will be described.

As shown in FIG. 1A, the porous region 1
And the non-porous semiconductor layer 13 provided on the porous region 1
Is prepared.

At this time, the porous region 1 is formed so as to have a structure including at least the first porous layer 11 and the second porous layer 12 adjacent to the non-porous semiconductor layer 13. Region 1 is formed.

The porosity P2 of the second porous layer 12 is higher than the porosity P1 of the first porous layer 11, and the porosity P2 is in the range of 30% to 60%.

The thickness t2 of the second porous layer 12 should not be larger than 80% of the thickness t1 of the first porous layer 11.

As shown in FIG. 1B, the first base 1
0 and the second base 14 are bonded together with the insulating layer 15 interposed therebetween. Thus, the composite member 2 for forming a semiconductor substrate
Is obtained.

It is more preferable that the insulating layer 15 be formed on at least one of the surface of the first substrate 10 and the surface of the second substrate 14 before bonding.

Next, as shown in FIG. 1C, the first and second substrates are separated. Thereby, the first porous layer 11
And the second porous layer 12, the portion of the second porous layer closer to the interface, or the entire second porous layer.

Thus, the residual layer 11b of the first porous layer 11 having a uniform thickness remains on the second substrate.

The residual layer 12b of the second porous layer 12 may or may not remain on the first base.

Then, as shown in FIG. 1D, the first porous semiconductor layer 11b remaining on the surface of the second base 14, ie, the surface of the non-porous semiconductor layer 13 is removed. Thus, an SOI substrate having the non-porous semiconductor layer 13 provided on the second base 14 via the insulating layer 15 is obtained.

If the second porous layer 12b remaining on the first substrate 10 is removed as necessary, the separated first substrate 10 can be used again as the first or second substrate. Can be.

The starting material of the first substrate before the formation of the porous region 1 used in the present invention is Si, Ge, GaAs.
Semiconductor materials such as s, InP, SiC, and SiGe are preferably used.

The porous region 1 may be formed by making the surface of the starting material porous, or may be formed on the surface of the starting material.

Here, the porosity P (%) of the porous body is
In the volume of the porous body, the pores (p
ore). The porosity is expressed by the following equation using the density m of the porous body and the density M of the non-porous body made of the same material as the porous body.

P = ((M−m) / M) × 100 (%) (1) Here, the density m of the porous body refers to an apparent weight G of the porous body including the pores, Is divided by the apparent volume V of the porous body containing, and can be expressed as m = G / V in the mathematical formula.

Actually, the porosity P of the porous layer of the first substrate in which only the surface layer from the surface to the depth d is a porous body
To determine (%), the weight A of the first substrate before forming the porous layer, the weight a of the first substrate after forming the porous layer, and the weight A after completely removing the porous layer are obtained. Weight of first substrate B
Is calculated using the following.

P = ((A−a) / (A−B)) × 100 (%) (2) Using the porosity P (%) as one parameter, the difference of the porosity P (%) This facilitates separation of the substrates after bonding, prevents generation of particles, and the like.

Further, it is preferable that the porosity of the first porous layer in contact with the non-porous semiconductor layer is made as low as possible, when the non-porous semiconductor layer is subsequently formed. It is desired to reduce crystal defects. This means that the pores on the surface of the porous region are filled in the initial stage of forming the non-porous semiconductor layer on the porous region. This is because crystal defects in the layer can be reduced. Therefore, the porosity of the first porous layer is less than 30%, preferably 20%.
% Is desirable.

In order to more easily realize the separation of the substrate after bonding, the porosity of the second porous layer is set to 3
It is desirable to select the range of 40% or more and 60% or less, which is 0% or more. This is to reduce the portion of the wall of the pore of the porous layer to make the porous structure brittle and to easily break at that portion.

The thickness of the second porous layer may be small for separating the bonded substrates. 50 nm or more, preferably 1
A thickness of 00 nm or more is effective for separating the substrate.
However, if it is too thin, it becomes difficult to precisely control the thickness of the second porous layer.

If the thickness of the second porous layer is too large,
Even if the porosity is not so high, the first porous layer may peel off before bonding. In order to prevent this, it is effective to make the thickness of the second porous layer smaller than that of the first porous layer. Since the internal stress is acting on the low porosity part, if the thickness of the high porosity part is set to be thicker than this part, the strength of the high porosity part will be too weak and it will be bonded. Before this, the porous layer is likely to be broken from the high porosity part, and the low porosity part is likely to peel off. Even though the first porous layer is quite thick, it is not preferred to thicken the second porous layer beyond 3 microns. Thus, the thickness of the second porous layer should not exceed 3 microns. In consideration of the ease of separation, the thickness of the second porous layer should be 1 nm to 1 micron for a substrate of 6 inches or less, and 1 micron to 3 microns for a substrate of 8 inches or more. Good.

If necessary, between the first and second porous layers or on the side of the second porous layer opposite to the first porous layer, the porosity is equal to that of the first porous layer. It is also possible to provide a layer having an intermediate value between the two porous layers. The stress at the time of separation concentrates on the layer having the highest porosity, which functions as the second porous layer.

Hereinafter, silicon will be described in detail using silicon as an example. The mechanical strength of porous Si differs depending on the porosity, but is considered to be sufficiently weaker than bulk Si. That is, when compressive, tensile or shearing force is applied to the bonded wafer, first, the porous Si layer is broken first. Further, if the porosity is increased, the porous layer can be broken with a weaker force. When the porous layer is composed of a plurality of layers having different porosity, stress is concentrated on the layer having the highest porosity, and breakage starts therefrom.

The Si substrate can be made porous by anodization using an HF solution. This porous Si layer has a higher H density than the density of single crystal Si of 2.33 g / cm ^3.
By changing the F solution concentration to 50 to 20%, the density can be changed to a range of 1.1 to 0.6 g / cm ³ . This porous layer is made of N-type Si for the following reason.
It is difficult to form a layer, and is easily formed on a P-type Si substrate. According to observation with a transmission electron microscope, this porous Si layer has pores with an average diameter of about 100 to 600 angstroms.

The porous Si was prepared by Uhril et al.
It was discovered during the research process of electropolishing semiconductors in 1956 (A. Uhlir, Bell Syst. Tech. J., vol. 35, 333 (1956)).

In addition, eel and the like are the
And reported that the anodic reaction of Si in HF solution requires holes, and the reaction is as follows (T. Unakami, J. Electrochem. Soc., vol.127,476 (1
980)).

Si + 2HF + (2-n) e ⁺ → SiF ₂
+ 2H ⁺ + ne ^- SiF ₂ + 2HF → SiF ₄ + H ₂ SiF ₄ + 2HF → H ₂ SiF ₆ or Si + 4HF + (4-λ) e ⁺ → SiF ₄ + 4H ⁺ + λ
e ⁻ SiF ₄ + 2HF → H ₂ SiF ₆ Here, e ⁺ and e ⁻ represent holes and electrons, respectively. Further, n and λ are the number of holes required for dissolving Si atoms, respectively, and it is described that when the condition of n> 2 or λ> 4 is satisfied, porous Si is formed.

From the above, p-type Si having holes
Is made porous, but n-type Si is not made porous. The selectivity in this porous formation has been demonstrated by Nagano et al. And Imai (Nagano, Nakajima, Yasuno, Onaka, Kajiwara, IEICE Technical Report, vol.79, SSD79-9549 (1979)),
(K. Imai, Solid-State Electronics, vol. 24, 159 (198
1)). However, there is a report that high-concentration n-type Si can be made porous (RP Holmstrom and JYChi, Appl. Phy.
s. Lett., vol. 42, 386 (1983)), it is important to select a substrate capable of realizing porosity regardless of whether it is p-type or n-type.

According to observation with a transmission electron microscope, pores having an average diameter of about 100 to 600 angstroms are formed in the porous Si layer, and the density of the pores is reduced to a single crystal Si.
As compared with the above, the single crystallinity is maintained even when the thickness is reduced to half or less, and it is also possible to epitaxially grow a single crystal Si layer on the porous layer. However, if the temperature is higher than 1000 ° C., rearrangement of the internal holes occurs, and the characteristics of the accelerated etching are impaired. For this reason, the epitaxial growth of the Si layer includes molecular beam epitaxial growth and plasma CVD.
It is considered that low-temperature growth such as a low pressure CVD method, a low pressure CVD method, a photo CVD method, a bias sputtering method, and a liquid phase growth method is suitable.

Further, since the porous layer has a large amount of voids formed therein, the density is reduced to less than half. As a result, the surface area is dramatically increased as compared with the volume, so that the chemical etching rate is significantly increased as compared with the ordinary etching rate of the single crystal layer.

As the non-porous semiconductor layer used in the present invention, Si, Ge, GaAs, InP, SiC, SiG
e, a single layer of a semiconductor such as GaN, GaP, or a plurality of layers. In the case of a plurality of layers, the layers are different in conductivity type or conductivity, or a layer forming a hetero junction therebetween.

As a method of forming the non-porous semiconductor layer, even if the non-porous semiconductor layer is deposited on the porous region, the porous layer is formed by ion implantation or the like below the surface layer of the non-porous starting material. By forming the surface layer, the surface layer remaining without being made porous may be used as a non-porous semiconductor layer.

As the second substrate used in the present invention,
Semiconductors such as Si, Ge, SiC, SiGe, GaAs, and InP are exemplified. Alternatively, an insulator such as quartz, fused quartz, silica glass, glass, and sapphire may be used.

As a method for separating the bonded substrates, a separation method as disclosed in JP-A-7-302889 can be used. For example, a method of irradiating wave energy such as ultrasonic waves, a method of inserting a peeling member from the side of a porous layer parallel to a bonding surface of a bonding substrate, and a method of using expansion energy of a material impregnated in a porous layer A method of using selective etching of the porous layer on the side surface of the board-like substrate, a method of exposing the porous layer and then oxidizing the porous layer from the side surface of the porous layer, and utilizing the volume expansion at this time. Can be used.

[First Embodiment of Method of Manufacturing Semiconductor Substrate] FIG. 2 shows a method of manufacturing a semiconductor substrate according to an embodiment of the present invention. This method is based on the basic manufacturing method shown in FIG.

As shown in FIG. 2A, the first base 1
The first porous layer 11 and the second porous layer 12 are formed on the surface of the "0". The porosity of the second porous layer 12 is set to 30% or more, and the porosity of the first porous layer 11 is set to less than 30%. The thickness is such that the thickness of the second porous layer 12 is 0.8 times or less the thickness of the first porous layer 11.

In order to form the first and second porous layers in this manner, anodization may be used. First, after the first porous layer 11 is formed on the surface of the first base by the first formation current, the current value is increased, and the non-porous of the first base under the first porous layer is increased. The porous portion is made porous to form the second porous layer 12.

Instead of increasing the current value, the second porous layer 12 may be formed by exchanging the chemical forming solution and performing anodization at the same current value.

As shown in FIG. 2B, the porous layer 11
The non-porous semiconductor layer 13 is formed on the surface of. next,
The surface of the non-porous semiconductor layer 13 is insulated as necessary.

Next, as shown in FIG. 2C, a supporting substrate 17 which is a second substrate 14 having an insulating layer 15 and a substrate which is a first substrate 10 having each of the layers 11, 12 and 13. 16 are adhered at room temperature, and then bonded by anodic bonding, pressing, heat treatment, or a combination thereof.

Thus, the second base 14 and the non-porous semiconductor layer 13 are firmly bonded via the insulating layer 15. The insulating layer 15 is formed on the non-porous semiconductor layer 13 or on the second substrate 14.
It may be formed on at least one of the above, or may be laminated with three sheets of insulating thin plates.

Next, the substrate 18 is
And the substrate 19. The base 19 has a structure like the first porous layer 11, the non-porous semiconductor layer 13, the insulating layer 15, and the second base 14.

Further, the porous layer 11 is selectively removed. Hydrofluoric acid, which is a normal Si etchant, or a porous Si selective etchant, or a mixed solution obtained by adding at least one of alcohol and hydrogen peroxide to hydrofluoric acid, or buffered hydrofluoric acid, or a buffer At least one of a mixture obtained by adding at least one of alcohol and hydrogen peroxide solution to hydrofluoric acid.
Using the type, only the porous layer 11 is subjected to electroless wet chemical etching to leave the non-porous semiconductor layer 13 transferred on the insulating layer 15 and formed (see FIG. 2E).

Alternatively, the porous layer 11 may be removed by selective polishing using the non-porous layer 13 as a polishing stopper.

FIG. 2E shows a semiconductor substrate obtained by the present invention. On a substrate 14 having an insulating surface,
The non-porous semiconductor layer 13 is made flat and uniform, and has few crystal defects.

[Second Embodiment of Manufacturing Method of Semiconductor Substrate] FIG. 3 shows a modification of the manufacturing method of the semiconductor substrate shown in FIG. 2, in which a light-transmitting insulating substrate is used as the second base. Is shown.

The steps shown in FIGS. 3A and 3B correspond to FIG.
(A) and (b), and redundant description is omitted.

As shown in FIG. 3C, a light-transmitting insulating substrate 24 typified by quartz or glass and a first base 26
Are adhered at room temperature, and then bonded by anodic bonding, pressing, heat treatment, or a combination thereof. Thereby, the light-transmitting insulating substrate 24 and the non-porous semiconductor layer 13 are firmly bonded via the insulating layer 15. The insulating layer 15 is formed on at least one of the non-porous semiconductor layer 13 and the light-transmitting insulating substrate 24, or is sandwiched with an insulating thin plate.

Next, as shown in FIG.
And the substrate 29. On the light transmitting insulating substrate 24,
It has a laminated structure of the first porous layer 11, the non-porous semiconductor layer 13, and the insulating layer 15.

Further, the porous layer 11 is selectively removed. Hydrofluoric acid, which is a normal Si etchant, or a porous Si selective etchant, or a mixed solution obtained by adding at least one of alcohol and hydrogen peroxide to hydrofluoric acid, or buffered hydrofluoric acid, or a buffer Electroless wet chemical etching of only porous Si 21 is performed by using at least one kind of a mixed solution obtained by adding at least one of alcohol and hydrogen peroxide solution to hydrofluoric acid to form a thin film on light-transmitting insulating substrate 24. The remaining non-porous semiconductor layer 13 is formed.

As described in detail above, the enormous surface area of the porous body makes it possible to selectively etch only the porous body with an ordinary etching solution and leave the non-porous body. Alternatively, the porous layer 11 may be removed by selective polishing using the non-porous layer 13 as a polishing stopper.

FIG. 3E shows a semiconductor substrate obtained in this embodiment. The non-porous semiconductor layer 13 is flatly and uniformly thinned on the surface of the light-transmitting insulating substrate 24, and is formed over a large area over the entire wafer.

Next, from the viewpoint of recycling and reuse, the first substrate 10 is formed by removing the residual porous layer 12 and
If the surface flatness is unacceptably rough, after the surface is flattened as necessary,
Used as 0.

[Third Embodiment of Manufacturing Method of Semiconductor Substrate] FIG. 4 shows a method of forming a porous layer and a non-porous semiconductor layer on both surfaces of one substrate and bonding the three substrates together. .

As shown in FIG. 4A, first, a first base 30 is prepared, and two surface layers 31 and 32 and two layers 33 and 34 having different porosity are formed on the surface layers on both sides thereof. Form a porous region of the structure. Non-porous semiconductor layers 35 and 36 are formed on first porous layers 31 and 33 (see FIG. 4B). The first porous layers 31 and 33 have a porosity of 3
Less than 0%, the porosity of the second porous layers 32, 34 is 30%
Anodization is performed as described above.

Next, as shown in FIG. 4C, two second bases 39 and 40 and non-porous semiconductor layers 35 and 36 are formed.
With the first base 30 having the insulating layers 37 and 3 respectively.
After being brought into close contact with each other at room temperature with an intervening member 8 therebetween, they are bonded by anodic bonding, pressing, heat treatment, or a combination thereof.

As a result, the bases 39 and 40 and the non-porous semiconductor layers 35 and 36 are firmly bonded via the insulating layers 37 and 38. The insulating layers 37, 38 are made of a non-porous semiconductor layer 35,
36, or at least one of the substrates 39 and 40. Alternatively, an insulating thin plate separate from each substrate is formed in layer 3
5, 36 may be prepared, and these may be sandwiched and laminated by five sheets.

Next, the substrate is divided into three parts 40, 41 and 42 (see FIG. 4D). Two substrates 39, 40
Has a laminated structure of a porous layer, a non-porous semiconductor layer, and an insulating layer.

Further, both porous layers 31, 33 are selectively removed by polishing or etching. The non-porous semiconductor layers 35 and 36 thus thinned are left on the bases 39 and 40.

FIG. 4E shows a semiconductor substrate obtained in this embodiment. The non-porous semiconductor layers 35 and 36 are formed on the bases 39 and 40, respectively, in a flat and uniform manner, and are simultaneously formed. The insulating intermediate layer 3
7, 38 may not be provided. Further, the bases 39 and 40 may not be made of the same material.

Further, in terms of reusing the first substrate used once, the first base 30 is formed by removing the residual porous layer,
Alternatively, the surface is flattened and reused.

[Fourth Embodiment of Manufacturing Method of Semiconductor Substrate] Next, a method of forming a porous region used in the present invention using anodization will be described.

As a method of changing the porosity of the porous layer in the thickness direction, for example, there is a method of changing the formation current during formation of the porous layer during anodization. Further, a method of changing the concentration of the chemical solution may be used. For example, Journal of Electrochem
ical Society: SOLID-STATE SCIENCE AND TECHNOLOGY Vol. 134, No. 8, page 1994, etc.
By changing the formation current, the porosity and pore size of the porous layer can be changed. When the composition of the chemical conversion liquid is changed, the composition can be changed by adding hydrofluoric acid or water to the chemical conversion liquid later.

Alternatively, a porous layer having a low porosity can be formed with a chemical solution having a high HF concentration, and then a chemical layer having a high porosity can be formed by substituting a chemical solution having a low HF concentration. A plurality of layers having different porosity can be formed. However, according to studies conducted by the present inventors, if this phenomenon is applied to separation of a bonded substrate for manufacturing a semiconductor substrate, a more complicated phenomenon may appear as described later. In other words, simply following the conventional method can provide very limited effects. For example, simply increasing the formation current does not mean that the porosity can be increased arbitrarily, but only increases the formation rate instead of increasing the porosity.
The result may be that the porosity does not increase very much. If a method described below is employed to obtain a structure like the present invention, a porous layer can be obtained at low cost.

The simplest practical method is to change the formation current without changing the composition of the formation solution. Various compositions can be used for the chemical conversion liquid. For example, hydrofluoric acid containing about 30% of HF or a substance obtained by adding an alcohol thereto gives good results. Anodization is performed in such a chemical solution. If the current density of the formation current is about 0.5 to 1.0 A / cm ² with the Si substrate as the anode, the porosity is 20 to 3
About 0% of porous Si can be formed. The thickness can be arbitrarily selected as needed by changing the formation time. However, such porous Si having relatively low porosity is suitable for epitaxially growing single-crystal Si on the surface. By increasing the current after forming such a porous layer having relatively low porosity, a porous layer having high porosity is formed.

FIG. 5 shows an example of how the current is changed at this time. When the porosity of the first porous layer is about 20% and the thickness is about 10 μm, the formation current of the second porous layer is set to about two to three times the formation current of the first porous layer. A second porous layer having a porosity of about 30 to 60% can be formed below the first porous layer.

As a result of intensive studies conducted by the present researchers, the porosity of the second porous layer is not determined only by the magnitude of the current, but is determined by the thickness and porosity of the first porous layer. Was also found to be dependent. Even if the formation current of the second porous layer is set equal, if the thickness of the first porous layer is large or the porosity is low, the porosity of the second porous layer tends to be high. . Therefore, for example, when the thickness of the first porous layer is reduced, it is necessary to further increase the formation current of the second porous layer in order to keep the porosity of the second porous layer high. . FIG. 6 shows this relationship.

If the formation current of the second porous layer is kept constant, if the thickness of the first porous layer changes, the porosity of the second porous layer is affected. FIG. 7 shows this relationship.
It is.

After the formation of the first porous layer, the second porous layer cannot be formed independently of the first porous layer, but the characteristics of the first porous layer are determined by the porosity of the second porous layer. It is clear that it affects The detailed mechanism of such a phenomenon has not been completely elucidated. However, as described later, formation of porous Si requires F ^- ions in the chemical conversion solution, and if F ^- ions are consumed in the pore formation portion at the tip of the pore, the surface side of the porous Si will , Pore
New F ^- ions need to be transported through the interior and supplied to the tip of the pore. F in such a pore
^- effective mobility of transport by electric field or diffusion of ions will depend on the thickness of the length of the pore size and pore of the first porous layer or first porous layer. That is, the first porous layer formed by anodization itself limits the transport of ions necessary for forming the subsequent porous layer.

[0116] Thus, the first porous layer is formed, F necessary for the formation of the porous layer of the above ^- act as effective mobility limiting layer of ion transport. If the formation current is constant, formation proceeds without significant change in porosity to a considerable thickness. This means that at a constant current, a pore of a certain size is formed, which is determined by the balance between the consumption and supply of F ^- ions, but when the current is increased on the way, the consumption of F ^- ions is reduced due to the presence of the already formed porous layer. This is probably because the supply balance changes and the pore size changes significantly.

When the thickness of the first porous layer increases and the effective mobility of F ⁻ ions transported therein decreases, po
The F ^- ion concentration at the tip of the re decreases, and the ion-deficient layer spreads in the chemical conversion solution in the pore, so that the portion where the potential barrier at the interface between the chemical conversion solution and the surface of the Si single crystal in the pore expands, Then, Si may be etched and the pore size may have increased. In fact, even if the formation current is simply increased, the porosity does not increase much but the formation rate increases if the mobility limiting layer does not exist on the Si surface. Therefore, when the porosity is to be largely changed by increasing the formation current, some kind of F ⁻ as described above is placed between the porosity increase layer and the formation solution.
An ion mobility limiting layer is required.

The present invention makes use of such an anodizing mechanism and makes it possible to easily increase the porosity of the second porous layer by utilizing the first porous layer formed first. Also has a great feature. In order to increase the porosity of the second porous layer, the thickness of the first porous layer is required to some extent, and when the first porous layer is 5 microns or more, the porosity is easily increased. A second porous layer can be formed.

Since the first porous layer has such an action, its thickness control is important for controlling the porosity of the second porous layer. For example, it is necessary to ensure sufficient in-plane uniformity of the first porous layer. Otherwise, the porosity of the second porous layer will vary in the plane. If there is an in-plane variation in the porosity of the second porous layer, the strength of the second porous layer may be partially too weak or too strong, and partial peeling may occur during the SOI wafer preparation process. In some cases, a part of the wafer cannot be separated cleanly in the separation step, thereby lowering the production yield of the SOI wafer. The in-plane variation of the thickness of the first porous layer was 35
% Or less, preferably 25% or less.

If the thickness of the first porous layer is to be made much smaller than 5 μm, especially if the thickness is 3 μm or less, the effect of the mobility limiting layer becomes small. Therefore, it becomes difficult to increase the porosity as it is. As shown in FIG. 6, the thinner the first porous layer becomes, the more the formation current of the second porous layer needs to be increased without limit. Although it is of course not impossible to increase the current, it is necessary to be prepared to some extent at the expense of an increase in the required power supply capacity and a decrease in the accuracy of current control and the accuracy of current measurement. Further, the formation rate increases with an increase in the current, so that the accuracy of controlling the thickness of the second porous layer may be reduced. In such a case, it is not necessary to try to realize all by current control alone.
By lowering the HF concentration of the chemical conversion solution, the F ^- ion concentration at the tip of the pore can be easily reduced.

When the first porous layer is formed first,
Since the mobility limiting layer does not yet exist, if the formation current is sufficiently reduced, the consumed F ^- ions can be sufficiently supplied even if the HF concentration is reduced to some extent, so that the porosity almost increases. do not do. For example, HF: C ₂ H ₅ O
Even if H: H ₂ O = 1: 1: 4, the formation current is 1 m
If it is suppressed to about A / cm ² or less, the porosity can be suppressed to about 20%. However, after the first porous layer is formed,
Since the mobility limiting layer is formed, it is possible to create a state in which the F ^- ions at the tip of the pore are insufficient even if the increase in the formation current is small, and it is possible to increase the porosity. Even after the formation of the first porous layer having a thickness of 3 μm as described above, the second porous layer having a large porosity of about 30 to 60% can be formed only by increasing the current to about 5 mA / cm ^2. Can be done. On the other hand, if the HF concentration in the chemical conversion solution is higher, HF: C ₂ H ₅ OH: H ₂ O =
When the ratio is about 1: 1: 1, the porosity of the second porous layer is 30 to
To increase to 60%, about 10 mA / cm ² or more is required.

By the way, when a two-layer structure in which the order is opposite to the above structure, that is, a structure in which the porosity of the first porous layer is larger than that of the second porous layer is to be formed, Because the porosity of the porous layer is large, the transport of F 2 ^- ions is hardly hindered. Therefore, the current of the first porous layer formation and the current of the second porous layer formation can be simply calculated from the above mechanism. By simply reversing the above, the porosity of the first porous layer does not become too large.

When a plurality of porous layers having different porosity are to be formed, a method of changing the composition of the chemical conversion liquid for each layer can be adopted. A first porous layer having a low porosity and less than 5 microns;
When sequentially forming the second porous layers having large porosity, in order to achieve this only by changing the current, the formation current of the second porous layer must be relatively large as described above. However, first, after forming the first porous layer with a chemical conversion solution having a high HF concentration, the chemical formation is suspended, the substrate is pulled out of the chemical conversion solution, and the chemical conversion solution in the tank is replaced with a low-HF concentration chemical solution. Then, the substrate is again put into the chemical conversion solution having a high HF concentration to carry out the chemical conversion so that the porosity is 30 to 60%.
Alternatively, the second porous layer can be formed without increasing the formation current excessively.

In the case where the chemical conversion is interrupted as described above, the chemical conversion solution adhering to the substrate may be removed by washing or dried during the interruption.

[0125]

Next, an embodiment of the present invention will be described in more detail.

Example 1 625 μm was used as the first substrate.
A p-type 5-inch diameter Si wafer having a specific resistance of 0.01 Ω · cm and a thickness of m was prepared. Anodization was performed in an HF solution. As a result, a porous Si region having a two-layer structure composed of two layers 11 and 12 having different porosity was formed on the surface layer of the Si wafer. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 11 (min) Thickness of porous Si: 10 (μm) ) Porosity: 15 (%) Current density: 25 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 20 (seconds) Porous Si Next, the Si wafer was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. Due to this oxidation, the inner wall surface of the porous Si hole was covered with the thermal oxide film. Single-crystal Si was epitaxially grown on the porous Si by 0.3 μm by CVD. As a result, a non-porous single-crystal Si layer was formed on the porous Si.
The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation.

A Si wafer was prepared as a second substrate, and the surface was thermally oxidized.

The surface of the SiO ₂ layer of the first wafer and the second Si having a separately prepared 500 nm SiO ₂ layer were formed.
After superimposing and contacting the wafer surface, 700 ° C
Then, heat treatment was performed for 2 hours, and bonding was performed.

A porous layer was exposed on the end face of the wafer, the porous Si on the end face was removed by etching to some extent, and a sharp plate like a razor blade was inserted there. Was divided into two parts, and porous Si was exposed.

After that, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching was performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained. Similar results were obtained without forming an oxide film on the surface of the epitaxial Si layer.

The first Si wafer was used again as a first substrate after removing residual porous Si.

(Example 2) As the first substrate, 625 was used.
A p-type 5-inch wafer having a specific resistance of 0.01 Ω · cm and a thickness of μm was prepared. Anodization was performed in an HF solution to form a porous Si region having a two-layer structure including the following two layers having different porosity on the surface layer of the first Si wafer. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 5 (min) Thickness of porous Si: 5 (μm) ) Porosity: 15 (%) Further, Current density: 38 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 10 (sec) Porous Si Thickness: 250 (nm) Porosity: 50 (%) This wafer was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere.
Due to this oxidation, the inner wall surface of the porous Si hole was covered with the thermal oxide film. Single-crystal Si was epitaxially grown on the porous Si by 0.3 μm by CVD. The growth conditions are as follows.

Source gas: SiH_Four Carrier gas: H_Two Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, the surface of this epitaxial Si layer was thermally oxidized.
100nm SiO _TwoA layer was formed. The SiO_Twolayer
500nm SiO prepared separately from the surface_TwoFormed layer
The surface of the second Si wafer was overlapped and brought into contact
After that, heat treatment is performed at 700 ° C. for 2 hours, and bonding is performed.
I got this.

A porous layer was exposed on the end face of the wafer, the porous Si at the end was etched to some extent, and a sharp plate was inserted into it like a razor blade. It was divided and porous Si was exposed.

After that, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film of the second wafer.
The selective etching of the porous Si did not change the single crystal Si layer at all.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

Similar results were obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si wafer was used as a first substrate again after removing residual porous Si.

(Example 3) As the first substrate, 625 was used.
p-type 5 with a specific resistance of 0.01 Ω · cm and a thickness of μm
An inch wafer was prepared. Anodization was performed in an HF solution to form a porous Si region having a two-layer structure including the following two layers having different porosity on the surface layer of the Si wafer.
The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 1 (min) Thickness of porous Si: 1 (μm) ) Porosity: 15 (%) Current density: 160 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 5 (seconds) Porous Si Thickness: 500 (nm) Porosity: 45 (%) This wafer was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour.
Due to this oxidation, the inner wall surface of the porous Si hole was covered with the thermal oxide film. Single-crystal Si was epitaxially grown on the porous Si by 0.3 μm by CVD. The growth conditions are as follows.

Source gas: SiH_Four Carrier gas: H_Two Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, the surface of this epitaxial Si layer was thermally oxidized.
100nm SiO _TwoA layer was formed.

The surface of the SiO ₂ layer of the first wafer and the second Si having a separately prepared 500 nm SiO ₂ layer were formed.
After superimposing and contacting the wafer surface, 700 ° C
Then, heat treatment was performed for 2 hours, and bonding was performed.

The porous layer was exposed on the end face of the wafer, the porous Si on the end face was etched to some extent, and a sharp plate was inserted into it like a razor blade. It was divided into two parts, and porous Si was exposed.

After that, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film of the second Si wafer. Single crystal S can also be obtained by selective etching of porous Si.
There was no change in the i-layer.

As a result of observing the cross section with a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

Similar results were obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si wafer was used as a first substrate again after removing residual porous Si.

Example 4 625 μm was used as the first substrate.
A p-type or n-type 5-inch wafer having a specific resistance of 0.01 Ω · cm and a thickness of m was prepared, and anodized in an HF solution. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 5 (min) Thickness of porous Si: 5 (μm) ) Porosity: 15 (%) Current density: 38 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 40 (seconds) Porous Si Thickness: 1.2 (nm) Porosity: 45 (%) This wafer was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour.
Due to this oxidation, the inner wall surface of the porous Si hole was covered with the thermal oxide film. Single-crystal Si was epitaxially grown on the porous Si by 0.3 μm by CVD. The growth conditions are as follows.

Source gas: SiH_Four Carrier gas: H_Two Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, the surface of this epitaxial Si layer was thermally oxidized.
100nm SiO _TwoA layer was formed. The SiO_Twolayer
Surface and separately prepared 500nm SiO_TwoForming layers
And the surface of the second Si wafer
After that, heat treatment is performed at 700 ° C for 2 hours, and bonding is performed.
I did it.

A plate was adhered to both surfaces of the bonded wafer using an adhesive, and a sufficient pressure was applied uniformly in a direction perpendicular to the outer surface of the wafer bonded to the plate. Was broken and broken, the wafer was divided into two parts, and the remaining portion of the porous Si was exposed.

After that, the remaining porous Si layer was removed by HF / HNO
Selective etching is performed with a ₃ / CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film of the second wafer.
The selective etching of the porous Si did not change the single crystal Si layer at all.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

The same result was obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si wafer was used as a first substrate again after removing residual porous Si.

(Embodiment 5) First single-crystal Si substrate 10
Has a specific resistance of 0.01 Ω · cm having a thickness of 625 μm.
Was prepared and anodized in an HF solution. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 11 (min) Thickness of porous Si: 10 (μm) ) Porosity: 15 (%) Current density: 25 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 20 (seconds) Porous Si Thickness: 200 (nm) Porosity: 55 (%) This wafer was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour.
Due to this oxidation, the inner wall surface of the porous Si hole was covered with the thermal oxide film. Single-crystal Si was epitaxially grown on the porous Si by 0.3 μm by CVD. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation. And the SiO ₂ layer surface, superimposing a second Si wafer surface was formed a 500 nm SiO ₂ layer separately prepared, and, after contacting, at 700 ° C., and the heat treatment for 2 hours, the bonding I did it.

Next, the porous layer was exposed on the end face of the wafer, the porous Si was etched to some extent, and after cleaning, the porous Si layer was immersed in an ultrasonic cleaning tank filled with pure water and irradiated with ultrasonic waves. The wafer was broken and the wafer was divided into two parts, and porous Si was exposed.

Thereafter, this was dried, and the residual porous Si layer was selectively etched with an HF / HNO ₃ / CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.
That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

The same result was obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si wafer was used as a first substrate again after removing residual porous Si.

Example 6 625 μm was used as the first substrate.
A 5-inch p-type wafer having a specific resistance of 0.01 Ω · cm and a thickness of m was prepared, and anodized in an HF solution. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 5 (min) Thickness of porous Si: 5 (μm) ) Porosity: 15 (%) Further, Current density: 38 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 10 (sec) Porous Si Thickness: 250 (nm) Porosity: 50 (%) This wafer was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere.
Due to this oxidation, the inner wall surface of the porous Si hole was covered with the thermal oxide film. Single-crystal Si was epitaxially grown on the porous Si by 0.3 μm by CVD. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation. After the surface of the SiO ₂ layer and the semiconductor surface of the second Si wafer from which the natural oxide film prepared separately was removed were brought into contact with each other, 700
Heat treatment was performed at 2 ° C. for 2 hours, and bonding was performed.

A porous layer was exposed on the edge of the wafer, the porous Si was etched to some extent, and a sharp plate was inserted into it like a razor blade. When the porous Si layer was broken, the wafer was divided into two parts. Porous Si appeared.

After that, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

Similar results were obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si wafer was used as a first substrate again after removing residual porous Si.

(Example 7) As the first substrate, 625 μm
A p-type 5 inch Si wafer having a specific resistance of 0.01 Ω · cm and a thickness of m was prepared, and anodized in an HF solution. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 5 (min) Thickness of porous Si: 5 (μm) ) Porosity: 15 (%) Further, Current density: 38 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 10 (sec) Porous Si Thickness: 250 (nm) Porosity: 50 (%) This wafer was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere.
Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. Single crystal Si is added to porous Si by CVD method.
3 μm epitaxial growth was performed. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation. The surface of the SiO ₂ layer and the surface of a separately prepared quartz glass substrate irradiated with oxygen plasma were overlapped and brought into contact with each other.
Heat treatment was performed for a long time, and bonding was performed.

The porous layer was exposed on the end face of the wafer, the porous Si on the end face was etched to some extent, and a sharp plate like a razor blade was inserted there, and the porous Si layer was broken, and the wafer was divided into two parts. As a result, porous Si was exposed.

After that, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the glass substrate. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

Similar results were obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si wafer was used as a first substrate again after removing residual porous Si.

Example 8 First, as a first substrate, 6
A p-type 5-inch diameter first (100) single-crystal Si wafer having a thickness of 25 μm and a specific resistance of 0.01 Ω · cm,
Anodization was performed in an HF solution. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 11 (min) Thickness of porous Si: 10 (μm) ) Porosity: 15 (%) Further, once the above-mentioned single crystal Si substrate is pulled out of the chemical conversion device, washed and stored with water, the chemical conversion liquid in the chemical formation device is replaced, and then the Si substrate is set in the chemical formation device again. A porous layer having a large porosity was formed under the following conditions.

Current density: 25 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 3 (min) Thickness of porous Si: 3 (μm) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. 0.3% single crystal Si is deposited on porous Si by CVD.
μm epitaxial growth was performed. The growth conditions are as follows.

Source gas: SiH_Four Carrier gas: H_Two Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, the surface of this epitaxial Si layer was thermally oxidized.
200nm SiO _TwoA layer was formed.

This was superposed on the surface of a separately prepared Si substrate and brought into contact with each other, and then heat-treated at 1100 ° C. for 1 hour and bonded.

The porous layer was exposed on the end face of the wafer, the porous Si was etched to some extent, and a sharp plate was inserted into it like a razor blade. When the porous Si layer was broken, the wafer was divided into two parts. Porous Si appeared.

After that, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film. The selective etching of the porous Si did not change the single crystal Si layer at all.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

Similar results were obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si wafer was used as a first substrate again after removing residual porous Si.

Example 9 First, as a first substrate, 6
A p-type 5-inch diameter first (100) single-crystal Si wafer having a thickness of 25 μm and a specific resistance of 0.01 Ω · cm,
Anodization was performed in an HF solution. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 5.5 (min) Thickness of porous Si: 10 (Μm) Porosity: 15 (%) Further, H ₂ O and C ₂ H ₅ OH are added to the formation solution to change the HF concentration in the formation solution to form layers having different porosity.

Current density: 25 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 1 (min) Thickness of porous Si: 1 (μm) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. 0.3% single crystal Si is deposited on porous Si by CVD.
μm epitaxial growth was performed. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation.

This was superposed on and contacted with the surface of a separately prepared Si substrate, and then heat-treated at 1180 ° C. for 5 minutes to perform bonding.

When the porous layer was exposed on the edge of the wafer, the porous Si was etched to some extent, and a sharp plate was inserted into it like a razor blade. The porous Si layer was broken, and the wafer was divided into two parts. As a result, porous Si was exposed.

After that, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a thickness reduction that can be ignored in practical use.

That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

The same result was obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si single crystal wafer was used as a first substrate again after removing residual porous Si.

Example 10 First, as a first substrate,
P with a specific resistance of 0.01 Ω · cm and a thickness of 625 μm
A 5 inch diameter first (100) single crystal Si wafer of the mold was anodized in an HF solution. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 11 (min) Thickness of porous Si: 10 (μm) ) Porosity: 15 (%) Further, Current density: 25 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 3 (min) Porous Si Thickness: 3 (μm) Porosity: 40 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. 0.3% single crystal Si is deposited on porous Si by CVD.
μm epitaxial growth was performed. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation.

[0216] This was superimposed on the surface of a separately prepared Si substrate and brought into contact with each other, and then heat-treated at 1180 ° C for 5 minutes to perform bonding.

The porous layer was exposed on the end face of the wafer, the porous Si was etched to some extent, and a sharp plate like a razor blade was inserted there. When the porous Si layer was broken, the wafer was divided into two parts. Porous Si appeared.

Thereafter, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

That is, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film. There was no change in the single crystal Si layer even by selective etching of the porous Si.

As a result of observation of a cross section by a transmission electron microscope,
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

The same result was obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si single crystal wafer was used as a first substrate again after removing residual porous Si.

Example 11 First, as a first substrate,
P with a specific resistance of 0.01 Ω · cm and a thickness of 625 μm
A 5 inch diameter first (100) single crystal Si wafer of the mold was anodized in an HF solution. The anodizing conditions were as follows.

Current density: 0.5 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 4: 1 Time: 80 (min) Thickness of porous Si: 3 (Μm) Porosity: 20 (%) Current density: 5 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 4: 1 Time: 1 (min) Porosity Thickness of porous Si: 1.8 (μm) Porosity: 45 (%) This substrate was oxidized at 400 ° C. for 1 hour in an oxygen atmosphere. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. Single-crystal Si is added to porous Si by CVD method.
3 μm epitaxial growth was performed. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1.3 Pa Growth rate: 3.3 nm / sec Further, a 100 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation.

This was superposed on and contacted with the surface of a separately prepared Si substrate, and then heat-treated at 1180 ° C. for 5 minutes to perform bonding.

When the porous layer was exposed on the end face of the wafer, the porous Si was etched to some extent, and a sharp plate like a razor blade was inserted into the porous Si. The porous Si layer was broken and the wafer was divided into two parts. , And porous Si appeared.

After that, the porous Si layer was subjected to HF / HNO ₃ /
Selective etching is performed using a CH ₃ COOH-based etchant. The porous Si was selectively etched and completely removed.

The etching rate of the non-porous Si single crystal with respect to the etching solution is extremely low, and the amount of etching in the non-porous layer is a practically negligible decrease in film thickness.

In other words, a single-crystal Si layer having a thickness of 0.2 μm was formed on the Si oxide film. The selective etching of the porous Si did not change the single crystal Si layer at all.

As a result of observation of a cross section by a transmission electron microscope, S
No new crystal defects were introduced into the i-layer, and it was confirmed that good crystallinity was maintained.

The same result was obtained without forming an oxide film on the surface of the epitaxial Si layer. The first Si single crystal wafer was used as a first substrate again after removing residual porous Si.

(Comparative Example 1) First, as a first substrate, 6
A p-type 5-inch Si wafer having a specific resistance of 0.01 Ω · cm and a thickness of 25 μm was prepared, and anodized in an HF solution. The anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 11 (min) Thickness of first porous Si layer : 10 (μm) Porosity: 15 (%) Current density: 25 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 3: 2 Time: 20 (min) ) Thickness of second porous Si layer: 13 (μm) Porosity: 55 (%) This substrate was oxidized in an oxygen atmosphere at 400 ° C for 1 hour. Due to this oxidation, the inner wall surface of the porous Si hole was covered with the thermal oxide film.

Thereafter, as in the case of Example 8, bonding and separation were performed.

As a result, the porous Si layer that should remain uniformly on the single-crystal Si on the second wafer after the separation was partially peeled off.

This is considered to be due to the fact that the porous Si layer having high porosity was broken without being able to withstand the stress during the step of receiving the heat.

(Comparative Example 2) The surface layer of the first single crystal Si wafer was made porous by anodizing in an HF solution.

Anodizing conditions were as follows.

Current density: 7 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 5.5 (min) Thickness of porous Si: 6 (Μm) Current density: 70 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1 Time: 0.5 (min) Thickness of porous Si: 5 (μm) This substrate was oxidized in an oxygen atmosphere at 400 ° C. for 1 hour. Due to this oxidation, the inner wall of the porous Si hole was covered with the thermal oxide film. Single-crystal Si is added to porous Si by CVD method.
3 μm epitaxial growth was performed. The growth conditions are as follows.

Source gas: SiH ₄ / H ₂ gas pressure: 1.3 Pa Temperature: 850 ° C. Growth rate: 3.3 nm / sec Further, a 200 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation.

The Si wafer having the SiO ₂ layer formed thereon was
It was superposed on and contacted with the surface of a separately prepared Si substrate (second substrate).

After that, when the separation was performed in the same manner as in Example 8, the thickness of the low-porosity first porous layer remaining on the surface of the epitaxial single-crystal Si transferred onto the separated second wafer was determined. Did not remain uniformly in the wafer plane.

In some cases, the porous Si was partially collapsed.

For this purpose, HF / HNO ₃ / CH ₃ COOH
Etching with a system-based etchant resulted in an in-plane distribution inferior to that of a commercially available Si wafer in the thickness of the epitaxial single crystal Si layer to be left with a uniform thickness.

[0246]

According to the present invention, a composite member for manufacturing a semiconductor substrate and a composite member for manufacturing a semiconductor substrate, which are less likely to break the porous region before separation and have excellent reproducibility of the separation position in the porous region. Production method.

Further, according to the present invention, the porous layer is not broken before the bonded substrate is separated, and the separated substrate can be easily and reliably separated after bonding.
A defect-free SOI substrate can be manufactured at low cost.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view for explaining a basic method for manufacturing a semiconductor substrate of the present invention.

FIG. 2 is a schematic cross-sectional view for explaining a method for manufacturing a semiconductor substrate according to one embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view illustrating a method for manufacturing a semiconductor substrate according to one embodiment of the present invention.

FIG. 4 is a schematic cross-sectional view for explaining a method for manufacturing a semiconductor substrate according to an embodiment of the present invention.

FIG. 5 is a diagram showing the relationship between the formation time and the formation current in the anodization used in the present invention.

FIG. 6 is a diagram showing the relationship between the thickness of a first porous layer and the formation current for forming a second porous layer.

FIG. 7 is a diagram showing the relationship between the thickness of a first porous layer and the porosity of a second porous layer.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Single crystal silicon substrate 11 Porous Si layer with small porosity 12 Porous Si layer with large porosity 13 Nonporous single crystal Si layer 14 Si support substrate 15 Insulating layer 20 Single crystal silicon substrate 21 Porous with small porosity Si layer 22 Porous Si layer with large porosity 23 Non-porous single crystal Si layer 24 Si support substrate 25 Insulating layer 30 Si single crystal substrate 31 Porous Si layer with small porosity 32 Porous Si layer with large porosity 33 Porous Si layer with small porosity 34 Porous Si layer with large porosity 35 Non-porous single-crystal Si layer 36 Non-porous single-crystal Si layer 37 Insulating layer 38 Insulating layer 39 Si supporting substrate

Claims (28)

[Claims] A step of preparing a first substrate having a porous region and a non-porous semiconductor layer disposed on the porous region; and attaching the non-porous semiconductor layer to a second substrate. A semiconductor comprising: a joining step; a step of separating the bonded first and second substrates in the porous region; and a step of removing the porous region remaining on the separated second substrate. In the method for manufacturing a substrate, the porous region has a first porous layer adjacent to the non-porous semiconductor layer, and a second porous layer having a higher porosity and a smaller thickness than the first porous layer. And the thickness of the second porous layer is 80% or less of the first porous layer and the porosity of the second porous layer is 30% to 60%. And a method of manufacturing a semiconductor substrate, comprising forming the porous region. 2. The method according to claim 1, wherein the separation is performed at the second porous layer. 3. The method according to claim 1, wherein the porosity of the first porous layer is less than 30%. 4. The method according to claim 1, wherein the thickness of the second porous layer is 50% or less of the thickness of the first porous layer. 5. The method according to claim 1, wherein the thickness of the second porous layer is 3 μm or less. 6. A new porous region is formed on a substrate obtained by removing a porous region remaining on the separated first substrate, and the porous region is reused as the first substrate. The method for manufacturing a semiconductor substrate according to claim 1, wherein the semiconductor substrate is bonded to a new second substrate. 7. A substrate obtained by removing a porous region remaining on the separated first substrate is reused as a second substrate, and a non-porous region disposed on the porous region and the porous layer is reused. The method for manufacturing a semiconductor substrate according to claim 1, wherein the semiconductor substrate is bonded to another new first base having a porous semiconductor. 8. The method for manufacturing a semiconductor substrate according to claim 1, wherein an insulating layer is formed on the surface of the non-porous semiconductor layer of the first base and then bonded to the second base. 9. The method for manufacturing a semiconductor substrate according to claim 1, wherein an insulating layer is formed on the surface of the second substrate and then bonded to the first substrate. 10. The method of manufacturing a semiconductor substrate according to claim 1, further comprising a step of removing the porous region remaining on the non-porous semiconductor layer of the separated second substrate. 11. The first substrate is a semiconductor wafer having a diameter of 6 inches or less, and the thickness of the second porous layer is 1 inch.
2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the thickness is from nm to 1 μm. 12. The first substrate is a semiconductor wafer having a diameter of 8 inches or more, and the thickness of the second porous layer is 1 inch.
2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the thickness is from 3 μm to 3 μm. 13. A semiconductor substrate having the second base obtained by the manufacturing method according to claim 1. 14. A first substrate, a porous region provided on the first substrate, a non-porous semiconductor layer provided on the porous region, and a non-porous semiconductor layer provided on the non-porous semiconductor layer A composite member for a semiconductor substrate, comprising: a first porous layer adjacent to the non-porous semiconductor layer; and a porous layer that is more porous than the first porous layer. A second porous layer having a high degree and a small thickness, wherein the thickness of the second porous layer is 80% or less of the thickness of the first porous layer; A composite member for a semiconductor substrate, wherein the porosity of the porous layer is 30% to 60%. 15. The porosity of the first porous layer is 30%.
15. The composite member according to claim 14, which is less than. 16. The composite member according to claim 14, wherein the thickness of the second porous layer is 50% or less of the thickness of the first porous layer. 17. The composite member according to claim 14, wherein the thickness of the second porous layer is 3 μm or less. 18. The semiconductor device according to claim 18, wherein said first substrate is a semiconductor wafer having a diameter of 6 inches or less, and said second porous layer has a thickness of 1 inch.
The composite member according to claim 14, wherein the thickness is from nm to 1 µm. 19. The method according to claim 19, wherein the first substrate is a semiconductor wafer having a diameter of 8 inches or more, and the thickness of the second porous layer is 1 inch.
The composite member according to claim 14, wherein the thickness is from 3 µm to 3 µm. 20. The method of manufacturing a semiconductor substrate according to claim 1, wherein a plurality of layers having different porosity are formed by using an anodization method and changing the formation current over time. 21. The method according to claim 20, wherein the thickness of the first porous layer is 3 μm or more. 22. The production of a semiconductor substrate according to claim 1, wherein when forming a plurality of porous layers having different porosity by an anodizing method, the porosity is changed by changing the composition of a chemical conversion solution to carry out formation. Method. 23. The method of manufacturing a semiconductor substrate according to claim 1, wherein the porosity is changed by individually adding at least the components of the chemical conversion solution to the chemical formation solution during the chemical conversion when changing the composition of the chemical formation solution. 24. The method according to claim 1, wherein, when a plurality of porous layers having different porosity are formed by anodization, the porosity is changed by performing the formation while changing both the chemical composition and the formation current. A method for manufacturing a semiconductor substrate. 25. A process in which the formation current is stopped once during the formation, the substrate is pulled out of the formation solution, the composition of the formation solution is changed, or the setting of the formation current is changed. The method for manufacturing a semiconductor substrate according to claim 1, wherein the chemical formation is restarted by the following. 26. The in-plane variation of the thickness of the porous layer adjacent to the non-porous semiconductor layer whose porosity is smaller than that of the other region is 35.
2. The method of manufacturing a semiconductor substrate according to claim 1, wherein 27. The method according to claim 1, wherein the thickness of the first porous layer is 5 μm or more, and the thickness of the second porous layer is 3 μm or less. 28. The composite member according to claim 14, wherein the thickness of the first porous layer is 5 microns or more, and the thickness of the second porous layer is 3 microns or less.