JPH10284642A - Highly heat dissipating ic package substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a highly reliable IC package substrate and an IC package having superior heat dissipating property, electrical characteristics, reliability in electrical connection, configuration preciseness, heat-resistant property and sealing property, in which materials can be mounted on a substrate reliably. SOLUTION: A copper or copper alloy plate having superior thermal conductivity and electrical conducting property is used for the base material 20 of an IC package substrate. A bonding terminal 24 to be used for electrical connection with an IC-chip terminal through an electric insulating film 22, a wiring circuit 24 and an external connection terminal 24b are formed on the substrate 20, the center part of the base material 20 is removed by machining, and a cavity 26 to be used for mounting and housing the IC chip is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention An IC package having a cavity for accommodating various IC chips therein and having a metal base material having excellent heat dissipation, electrical characteristics, and reliability.
The present invention relates to a C package and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, the amount of heat generated by ICs has been rapidly increased, the capacity has been increased, and the functions have been increased, and the operation of the ICs has been difficult to guarantee without taking measures against the heat generation. I have. To cope with this, an IC package using a metal plate as a base has been studied instead of a conventional IC package using a plastic material as a base.

[0003] As an IC package using a metal plate as a substrate, a cavity for mounting an IC chip is formed in the center of an aluminum plate, and a wiring circuit is formed on the outer peripheral surface thereof through an electrical insulating layer. A copper-based metal plate having a wiring circuit formed on the surface of a copper plate via an electrical insulating film and drawing the cavity, or a copper-based metal plate 2 having a wiring circuit formed on the surface in the same manner. There is one in which cavities are formed by laminating pieces. These I
Since the C package mounts the IC chip directly on the metal plate, it has an advantage that it has excellent heat dissipation and can provide a reliable product having excellent electrical characteristics.

[0004]

However, the IC package substrate using the aluminum plate has several problems. In other words, aluminum has a feature that a film of alumina which is very easily oxidized and does not conduct electricity is formed on the surface. When this aluminum plate is used as a ground circuit layer for electrical connection, the reliability of the plating connection becomes a problem, so surface treatment such as zincate treatment or electroless Ni plating is applied in advance to prevent oxidation. It is difficult to effectively use the aluminum plate as the ground circuit layer due to the low reliability of the device, and the cost increases.Also, the aluminum material has a larger coefficient of thermal expansion than the IC chip using Si as a main material.
As the size of an IC chip becomes larger, there is a problem that a mismatch occurs due to a difference in thermal expansion between the aluminum plate and the IC chip. Also, copper metal plate is drawn,
An IC package substrate that forms a cavity for mounting an IC chip has several problems, although it has excellent productivity and reliability of electrical connection. In other words, since this drawing must be performed after forming a wiring circuit on the surface of the metal plate, processing distortion to the formed wiring circuit is unavoidable, and deformation or damage may occur if processing conditions are inappropriate. There is. For this reason, there is a problem that it is extremely difficult to reliably manufacture a multi-layer IC package substrate. Further, since the cavity for mounting the IC is formed by drawing, the sidewall of the cavity is necessarily inclined. As a result, since the distance between the terminal of the IC chip and the bonding terminal on the substrate becomes large, the bonding wire becomes long, and there is a problem that the reliability of the connection is reduced. Furthermore, an IC package substrate in which a cavity is formed by bonding two copper-based metal plates together has problems in reliability of bonding by an adhesive, positioning accuracy, reliability of electrical connection of through holes, and the like. The present invention has been made to solve these problems, and an object of the present invention is to machine a cavity for mounting an IC chip in the center of a copper or copper alloy plate as a base material. The base material is used as a ground circuit layer or a power supply circuit layer.
An IC package substrate and an IC package having excellent electrical connection reliability, electrical characteristics, heat dissipation, shape accuracy, and encapsulation by a method of forming a layer or a wiring circuit of two or more layers, and a method of manufacturing the same. It is something to offer.

[0005]

The present invention includes the following means for achieving the above-mentioned object. That is, a terminal and a wiring circuit for electrically connecting an IC chip and an external mounting substrate are formed on one surface of a substrate having a metal plate as a base material via an electrically insulating layer, and In the IC package substrate provided with a cavity portion for mounting and housing an IC chip in the center of the substrate, the base material is made of copper or a copper alloy, and the terminal and the terminal are interposed through the electrically insulating film formed thereon. After the wiring circuit is formed, the copper or copper alloy base material is removed by machining to form the wiring circuit.
Further, an electric circuit is provided in which the wiring circuit and the external connection terminal and the copper or copper alloy of the base material are connected by a through hole penetrating the insulating layer, and the base material is used as a ground circuit layer or a power supply circuit layer. It is characterized by forming. In addition, instead of a circuit connected to the copper or copper alloy base material which is a ground circuit layer or a power supply circuit layer with a through hole penetrating the electrical insulating film, the outer peripheral surface of the cavity is torn. The base material surface is exposed as it is without insulation, or the four sides of the outer edge are processed shallowly to form a ground circuit connection terminal or a power supply circuit connection terminal directly on these processed surfaces. It is characterized by. Further, two or more wiring circuits are formed on the base material serving as a ground circuit layer or a power supply circuit layer via an electrical insulating film. Further, an electrical insulating coating is formed on a part or all of the surface opposite to the surface on which the wiring circuit and the terminals are formed. A dam is formed on the outer peripheral surface of the cavity so as to surround the outside of the bonding terminal for electrically connecting to the IC chip. Further, an IC chip is bonded and mounted in the cavity portion, and the terminal of the IC chip and the bonding terminal are connected by bonding with a bonding wire, and then the cavity is sealed by potting or transfer molding.

[0006]

The IC package according to the present invention uses a copper or copper alloy plate as a base material of the package, forms terminals and wiring circuits on the base material via an electrical insulating film, and forms a central portion of the substrate. A cavity for mounting an IC chip is formed by machining. Therefore, by using copper or copper alloy for the substrate of the substrate,
It is excellent in heat dissipation and can be plated as it is to provide excellent electrical connection without special anti-oxidation coating treatment like aluminum. In addition, since the substrate having excellent electric conductivity and having a large electric capacity can be used as the ground circuit layer or the power supply circuit layer, the electric characteristic having the circuit layer of the potential level which is stable with respect to the change in the amount of current is obtained. An excellent IC package substrate can be obtained.
Further, since the cavity for accommodating and mounting the IC chip is formed by removing the base material by machining, it is possible to obtain an IC package substrate having a cavity having excellent shape accuracy and to form an IC package substrate on the substrate in advance. No matter how many layers of the electrically insulating coating, terminals and wiring circuits are formed, they are not deformed or damaged by processing at all, so that an extremely reliable IC package substrate can be obtained. Since the side wall of the cavity can be formed at right angles to the surface of the substrate, the length of the bonding wire connecting the terminal of the IC chip mounted in the cavity and the bonding terminal on the substrate can be shortened. An IC package substrate having excellent connection reliability can be obtained. In addition, an IC package substrate having excellent moisture resistance can be obtained because the substrate is made of metal copper or copper alloy and there is no through hole penetrating the substrate. Therefore, the IC chip mounted in the cavity of the substrate is suitably sealed by potting or transfer molding, and has excellent reliability of heat dissipation, electrical characteristics, electrical connectivity, shape accuracy, and moisture resistance. IC package with high reliability can be provided.

【Example】

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. FIG. 1 shows a configuration of an embodiment of an IC package substrate according to the present invention, and an IC package in which an IC chip 10 is mounted and housed on the IC package substrate and solder balls for external connection are formed. A copper or copper alloy plate is used as the base material 20 of the IC package substrate of the embodiment, and the bonding terminals 24a, the wiring circuit 24, and the external connection terminals 24b are formed on the base material 20 via the electric insulating film 22. In addition, the substrate 20 is removed by machining to form a cavity 26 for mounting and storing an IC chip.

FIG. 2 shows an enlarged view of the structure of the base 20, the electrically insulating film 22, the wiring circuit 24 and the like in the above embodiment. The electric insulating film 22 is formed on the substrate 20 by the IC chip 10.
Is formed on the outer surface of the cavity 26 for mounting the
The bonding terminal 24a, the wiring circuit 24, and the external connection terminal 24b are formed on the surface of the electrically insulating film 22 by adhesion. Reference numeral 28 denotes a solder ball connected and formed on the external connection terminal 24b formed in the outer peripheral area of the base material 20. 50 is for mounting an IC chip in the cavity 26,
After electrically connecting the chip terminals and the bonding terminals 24a, when sealing the cavity 26 with a resin material, the resin is prevented from flowing to the portion where the external connection terminals are arranged and formed. This is a dam for reducing the thickness of the entire IC package. Reference numeral 23a denotes a bonding terminal and the substrate 20 which is a ground circuit layer or a power supply circuit layer, and reference numeral 23c denotes a through hole for electrically connecting the substrate 20 to the external connection terminal 24b.

FIG. 3 shows a top view of the IC package substrate of the above embodiment. The IC package has a planar shape having a substantially square outer shape, and a cavity 26 for mounting and housing the IC chip 10 is formed in the center thereof in a concave shape. The bonding terminal 24a, the wiring circuit 24, and the external connection terminal 24b are arranged so as to surround the cavity 26.
6 are formed radially from the peripheral edge toward the outer edge of the substrate 20. Although the terminal of the IC chip and the bonding terminal 24a are connected by a bonding wire, they may be connected by using a TAB tape instead of the bonding wire. The bottom surface of the cavity 26 is machined into a flat surface as shown in FIGS.

As a material of the substrate 20, pure copper is preferable in terms of heat dissipation and electrical characteristics, but a copper alloy having higher strength is effective in terms of handling and prevention of deformation due to an increase in size. . In the examples shown in FIGS. 1 and 2, a pure copper plate was used as the substrate 20. The electrical insulation film 22 is not particularly limited as long as it is used for a normal copper-clad laminate and has a predetermined electrical insulation property. A polyimide resin, a heat-resistant glass epoxy resin, or the like having excellent heat resistance is suitable.

FIG. 4 shows an embodiment in which a wiring circuit is formed on a substrate 20 and an IC package substrate is manufactured by machining. That is, FIG. 4-a shows a copper or copper alloy plate material serving as a base material of the IC package,
A pure copper plate having a thickness of mm was used. A copper-clad laminate was thermocompression-bonded to the substrate 20 to form a wiring recess (FIG. 4-b).
The thickness of the copper foil of this laminate is 18 μm and the electrical insulation coating 22
The resin material has a thickness of 0.1 mm (7) FR-4
It was used. When a thin resin such as a polyimide film is used as the resin material, sufficient electrical insulation can be ensured, and the substrate can be prevented from being bent due to a difference in thermal expansion coefficient between the base material 20 and the electrical insulating film 22. This is an advantage.

Next, after drilling a plurality of through holes 23a and 23c which penetrate the copper foil 42 and the electrically insulating coating 22 and reach the base material 20 at locations where connection with the ground circuit layer is to be made. Then, copper plating is applied to the entire surface of the wiring circuit 24 forming portion and the inner walls of the through holes 23a and 23c. Next, the copper foil 42 and the copper plating layer 42a are etched to form the bonding terminals 24a, the wiring circuit 24, and the external connection terminals 24b (FIG. 4C). Thereafter, the central portion of the substrate is machined using a cutting tool such as an end mill to form a cavity 26 having a depth of 0.3 mm for mounting and storing the IC chip 10. Further, in order to impart wire bonding properties to the bonding terminals 24a and solder adhesion properties to the external connection terminals 24b, and to form the cavities 2 cut out in the above process.
Then, gold plating is applied to prevent the oxidation and discoloration of No. 6, and then the wiring circuit 24 is externally protected with a protective coating (solder resist) 29 except for the terminals 24a and 24b and the cavity 26. Thereafter, a dam 50 is formed on the outer peripheral portion of the terminal 24a as necessary. Finally, the external connection terminal 24b
A solder ball 28 is formed thereon to manufacture an IC package substrate of the present invention (FIG. 4D). In some products, the solder balls 28 are not attached at the package substrate stage,
After the C chip is mounted, the solder ball 28 may be attached. Further, gold bumps, polymer bumps, or the like may be used instead of the solder balls 28.

In the above embodiment, the wiring circuit 24
As a method of forming the copper foil, the copper foil 42 was stuck on the base material 20 by thermocompression bonding the copper-clad laminate onto the base material 20, but instead of this, a material having an electrical insulating property was placed on the base material. It is also possible to form an electrical insulating film by coating and then form an electrical conductor layer thereon by ion plating, sputtering, plating or the like.

FIG. 5 shows a second embodiment of the IC package substrate.
2, this surface is entirely or partially gold-plated and IC
A structure in which the substrate 20 is connected to the ground circuit layer or the power supply circuit layer 20 without using the through holes 23a as the chip bonding terminals 32a,
The wiring circuit 24 and the base material 20 are provided on the outer peripheral portion of the terminal 32a.
Hole 2 for electrically connecting the wiring circuit 24 to the
This is an IC package substrate on which 3c is formed. In this IC package substrate, the exposed surface 32 of the substrate 20 is directly connected to the ground circuit connection or power supply concave circuit connection bonding terminal 3.
By setting it to 2a, the number of wiring circuits 24 can be reduced, and the ground circuit or the power supply circuit of the IC chip 10 can be easily connected.

FIG. 6 shows a third embodiment of the IC package substrate, in which through holes 23a and 23b penetrating through the electrically insulating layers 22a and 22b are provided so as to surround four sides of the peripheral portion of the cavity 26 doubly. Ground circuit connection and power supply circuit connection bonding terminals 32a and 32b connected to the substrate 20 as the circuit layer and the first wiring circuit layer as the power supply circuit layer are formed. Wiring circuit 24 is electrically insulating coating 22a,
22b are formed in two steps. With such a configuration, the base 20 can be a ground circuit layer, the first stage of the wiring circuit 24 can be a power supply circuit layer, and the second stage can be a signal circuit layer. Conversely, the substrate 20 may be a power supply circuit layer, and the first stage may be a ground circuit layer. In this embodiment, the bonding terminals 32a and 32b for connecting the ground circuit and the power supply circuit are connected to the respective wiring circuit layers through the through holes 23a and 23b. However, as shown in the third embodiment. The exposed surface of the base material 20 and the leading end of the first-stage wiring circuit may be used as bonding terminals for ground circuit connection and power supply circuit connection, respectively.

In this way, the wiring circuit 24 is formed in a multilayer
When the solder balls 28 are formed on the external connection terminals 24b in the C package substrate, the solder balls 28 are usually formed on the wiring circuit 24 at a position outside the through hole 23b in the surface layer. However, in the IC package substrate of this embodiment, Since the electrically insulating coating can be formed extremely thin, it is possible to form a solder ball immediately above the blind through hole. The electrical connection between the wiring circuit layers is made by the wiring circuit 24.
And machining the electrical insulation coating 22 with a drill or
After drilling and penetrating by laser processing, through holes 23b, 2
3c.

In the above embodiment, the IC package substrate in which the electric insulating film 22 is formed only on one side of the substrate 20 has been described.
When the substrate 20 is adhered and formed by thermocompression bonding or adhesive curing, the substrate 20 may be pulled and bent by the heat shrinkage. For this reason, by forming an electrical insulating coating on all or a part of the opposite surface in the same manner, the bending stress due to the tension is canceled out by each other, so that an IC package substrate having more excellent shape accuracy can be obtained. is there.

The embodiment according to the present invention has been described above.
Further, by disposing the radiation fins on the surface opposite to the base material 20 on which the wiring circuit 24 is formed, the heat dissipation can be further enhanced. Also, as a method of forming a cavity for mounting and storing an IC chip, ultrasonic processing or electric discharge processing may be used.

[0019]

According to the IC package substrate of the present invention, a copper or copper alloy plate is used as a base material, and a wiring circuit is formed on the surface of the IC package substrate via an electrical insulating film. Are electrically connected by through holes, and the base material is used as a ground circuit layer or a power supply circuit layer,
Heat dissipation, electrical characteristics, reliability of electrical connection, shape accuracy,
It is possible to provide at low cost a product having excellent moisture resistance and sealing properties, and having a structure having a cavity for accommodating and mounting an IC chip. In addition, a highly reliable wiring circuit of the IC package substrate is formed in multiple layers. Products can be manufactured easily with good accuracy.

[0020]

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a configuration of an IC package substrate and an IC package according to the present invention.

FIG. 2 is an explanatory diagram showing a configuration of an electrical insulating film and a wiring circuit formed on a base material.

FIG. 3 is an explanatory view showing a planar arrangement of a cavity for mounting and housing an IC chip, a wiring circuit, and the like.

FIG. 4 is an explanatory view showing one embodiment of a method of manufacturing an IC package.

FIG. 5 is an explanatory view showing a second embodiment of the IC package substrate.

FIG. 6 is an explanatory diagram showing a third embodiment of the IC package substrate.

FIG. 7 is an explanatory view showing a conventional IC package substrate and an IC package using an aluminum plate as a base material.

FIG. 8 is an explanatory view showing an IC package substrate and an IC package manufactured by drawing a copper-based metal plate as a base material and drawing the same.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 IC chip 20 Base material 22 Electrical insulating film 23a through hole 23b through hole 23c through hole 24 Wiring circuit 24a bonding terminal 24b external connection terminal 26 cavity 28 solder ball 29 protective film (solder resist) 30 bonding surface 32 exposed surface 32a Bonding terminal for ground circuit connection or power supply circuit connection 32b Bonding terminal for ground circuit connection or power supply circuit connection 42 Copper foil 50 dam

Claims (6)

[Claims] A cavity for accommodating an IC chip formed by machining in a central portion of a plate-like copper or copper alloy substrate having a square or rectangular shape, and an outer peripheral portion of the cavity. After applying an electrically insulating coating on the surface,
A plurality of bonding terminals for making electrical connection with the terminals of the C chip and a wiring circuit connected thereto, and a plurality of external connection terminals connected to the wiring circuit for making an electrical connection with an external mounting substrate or a plurality of external connection terminals A metal ball is formed and arranged, and a protective coating (solder resist) is applied and covered except for the bonding terminal and the external connection terminal or the metal ball, and the copper or copper is penetrated through the electrical insulating layer. The wiring circuit and the external connection terminal are electrically connected to each other through through holes connected to the alloy base material to form a ground circuit layer or a power supply circuit layer. Package substrate with excellent electrical characteristics and electrical connection reliability. 2. An outer peripheral surface of the cavity instead of a circuit connected to the copper or copper alloy substrate which is a ground circuit layer or a power supply circuit layer by a through hole penetrating the electric insulating film. The base surface is exposed as it is without being insulated in the form of a tongue, or the four sides of the outer edge are subjected to shallow step processing, and a ground circuit connection terminal or a power supply circuit connection terminal is directly formed on these processed surfaces. 2. The IC package substrate according to claim 1, wherein the IC package substrate has excellent electrical characteristics and electrical connection reliability. 3. The IC package substrate according to claim 1, wherein wiring circuits including the ground circuit layer or the power supply circuit layer are formed in three or more layers. 4. An excellent shape accuracy characterized in that an electrically insulating coating is formed on all or a part of the surface of the copper or copper alloy base material opposite to the surface on which the cavity is formed. The IC package substrate according to claim 1, 2 or 3. 5. A dam is provided so as to surround the outside of the bonding terminal, and a resin material is injected into the cavity to seal an IC chip bonded and mounted in the cavity. 2. The structure as claimed in claim 1, wherein the structure is a flow stop, and the thickness of the IC package can be reduced.
5. The IC package substrate according to 2, 3, and 4. 6. The IC package according to claim 1, 2, 3, 4 or 5, wherein the IC is provided in the cavity formed in the center of the IC package substrate.
After the chip is bonded and mounted, the terminals of the IC chip and the bonding terminals on the IC package substrate are connected by bonding wires, and then a resin material is injected into the cavity to connect the IC chip, the wires and the bonding terminals. Sealed IC package with excellent heat dissipation, electrical characteristics and electrical connection reliability.