JPH10256503A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor device having satisfactory electric characteristics by obtaining a structure applicable to microminaturization of an element, and suppressing reaction of metal wiring connected to one electrode of a capacitor with Pt electrode in heat treatment. SOLUTION: A structure that a barrier layer 10a, stopper layer 10b and a lose contact layer 10c are laminated on a lower electrode 6 of a capacitor 15b is formed to incorporate sufficient barrier characteristics so that an upper electrode 9 of the capacitor 15b is not reacted with the wiring formed thereon even in the case of heat treating. Overetching can be suppressed in opening a contact hole for forming an embedding contact of Al wiring 14, and further adhesion of the electrode 9 of the capacitor 15b with an interlayer insulating film 11 laminated thereon can be ensured.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for improving a connection state between a capacitor formed in a semiconductor device and a plug (contact) connected to one electrode of the capacitor. The present invention relates to a structure of a semiconductor device having good electric characteristics and a manufacturing method for obtaining the semiconductor device.

[0002]

2. Description of the Related Art Next, a conventional technique disclosed in Japanese Patent Laid-Open No. 5-90 is disclosed.
An outline of the invention disclosed in Japanese Patent Publication No. 606 will be described.

FIG. 10 is a cross-sectional view of a semiconductor device according to the invention disclosed in Japanese Patent Application Laid-Open No. 5-90606, in which a MOS transistor is formed on a region to be an active region on a semiconductor substrate 101. (LOCal Oxidation of Silicon)
A capacitor is formed on a region where the isolation film 102 is formed) via a predetermined insulating film. This MOS transistor has source / drain regions 103a and 103b on a surface of a semiconductor substrate 101 with a region serving as a channel interposed therebetween.
Is formed, and a gate electrode 105 is formed over a region serving as a channel with a gate insulating film 104 interposed therebetween.

A lower electrode 107 of the capacitor is formed on the LOCOS isolation film 102 with an interlayer insulating film 106 interposed therebetween, and the ferroelectric film 10 is formed so as to cover the lower electrode 107.
8 are stacked. An upper electrode 109 is formed on the surface of the ferroelectric film 108 at a position facing the lower electrode 107, and a metal film 110 made of Ti and TiN is formed on the upper electrode 109. Also, the lower electrode 10
7 and the upper electrode 109 are both made of Pt.

On the interlayer insulating film 111 laminated on the entire surface of the semiconductor substrate 101 including the metal film 110, Al wirings 112 and 113 electrically connected to the source / drain regions 103a and 103b are formed. Have been.
The Al wiring 113 is connected to one side of the metal film 110 via a contact 113a formed in the interlayer insulating film 111, and connects the upper electrode 109 of the capacitor to the source / drain region 103b of the MOS transistor.

In the semiconductor device thus formed, the upper electrode 109 constituting the capacitor and the Al wiring 1
13, the metal film 110 made of TiN or Ti is provided.
Even if the heat treatment is performed at a high temperature, Pt constituting the upper electrode 109 reacts with Al of the Al wiring 113, and a highly reliable semiconductor device can be obtained without deteriorating the film quality of the upper electrode 109. did it.

However, in the semiconductor device according to the prior art, the Al wiring 113 for connecting the source / drain region 103b and the upper electrode 109 of the capacitor is arranged on the second interlayer insulating film 111. Therefore, the wiring resistance of the Al wiring 113 inevitably increases,
Further, since the size of the semiconductor device in the vertical direction has been increased, there has been a problem in terms of miniaturization of elements. Also M
Since the OS transistor and the capacitor have to be arranged at different positions on the surface of the semiconductor substrate 101, there is a limit to the miniaturization of the dimensions in the lateral direction (horizontal direction with respect to one main surface of the semiconductor substrate), which is a problem. I was

[0008]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and has a structure adapted to miniaturization of an element, and a metal wiring connected to one electrode of a capacitor. It is an object of the present invention to suppress a reaction at the time of heat treatment between the Pt electrode and the Pt electrode, to obtain a semiconductor device having good electric characteristics, and to obtain a manufacturing method thereof.

[0009]

According to a first aspect of the present invention, there is provided a semiconductor device formed on a semiconductor substrate and having a high dielectric film or a ferroelectric film between opposing electrodes composed of a substance containing Pt as a main component. A barrier layer, a stopper layer, and an adhesion layer are sequentially stacked at least between one of the opposed electrodes and an Al wiring electrically connected to the one electrode; In the semiconductor device in which the formed conductive film is arranged and formed, the barrier layer is made of Ti
System, TiSi _x system, Ta system, TaSi _x system, W system, WSi
_x- based simple substance and nitride, oxide, oxynitride or R
uO _x (0 ≦ x ≦ 2),
The stopper _{layer, Pt, Si, Pt (1} -x) Si x (0 <
x <1), a single layer of one substance selected from RuO _x (0 ≦ x ≦ 2) or a laminate of at least two substances selected from the above substances,
It said adhesive layer, Ti-based, TiSi _x system, Ta system, TaS
i _x system, W-based, WSi _x system alone and nitrides, are those composed of either Si alone.

According to a second aspect of the present invention, a high dielectric film or a ferroelectric film is disposed between opposed electrodes formed on a semiconductor substrate and made of a substance containing Pt as a main component. And a conductive film in which a barrier layer and a stopper layer are sequentially laminated at least between one of the counter electrodes and an Al wiring electrically connected to the one electrode. in the formed semiconductor device, the barrier layer, Ti-based, TiSi _x system, T
a system, TaSi _x type, W type, WSi _x system alone and nitrides, oxides, oxynitrides, or RuO _x (0 ≦ _x ≦
2) it is composed of any of the above stopper layer is, Si, Pt (1-x ) Si x (0 either a single layer material of the <x <1), or from among the above substances It is composed of a laminate of at least two selected substances.

Further, in a semiconductor device according to a third aspect of the present invention, a high dielectric film or a ferroelectric film is disposed between opposed electrodes formed on a semiconductor substrate and made of a substance containing Pt as a main component. A Ti-based, TiSi-based capacitor between at least one of the opposing electrodes having a parallel area wider than the other electrode and an Al wiring electrically connected to the one electrode. _x system, Ta system, T
aSi _x system, W-based, WSi _x system alone and nitrides, oxides, is to place a barrier layer composed of any of the oxynitride or _{RuO x (0 ≦ x ≦ 2} ).

Further, in the semiconductor device according to a fourth aspect of the present invention, a high dielectric film or a ferroelectric film is disposed between opposed electrodes formed on a semiconductor substrate and made of a substance containing Pt as a main component. And an adhesion layer made of Si alone is arranged between at least one of the opposite electrodes and an Al wiring electrically connected to the one electrode.

Further, in a semiconductor device according to a fifth aspect of the present invention, a high dielectric film or a ferroelectric film is disposed between opposed electrodes formed on a semiconductor substrate and composed of a substance containing Pt as a main component. And a conductive film in which a stopper layer and an adhesion layer are sequentially laminated between at least one of the counter electrodes and an Al wiring electrically connected to the one electrode. In the formed semiconductor device, the stopper layer is made of RuO _x (0 ≦ x ≦ 2).
Consists, the adhesive layer, Ti-based, TiSi _x system,
Ta-based, TaSi _x type, W type, WSi _x system alone and nitrides, are those composed of either Si alone.

According to a sixth aspect of the present invention, there is provided a semiconductor device according to the first or second aspect.
The conductive film is a DRAM (Dynamic Random Access Memory)
One electrode of a capacitor constituting a memory cell is electrically connected to the one electrode, and is interposed at a connection portion between an Al wiring to which a GND potential is supplied and which is electrically connected to the one electrode.

According to a seventh aspect of the present invention, in addition to the means according to the first, second and fifth aspects, the conductive film is connected to one electrode of a capacitor constituting a DRAM memory cell. , MOS constituting the memory cell
(Metal Oxide Semiconductor) This is interposed in a connection portion with an Al wiring to which a potential of one source / drain electrode of a transistor is supplied.

In a semiconductor device according to an eighth aspect of the present invention, in addition to the means corresponding to the first and second aspects, the stopper layer and the adhesion layer constituting the conductive film are each made of Pt and Si. Or when the stopper layer is composed of a plurality of layers in which Si is stacked on Pt,
After forming the Si on the Pt, the heat treatment applied, the part or all of Pt and the Si reacts _{Pt (1-x) Si x} (0 <x <1) , and the above-mentioned conductive film and it serves as a film containing the _{Pt (1-x) Si x} (0 <x <1).

Further, according to a ninth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
A step of stacking a conductive film in which a barrier layer, a stopper layer, and an adhesion layer are sequentially stacked; and selectively performing anisotropic etching on an interlayer insulating film stacked on the conductive film, Forming a contact hole partially exposed, forming a contact by filling at least the inner wall of the contact hole with Al via a barrier metal layer, and forming a contact on the interlayer insulating film at the time of forming the contact; Patterning on the Al
Forming an Al wiring electrically connected to the one electrode, wherein the barrier layer constituting the conductive film is formed of Ti
System, TiSi _x system, Ta system, TaSi _x system, W system, WSi
_x- based simple substance and nitride, oxide, oxynitride or R
constructed from any of _{uO x (0 ≦ x ≦ 2} ), the stopper layer is _{Pt, Si, Pt (1-} x) Si x (0 <x <
1) a single layer made of one substance selected from RuO _x (0 ≦ x ≦ 2) or a laminate of at least two substances selected from the above substances; TiSi _x system, Ta system, TaSi _x system, W
System, WSi _x system alone and nitrides, and constitutes from either Si alone.

According to a tenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: forming, on one electrode of a capacitor formed on a semiconductor substrate and comprising a substance containing Pt as a main component;
A step of stacking a conductive film in which a stopper layer and an adhesion layer are sequentially stacked, and selectively performing anisotropic etching on an interlayer insulating film stacked on the conductive film, so that at least a part of the conductive film is formed. A step of forming a contact hole in an exposed state, a step of filling at least the inner wall of the contact hole with Al via a barrier metal layer to form a contact, and a step of forming Al on the interlayer insulating film at the time of forming the contact. Patterning to form an Al wiring electrically connected to the one electrode, wherein the stopper layer of the conductive film is made of RuO.
_x (0 ≦ x ≦ 2), and the adhesion layer is made of Ti,
i Si _x system, Ta system, TaSi _x type, W type, simple and nitrides of WSi _x system, and constitutes from either Si alone.

Further, in the method of manufacturing a semiconductor device according to the present invention, a barrier layer and a stopper layer may be formed on one electrode of a capacitor formed on a semiconductor substrate and made of a substance containing Pt as a main component. A step of laminating a sequentially laminated conductive film, selectively performing anisotropic etching on the interlayer insulating film laminated on the conductive film, and forming a contact hole in which at least a part of the conductive film is exposed; Forming a contact, at least filling the inner wall of the contact hole with Al via a barrier metal layer to form a contact, performing patterning on the Al laminated on the interlayer insulating film at the time of forming the contact, Forming an Al wiring electrically connected to the one electrode, wherein the barrier layer of the conductive film is Ti
System, TiSi _x system, Ta system, TaSi _x system, W system, WSi
_x- based simple substance and nitride, oxide, oxynitride or R
constructed from any of _{uO x (0 ≦ x ≦ 2} ), the stopper layer is _{Si, Pt (1-x)} Si x Single comprising a single material selected from among (0 <x <1) It is composed of a layer or a laminate of at least two of the above substances selected from the above substances.

In the method of manufacturing a semiconductor device according to the present invention, in addition to the measures corresponding to claims 9 and 11, the stopper layer and the adhesion layer constituting the conductive film may be formed of Pt and Si, respectively. When the stopper layer is composed of a plurality of layers in which Si is laminated on Pt,
After the above-mentioned Si is formed, a part or all of the above-mentioned Pt and the above-mentioned Si react with each other by heat treatment to be applied to form Pt.
_{(1-x) Si x (} 0 <x <1) , and the above conductive film is the P
t _(1-x) Si _x in which a film containing a (0 <x <1).

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. Embodiment 1 of the present invention will be described. FIG. 1A shows a cross section of a semiconductor device according to the present invention. This semiconductor device is an invention applicable to, for example, a memory cell portion of a DRAM. One electrode of a capacitor constituting the memory cell is connected to a G electrode in contact with the electrode.
The main object of the present invention is to prevent the components at the junction with the Al wiring connected to the ND potential from reacting with each other even by heating during the subsequent heat treatment and deteriorating the components constituting the capacitor or the wiring. is there.

In FIG. 1A, reference numeral 1 denotes a semiconductor substrate,
Reference numeral 2 denotes an interlayer insulating film laminated on the surface of the semiconductor substrate 1, and reference numeral 3 denotes an impurity region selectively formed on the surface of the semiconductor substrate 1. The impurity region 3 corresponds to, for example, a source / drain region of a MOS transistor. I do. Further, 4 is a contact formed in the interlayer insulating film 2 so as to contact the impurity region 3, 5 is a diffusion preventing film laminated on the interlayer insulating film 2 so as to be in contact with the upper part of the contact 4, and 6 is A lower electrode 7 which is a component of the capacitor and which is formed in contact with the upper surface of the diffusion prevention film 5 and is made of a substance containing Pt as a main component; FIG.

Reference numeral 8 denotes a dielectric film made of either a ferroelectric or a high dielectric film constituting a capacitor selectively laminated on the interlayer insulating film 2 including the surface of the lower electrode 6, and 9 denotes a capacitor. And an upper electrode made of a substance containing Pt as a main component, which is laminated on the surface of the dielectric film 8. Further, on the surface of the upper electrode 9,
The conductive film 10 which is a feature of the present invention is stacked.

Further, reference numeral 11 denotes an interlayer insulating film laminated on the surface of the interlayer insulating film 2 including the surface of the conductive film 10, and reference numeral 12 denotes a part of the Al wiring 14 formed on the interlayer insulating film 11. 2 shows an Al contact formed in the interlayer insulating film 11 so as to be in contact with the conductive film 10, and a barrier metal layer 13 is formed at least in a portion in contact with the conductive film 10.

FIG. 1B is an enlarged view of a junction A between the Al contact 12 in FIG. 1A and the conductive film 10 formed on the upper wiring 9 of the capacitor. As shown in FIG. 1B, the conductive film 10 is a film having a three-layer structure, of which 10a is a barrier layer for suppressing a reaction during heat treatment between the Al wiring 14 and the upper electrode 9, and 10b is a heat treatment. Sometimes Al wiring 1
4 and a stopper film serving as an over-etching stopper when the upper electrode 9 reacts with the sacrificial reaction film.
Reference numeral 0c indicates an adhesion layer for improving the adhesion between the conductive film 10 and the interlayer insulating film 22, respectively.

The barrier layer 10a is made of Ti, TiS
i _x system, Ta system, TaSi _x type, W type, WSi _x system alone and nitrides, oxides, oxynitrides, or RuO _x (0
≦ x ≦ 2), and the stopper layer 10b is made of Pt, Si, Pt
_{(1-x) Si x (} 0 <x <1), PtSi x (0 ≦ x ≦
2) and RuO _x (0 ≦ x ≦ 2) (x is a numerical value determined by a mutual relationship with another layer for any substance), and an adhesive layer 10c is, Ti-based, TiSi _x system, Ta system, T
aSi _x system, W-based, WSi _x system alone and nitrides, are those composed of either Si alone.

In addition, the barrier metal layer 13 constituting the Al contact 12 is a TiN / Ti (laminated structure) film or TiSi _x N _y (x and y are numerical values determined by mutual relations with other layers). )).

FIG. 1A is a cross-sectional view of a part of one memory cell of the semiconductor device.
The upper electrode 9 of the capacitor has a structure extending in the horizontal direction, and one upper electrode is formed for the lower electrodes of a plurality of capacitors. Therefore, by forming at least one Al wiring 14a formed so as to be in contact with the upper electrode 10, it is possible to set one electrode of a plurality of capacitors having the upper electrode 9 as a component to the GND potential. The Al contact 12 can be connected to any part of the upper electrode 9.

FIG. 1C is a diagram showing to which part of the memory cell the connection between the capacitor and the Al wiring in FIG. 1A is adapted. As shown in FIG.
The AM memory cell has one MOS transistor 15 having a gate electrode connected to a word line (WL) and one source / drain electrode connected to a bit line (BL).
a, one electrode is connected to the GND potential point, and the opposite electrode is connected to the other source / drain electrode of the MOS transistor 15a. Of this structure, capacitor 1
By applying the technique of the present invention to the connection portion (location where the invention is applied) between the electrode on the GND potential side of 5b and the Al wiring, good electrical characteristics can be obtained.

Next, a method of manufacturing the semiconductor device shown in FIGS. 1A and 1B will be described with reference to FIGS. First, as shown in FIG. 2A, an impurity is implanted or diffused into a region to be a memory cell on the surface of the semiconductor substrate 1 by ion implantation or diffusion to form an impurity region 3. Next, the SiO to be the interlayer insulating film 2
₂ is laminated on a substrate to be processed (an unfinished semiconductor device is hereinafter referred to as a substrate to be processed) so as to have a thickness of about 4000 °.

Further, the interlayer insulating film 2 on the impurity region 3 is selectively etched to form a contact hole so that the impurity region 3 is at least partially exposed.
The contact 4 is formed by burying a conductive material in the contact hole. Next, T which is in contact with the surface of the contact 4 and serves as the diffusion prevention film 5 on the surface of the interlayer insulating film 2 is formed.
500-1000 barrier metal using iN-based material
積 層 is deposited so as to have a thickness of about Å, and a single electrode of Pt or a conductive film containing Pt as a main component to be the lower electrode 6 of the capacitor is formed on the surface of the diffusion preventing film 5 by a sputtering method to about 500 to 2,000 Å. Are laminated so as to have a thickness of.

Next, of the conductive film mainly composed of Pt to be the lower electrode 6 and the conductive film to be the diffusion preventing film 5, a predetermined region including a portion located on the contact 4 is left, and the others are etched. Remove. Thereafter, an insulating film serving as a side wall 7 is laminated on the entire surface by a CVD method so as to have a predetermined thickness, and then anisotropically etched to be attached to the cross section of the upper electrode 6 and the diffusion preventing film 5. The sidewalls 7 are formed leaving only the portions.

Next, as shown in FIG. 2B, the surface of the lower electrode 6, side wall 7 and interlayer insulating film 2 of the capacitor is, for example, BST ((Ba _(1-x) , Sr _x ) TiO 2 ₃ ),
High dielectric film made of BaTiO ₃ and SrTiO ₃ , PZT
(Pb (Zr _(1-x) , Ti _x ) O ₃ ), PLT ((Pb _(1-x) , La _x ) Ti
O ₃ ), PLZT ((Pb _(1-x) , La _x ) (Zr _(1-y) , Ti _y ) O ₃ ), P
bTiO ₃ ferroelectric film, Y ₁ (Bi layer) ferroelectric film, Ta ₂ O ₅ (X, Y in these structural formulas)
Is applied, a dielectric film 8 made of any one of the above is laminated so as to have a thickness of about 500 to 1000 °, and a conductive film mainly composed of Pt to be the upper electrode 9 is formed to a thickness of 200 to 400 °, preferably. The layers are laminated so as to have a thickness of about 370 °.

Thereafter, the barrier layer 10a and the stopper layer 10
b, a conductive film 10 having a three-layer structure of an adhesion layer 10c is sequentially laminated. As the barrier layer 10a, for example, TiSi
N is deposited by a sputtering method so as to have a thickness of 100 °, and the stopper layer 10b is made of, for example, P
t is deposited by a sputtering method so as to have a thickness of 200 to 400 °, preferably 300 °. Further, as the adhesion layer 10c, for example, TiN is deposited by a sputtering method so as to have a thickness of 50 to 150 °, preferably 75 °. .

Next, as shown in FIG.
A resist pattern having a predetermined shape (shape of the upper electrode 9 after patterning) is formed on the conductive film 10, the conductive film 10, the upper electrode 9, and the dielectric film 8 are sequentially anisotropically etched using the resist pattern as an etching mask. Then, an upper electrode 9 having a predetermined shape is obtained. At this time, the conductive film 10 is laminated on the entire surface of the upper electrode 9. Next, the etching mask used here is removed. Thereafter, an interlayer insulating film 1 made of SiO _{2 is} formed on the entire surface of the semiconductor substrate 1 by a CVD method or the like.
1 are laminated so as to have a thickness of about 4000 °.

Next, as shown in FIG. 2D, a contact hole is formed in the interlayer insulating film 11 so as to be located above the upper electrode 9 but not on the lower electrode 6. The barrier metal layer 13 and the Al wiring 14 are sequentially laminated on the inner wall of the contact hole and the surface of the interlayer insulating film 11 and patterned into a predetermined shape.

The barrier metal layer 13 is made of TiN / T laminated by sputtering or CVD.
i or TiSi _x N _y is a layer having a thickness of about 500 to 1000 °, and the Al wiring 14 laminated on the surface of the barrier metal layer 13 has a contact hole diameter formed by sputtering Al by sputtering or CVD. Is 1
When the thickness is about μm, the layers are laminated so as to have a thickness of about 4000 to 6000 °, and photolithography and anisotropic etching are sequentially performed and patterned to obtain a predetermined shape. By going through the above steps,
It is possible to obtain a semiconductor device as shown in (a) and (b).

FIG. 3 is an enlarged view of the region A shown in FIG. 1A when a contact hole is formed in the process of manufacturing the semiconductor device. As shown in FIG. 3, when the contact hole 12a is formed, when the anisotropic etching is performed on the interlayer insulating film 11, the adhesive layer 10c and the stopper layer 1c of the conductive film 10 serving as an etching stopper are formed.
Ob may be partially etched. Also,
In the case where a combination of substances other than the exemplified substances is used as the conductive film 10, only a part of the adhesion layer 10c is etched and the other stopper layer 10b and the barrier layer 10a are not etched at all. However, by forming the conductive film 10 composed of a plurality of layers, it is possible to prevent the etching from reaching the upper electrode 9 constituting the capacitor when the contact hole 12a is opened, and furthermore, to form the capacitor electrode. It is possible to suppress a decrease in the film thickness, and also possible to suppress a deterioration in the film quality of the electrode.

In the above example, TiSiN is laminated as the barrier layer 10a constituting the conductive film 10. However, TiN having a thickness of 75 ° is treated at 450 ° C. in an oxygen atmosphere for about 20 minutes. The resulting Ti (O) N film (a partially oxidized titanium nitride film,
1 (a) having the same effect as that of the above example,
It is possible to obtain a semiconductor device as shown in FIG.

Further, as an example of the semiconductor device according to the present invention, a case where the lower electrode 6 of the capacitor and the Al contact 12 are arranged so as not to overlap each other as shown in FIG. 1 has been described. As shown in FIG. 4A, a contact 12b composed of an Al wiring 14a connected to a capacitor and a barrier metal layer 13a can be arranged above the contact 4 and also above the lower electrode 6. With such an arrangement, the horizontal dimension can be reduced without changing the vertical dimension occupied by the memory cell, and a more miniaturized semiconductor device can be obtained.

As another example, a structure as shown in FIG. 4B can be employed. In FIG. 4B,
Reference numerals 3a and 3b denote source / drain regions constituting a MOS transistor, 14c denotes an Al wiring connected to the source / drain region 3b, 16 denotes a LOCOS isolation film formed in an inactive region on the surface of the semiconductor substrate 1, and 17 denotes a LOCOS isolation film. Source/
A gate insulating film laminated on the channel region sandwiched between the drain regions 3a and 3b, and a gate electrode 18 formed on the gate insulating film 17 respectively. This figure 4
As shown in (b), the present invention is applied to a connection between an Al wiring 14b connected to one source / drain region 3a of a MOS transistor and an upper electrode 9 of a capacitor,
It is needless to say that the conductive film 10 can be interposed, and the same effect can be obtained.

Further, as shown in FIG. 5, since the conductive film 10 is formed, the interlayer insulating film 11 is formed in a region other than the memory cell formation region simultaneously with the opening of the contact hole 12a.
When the contact hole 12c having a depth from the surface of the semiconductor substrate 1 to the surface of the semiconductor substrate 1 is opened,
It is possible to obtain a capacitor having good electrical characteristics without overetching the bottom surface of a and without reducing the film thickness of the upper electrode 9.

In the semiconductor device according to the present invention,
For the structure in which the impurity region 3 and the lower electrode 6 of the capacitor are connected via the contact 4, the connection between the impurity region 3 formed on the surface of the semiconductor substrate 1 and the lower electrode 6 is established. What is needed is a short wiring of only the contact 4. On the other hand, in the structure of a semiconductor device exemplified as a conventional technique, the source / drain region (impurity region) on the surface of the semiconductor substrate is connected to the upper electrode of the capacitor, and the wiring connecting these is also the invention In addition, the wiring resistance is increased, and the location of the wiring must be secured. Therefore, the structure is not suitable for high integration of elements. This also indicates that the structure of the semiconductor device according to the present invention is more efficient.

Embodiment 2 Next, a second embodiment of the present invention will be described. In the semiconductor device described in the first embodiment, the barrier layer 10a, the stopper layer 10b,
The conductive film 10 having a three-layer structure composed of the adhesion layer 10c is interposed. However, the conductive film 10 of the semiconductor device described in the second embodiment is characterized by having a two-layer structure of a barrier layer 10a and a stopper layer 10b made of a substance containing Si.

FIG. 6 is a cross-sectional view of the region A including the connection between the Al contact 12 and the upper electrode in the structure of the semiconductor device according to the second embodiment. 6 is different from FIG. 1B in that, as described above, the conductive film 10 does not include the adhesion layer 10c, and the stopper layer 10b
Is, Si, Pt (1-x ) Si x (0 <x <1) (x is a numerical value determined by the interactions with other layers.) Consists, intended to necessarily containing Si material is there.

The other structure of the semiconductor device including the structure of FIG. 6 is the same as that of the embodiment shown in FIG. 1A except for the structure of the conductive film 10, and is a modification of FIG. FIG.
It is also possible to adopt a structure as shown in FIG. Further, the manufacturing method is similar to the manufacturing method described in the first embodiment, and does not include the step of forming the adhesion layer 10c in the manufacturing method described in the first embodiment. Pt containing _{(1-x) Si x (} 0
<X <1) or a method of forming a film composed of a single Si layer.

In the semiconductor device according to the second embodiment, since the adhesion layer 10b is formed of a film containing Si, even if the adhesion layer 10c is not formed, the adhesion between the adhesion layer 10c and the upper interlayer insulating film 11 can be improved. Adhesion can be sufficiently ensured. further,
The role of the stopper layer 10b as an etching stopper at the time of opening the contact hole 12a, the role as a sacrificial reaction film at the time of heat treatment, and the role of the barrier layer 10a as the original function of the Al contact 12 and Pt It is possible to suppress a reaction with the upper electrode 9 made of at the time of heat treatment, and it is possible to obtain a capacitor having good electric characteristics.

In the above description, as in the case of the first embodiment, for example, Al and Pt, which are the connection portions between the capacitors constituting the DRAM memory cell and the Al wiring connected to the GND potential point, are used. The conductive film 10 is disposed between the two electrodes. For example, as in the prior art, the present invention is applied to a connection portion between an Al wiring connected to one electrode of a MOS transistor and one electrode of a capacitor. Needless to say, this is also possible.

Embodiment 3 Next, a third embodiment of the present invention will be described. In the first embodiment, the conductive layer 10 has a three-layer structure. In the second embodiment, the conductive layer 10 has a three-layer structure.
Was formed as a two-layer film. The conductive layer 10 of the semiconductor device according to the third embodiment described here
a.

FIG. 7A and an area A in FIG.
FIG. 7B, which is an enlarged view of FIG. 7, shows a cross-sectional view of the semiconductor device of the third embodiment. In the drawing, the reference numerals already used indicate the same reference numerals or corresponding parts, and the barrier layer 10a is the same substance as the barrier layer 10a used as a component in the first and second embodiments.
TiSi _x system, Ta system, TaSi _x type, W type, WSi _x system alone, and nitrides, oxides, oxynitrides or Ru
O _x (0 ≦ x ≦ 2).

The method of manufacturing the semiconductor device having the above-described structure is the same as that of the manufacturing method shown in the first embodiment except that
0c and the manufacturing method without forming the stopper layer 10b.

In the semiconductor device according to the third embodiment, an Al contact 12 and a Pt
Even when a high-temperature heat treatment is applied, the barrier layer 10a is interposed between the upper electrode 9 and the upper electrode 9 to suppress the reaction between Al and Pt, and does not deteriorate the film quality of the electrode constituting the capacitor. . Therefore, a capacitor having good electric characteristics can be formed.

In this semiconductor device, the upper electrode 9 and A
Since the barrier layer 10a is laminated on the entire surface of the upper electrode 9 as well as the connection portion with the l wiring 14, the adhesion to the interlayer insulating film 11 laminated on the surface is improved. The material constituting the barrier layer 10a has similar or the same properties as the material constituting the adhesion layer 10c already described in the other embodiments, and the film quality sufficiently serves as the adhesion layer 10c. With

In the semiconductor device according to the present invention, unlike the structure of the memory cell shown in the prior art, the impurity region 3 serving as the source / drain region of the MOS transistor is connected to the lower electrode 6 of the capacitor, and the upper electrode of the capacitor is formed. By adopting a structure in which the lower electrode 9 is connected to the Al wiring 14 that supplies the GND potential, a continuous upper electrode 9 having a larger area than the lower electrode 6 is used as a counter electrode of the plurality of lower electrodes 6. Therefore, it is necessary to ensure sufficient adhesion between the upper electrode, which has not been a problem in the conventional structure, and the interlayer insulating film 11 laminated thereon.

Therefore, by providing the barrier layer 10a for improving the adhesion to the interlayer insulating film 11, it is possible to obtain a semiconductor device having a good shape without peeling. In addition, the memory cell having the above-described structure enables high integration. Compared with the structure of the semiconductor device shown in the related art, the technology disclosed in the present invention is Can be said to be a structure more suitable for advances in semiconductor technology.

Further, by providing the barrier layer 10a, the reaction between Al forming the Al wiring 14 and Pt forming the upper electrode 9 can be suppressed even at the time of heat treatment, and deterioration of the film quality of the capacitor electrode can be suppressed. It goes without saying that a capacitor having good electric characteristics can be obtained.

Embodiment 4 FIG. Next, a fourth embodiment of the present invention will be described. In the structure of the semiconductor device according to the third embodiment already described, the Al contact 12 and the upper electrode 9
The technique of providing the barrier layer 10a interposed between them has been described. In the fourth embodiment, a description will be given of a technique in which a conductive film 10 made of only Si as an example of the adhesion layer 10c in the first embodiment described above is interposed between the Al contact 12 and the upper electrode 9.

The structure of the semiconductor device according to the fourth embodiment is as shown in FIG. 8, in which the same reference numerals as those already used indicate the same or corresponding parts. In Embodiment 4, the adhesion layer 1
0c is composed of Si alone.

In the semiconductor device configured as shown in FIG. 8, the adhesion layer 10 is provided between the upper electrode 9 and the interlayer insulating film 11.
It is possible to improve the adhesion between the two by interposing c, and further, by providing this adhesion layer 10c, the Al contact 12 and the upper electrode 9 made of Pt do not come into direct contact. Therefore, there is an effect that the reaction between the two can be suppressed during the heat treatment, and the film quality of the capacitor electrode can be kept good.

In the first embodiment, the adhesion layer 10
Other Si alone as c, Ti-based, TiSi _x system, Ta
System, TaSi _x type, W type, have been disclosed single and nitrides of WSi _x system, since for these substances, which is exactly the same material as the material constituting the barrier layer 10a shown in the third embodiment, Adhesion layer 1 applicable to the fourth embodiment
As the constituent material of 0c, only Si alone is shown.

Embodiment 5 Next, a fifth embodiment will be described. The semiconductor device of the fifth embodiment is similar to the cross-sectional structure shown in FIG. 1A of the semiconductor device of the first embodiment, and the difference from the semiconductor device of the fifth embodiment is that a conductive film is used. 10 includes a stopper film 10d made of RuO _x (0 ≦ x ≦ 2). FIG. 9A is an enlarged view of a connection region A between the Al contact 12 and the upper electrode 9 of the semiconductor device shown in FIG. In FIG. 9A, the same reference numerals as those already described are the same or corresponding portions, and the stopper film 10d, which is one layer of the conductive film 10 having the three-layer structure, is made of RuO _x (0 ≦ x ≦ 2). ).

The method of obtaining the semiconductor device having the structure shown in FIG. 9A is the same as that of the step of forming RuO _x as a stopper film 10d by sputtering or CVD.
This is the same as the manufacturing process shown in the first embodiment. RuO _x
The stopper film 10d of (0 ≦ x ≦ 2) serves as an etching stopper at the time of opening a contact hole for forming the Al contact 12 and serves as an etching stopper.
During the high temperature (temperature of about 500 ° C.) heat treatment after forming
It has the property of serving as a sacrificial reaction film for preventing the reaction between Al constituting the Al wiring 14 and Pt of the upper electrode.

The semiconductor device according to the fifth embodiment has
The barrier film 1 is provided between the Al contact 12 having the l wiring 14 as a constituent element and the upper electrode 9 made of Pt of the capacitor.
0a, stopper film 10 made of RuO _x (0 ≦ x ≦ 2)
d, since the adhesion layer 10c is formed, even if a high-temperature heat treatment is applied after forming the Al wiring 14,
And Pt can be suppressed, and a semiconductor device having good electrical characteristics can be obtained without deteriorating the film quality of the capacitor electrode.

Further, as a modification of the above-described semiconductor device, it is also effective to form a semiconductor device as shown in FIG. 9B is a structure in which a stopper film 10d and an adhesion layer 10c are stacked as the conductive film 10. Thus, even when the conductive film 10 is formed by the stopper layer 10d and the adhesion layer 10c, the stopper layer 10d
Since RuO _x (0 ≦ x ≦ 2) also has a property as a barrier layer, even when high-temperature heat treatment is performed,
The reaction between Pt and Pt is suppressed, and the film quality of the capacitor electrode does not deteriorate. Therefore, the stopper layer 10d and the adhesion layer 1
Also in the case of forming the conductive film 10 having a two-layer structure of 0c, a semiconductor device with good electric characteristics can be obtained.

In the above description, the upper electrode 9 of the capacitor and the Al wiring 14 connected to the GND potential point have been described.
Although the semiconductor device having the structure in which the semiconductor device is electrically connected to the semiconductor device has been described, for example, as disclosed in the related art, the potential of the impurity region (source / drain region) formed on the surface of the semiconductor substrate is supplied. In the semiconductor device in which the Al wiring and the upper electrode of the capacitor are connected, a conductive film containing RuO _x (0 ≦ x ≦ 2) as a stopper layer is interposed in the connection region between the Al wiring and the upper electrode. It is also possible to obtain a semiconductor device having electrical characteristics.

The invention of the fifth embodiment has also been described with reference to the sectional view in which the lower electrode 6 and the Al contact 12 constituting the capacitor are not overlapped with each other.
Similar effects are obtained when a semiconductor device having a structure in which the Al contact 12 is disposed on the lower electrode 6 is formed, or when the semiconductor device is formed as a structure in which the impurity region 3 is connected to the upper electrode of the capacitor. Needless to say, this is obtained.

Embodiment 6 FIG. Next, a sixth embodiment of the present invention will be described. In the first embodiment described above, an example in which all of the stopper layers 10b forming the conductive film 10 are a single layer has been described. In the sixth embodiment, a case where the stopper layer is formed of a plurality of layers is described. The configuration of the semiconductor device according to the sixth embodiment is similar to that shown in FIG. 1, and only the configuration of the stopper layer is different.

FIG. 10A shows a view immediately after the formation of the conductive film 10.
Shown in In FIG. 10A, reference numeral 12d indicates a contact (Al contact) formation position, and reference numeral 19 indicates a stopper layer including a Pt layer 19a and a Si layer 19b. This Pt layer 19a is 200 to 40
The Si layer 19b is formed to have a thickness of about 0 °, preferably about 300 °, and the thickness of about 500 to 1000 °, preferably about 600 °. As shown in this figure, after the stopper layer 19 is laminated, the stopper layer 19 is composed of two layers, a Pt layer 19a and a Si layer 19b, at a stage where no high-temperature heat treatment is applied.

The upper electrode 9 is made of Pt having a thickness of about 200 to 400 °, preferably about 370 °. The barrier layer 10a is made of Ti (O) N having a thickness of about 50 to 200 °, preferably about 75 °. Layer 10c is 50-
It is made of TiN having a thickness of 150 °, preferably about 75 °.

After forming the conductive film 10, the Al contact 12
FIGS. 10B to 10E are enlarged views of the region B in FIG. Contact hole 12a
An Al contact 12 is formed therein, and at least one pattern is formed before an Al wiring (not shown) is patterned thereon.
Both react in the joining surface of the Pt layer 19a and the Si layer 19b during high temperature heat treatment which is applied every time, Pt _{(1 -x)} Si _x
A layer 20 (0 <x <1) is formed, and the stopper layer 19
a film containing t _(1-x) Si x layer 20.

[0071] The Pt _(1-x) Si _x layer arrangement 20 can take the There are 4, another configuration of the semiconductor device or the one of the structure when the semiconductor device is completed, depending on the production method, Subtle changes. Arrangement of Pt _(1-x) Si x layer 20,
As shown in FIG. 10B, a part of the Pt layer 19a is
Part of the layer 19b reacts, and the unreacted Pt layer 19a, Si
Pattern in a state of being sandwiched between layers _{19b Pt (1-x) Si} x layer 20 is formed, as shown in FIG. 10 (c), Pt layer 1
9a and a part of the Si layer 19b react, and unreacted Si
Pattern layer 19b is left on Pt _(1-x) Si x layer 20, 10 as shown in (d), and the reaction part and the Si layer 19b all of the Pt layer 19a, the unreacted Pt layer 19a on To Pt
_(1-x) Pattern in which _Six layer 20 is arranged, FIG.
As shown, all of the Pt layer 19a and the Si layer 19b is reacted, Pt _(1-x) only Si _x layer 20 of the pattern formed as a stopper layer, either.

The structure finally obtained is shown in FIGS.
In either case of (e), the Al contact 12 can be formed in a favorable state in the manufacturing process of the semiconductor device as in the first embodiment, and the opening of the contact hole can be formed. In this case, the etching can be prevented from reaching the upper electrode 9 constituting the capacitor, and the decrease in the thickness of the capacitor electrode can be suppressed.
Further it is also possible to suppress the deterioration of film quality of the electrode, it can be seen no inconvenience due to the stopper layer 19 is a structure that includes a final Pt _(1-x) Si _x layer 20.

FIG. 10 shows an example in which the adhesion layer 10 c is formed on the uppermost layer of the conductive layer 10.
It is also possible to form the conductive film 10 only from the barrier layer 10a and the stopper layer 19 without forming 0c. Surface of the stopper layer 19, as shown in FIG. 10, since it is constituted by a Si layer 19b or Pt _(1-x) Si _x layer 20 includes at least Si, a silicon oxide film laminated on the upper layer This is because the adhesion to the insulating film made of suffices.

Embodiment 7 Next, a seventh embodiment of the present invention will be described. The semiconductor device according to the seventh embodiment includes a conductive film 1 interposed between one electrode forming a capacitor and an Al wiring electrically connected to the electrode.
1 shows an example of the best combination of 0, and the overall structure of the semiconductor device is similar to that shown in FIG. FIG. 11A corresponds to an enlarged view of the region A in FIG. 1, and at the stage immediately after the formation without the high-temperature heat treatment,
The conductive film 10 has a laminated structure of a barrier layer 10a composed of TiSiN, a stopper layer 10b composed of Pt laminated thereon, and an adhesion layer 10c composed of Si further laminated thereon.

The thickness of each component constituting the conductive film 10 is such that the barrier layer 10a has a thickness of about 100 °, the stopper layer 10b has a thickness of about 300 °, and the adhesion layer 10c has a thickness of about 600 °. The upper electrode disposed in the lower layer is made of Pt and has a thickness of about 370 °.

After the conductive film 10 as shown in FIG. 11A is formed, at least one high-temperature heat treatment is applied before the Al contact 12 is formed.
Pb constituting Ob and Si constituting the adhesion layer 10c react with each other, and a part or all of the film becomes Pt _(1-x)
It becomes the _Six layer 20.

The structure of the region B in FIG. 11A when the semiconductor device is completed (after the high-temperature heat treatment) has one of the patterns shown in FIGS. 11B to 11E. First, in the case of FIG. 11B, a part of Pt and a part of Si react, and unreacted P
t, the state of being sandwiched between the Si is Pt _(1-x) Si _x layer 20 is disposed, in the case of FIG. 11 (c), the response part of the Pt whole and Si, Si unreacted Pt _{( 1-x)} It remains on the Si _x layer 20, and in the case of FIG.
All it reacts, on the unreacted _{Pt Pt (1-x) Si} x layer 20
There is disposed, in the case of FIG. 11 (e), the all Pt and Si reacts, Pt _(1-x) Si only _x layer 20 is a stopper layer 10
b and a state formed as a layer corresponding to the adhesion layer 10c.

The final structure among the above four structures depends on what kind of structure is formed after the conductive film 10 is formed and what kind of processing is applied. Subtle changes. As described above, as shown, the conductive film 10
Of the barrier layer 10a of TiSiN having a thickness of 1000
The stopper layer 10b is made of Pt having a thickness of 300 °
By forming 0c with Si having a thickness of 600 °, it is possible to suppress the etching from reaching the upper electrode 9 constituting the capacitor when the contact hole is opened, and to suppress a decrease in the film thickness of the capacitor electrode. It is also possible to suppress deterioration of the film quality of the electrode, and it is possible to obtain a semiconductor device having the best electric characteristics.

[0079]

The effects of each claim of the present invention will be described below. In the semiconductor device according to the first aspect of the present invention, a contact hole opening for forming an Al wiring is formed by disposing a conductive film including a barrier layer, a stopper layer, and an adhesion layer between an Al wiring and a capacitor electrode including Pt. In this case, it is possible to suppress a decrease in the thickness of the capacitor electrode due to over-etching, and also to suppress the reaction between Al and Pt during heat treatment after Al is buried in the contact hole. It is possible to obtain a capacitor having electric characteristics.

Further, in the semiconductor device according to the second aspect of the present invention, a conductive film including a barrier layer and a stopper layer is disposed between the Al wiring and the capacitor electrode composed of Pt, and the stopper layer is laminated thereon. By using a conductive material containing Si having high adhesion to the interlayer insulating film, a state in which the adhesion to the interlayer insulating film is sufficiently maintained can be obtained. In addition, a reduction in the thickness of the capacitor electrode is suppressed by over-etching at the time of opening a contact hole for forming an Al wiring, and a reaction between Al and Pt during a heat treatment after Al is buried in the contact hole is suppressed. And a capacitor having good electric characteristics can be obtained.

Further, in the semiconductor device according to the third aspect of the present invention, the barrier layer is arranged between the Al wiring and the capacitor electrode made of Pt, so that the over-etching at the time of opening the contact hole for forming the Al wiring. Therefore, the thickness of the capacitor electrode can be prevented from decreasing, and the reaction between Al and Pt can be suppressed even during the heat treatment after the Al is buried in the contact hole. Since the material constituting the barrier layer is similar to or the same as that of the adhesion layer, the adhesion to the interlayer insulating film can be sufficiently ensured.

Further, in the semiconductor device according to the fourth aspect of the present invention, by disposing an adhesion layer composed of Si alone between the Al wiring and the capacitor electrode composed of Pt, an interlayer insulating film laminated thereon is formed. Can sufficiently secure the adhesion of Al and Pt, so that the reaction between Al and Pt at the time of heat treatment can be suppressed, and a capacitor having good electric characteristics can be obtained. It is possible.

Furthermore, in the semiconductor device according to the fifth aspect of the present invention, RuO _x (0 ≦ 0) having properties as a barrier layer, an etching stopper layer, and a sacrificial reaction film is provided between the Al wiring and the capacitor electrode made of Pt. Since a two-layer conductive film in which a stopper layer composed of x ≦ 2) and an adhesion layer are sequentially laminated is arranged, a capacitor electrode having good electric characteristics can be obtained without forming a barrier layer.

In the semiconductor device according to the sixth aspect of the present invention, an electrode (upper electrode) made of Pt on the side to which the GND potential of the capacitor constituting the DRAM memory cell is supplied, and an upper part of the upper electrode By interposing a conductive film at the connection with the connected Al wiring of the GND potential, Pt and Al do not react with each other even when heat treatment is performed, and a capacitor having good electric characteristics can be obtained. Further, by arranging the electrode connected to the GND potential point as the upper electrode, high integration of the memory cell can be realized.

Further, in the semiconductor device according to the present invention, an electrode (upper electrode) made of Pt on the side supplied with the potential of one of the source / drain regions of the capacitor constituting the DRAM memory cell; A of the potential of one source / drain region connected to the upper part of the upper electrode
By interposing a conductive film at the connection with the l wiring, Pt and Al do not react with each other even when heat treatment is applied,
It is possible to obtain a capacitor having good electric characteristics.

In the semiconductor device according to the eighth aspect of the present invention, when the structure of the conductive film immediately after formation includes a laminated structure of Pt and Si, Pt and Si react by heat treatment applied until completion of the semiconductor device. and, Pt _(1-x) film quality as a conductive film be formed Si _x is without degradation, Al
It is possible to suppress a decrease in the thickness of the capacitor electrode due to over-etching at the time of opening a contact hole for forming a wiring, and to suppress the reaction between Al and Pt even during a heat treatment after embedding Al in the contact hole. Thus, a capacitor having good electric characteristics can be obtained.

Further, according to the method of manufacturing a semiconductor device according to the ninth aspect of the present invention, after forming the upper electrode of the capacitor, the barrier layer, the stopper layer, and the adhesion layer are sequentially laminated to form the conductive film. When a contact hole is formed in an interlayer insulating film laminated on the conductive film, the conductive film serves as an etching stopper, and at least the barrier layer remains below the bottom of the contact hole. Therefore, even when heat treatment is performed after Al is filled in the contact hole, the barrier layer intervenes between Al and Pt, so that the two do not react with each other, and a capacitor having good electric characteristics can be obtained. Become.

According to the method of manufacturing a semiconductor device of the present invention, after forming the upper electrode of the capacitor, a stopper layer made of RuO _x (0 ≦ x ≦ 2) and an adhesion layer are sequentially laminated. A state in which a conductive film is formed, and then the conductive film serves as an etching stopper when a contact hole is formed in an interlayer insulating film laminated on the conductive film, and at least a stopper layer remains under the bottom of the contact hole. Become. The stopper layer made of RuO _x has a barrier property. Even when Al is filled in the contact hole and heat treatment is performed, Al and Pt constituting the upper electrode do not react with each other and have good electric characteristics. Can be obtained.

Further, according to the method of manufacturing a semiconductor device according to the eleventh aspect of the present invention, after forming an upper electrode of a capacitor, a barrier layer and a stopper layer containing Si are sequentially laminated to form a conductive film. Next, when a contact hole is formed in an interlayer insulating film laminated on this conductive film, the conductive film serves as an etching stopper, and at least a barrier layer remains under the bottom of the contact hole.
Even if heat treatment is performed after filling Al into the contact holes, Al and Pt constituting the upper electrode do not react, and a capacitor having good electric characteristics can be obtained. Since it is composed of a substance containing the same, it is possible to sufficiently secure adhesion to an interlayer insulating film composed of an upper layer of SiO ₂ .

According to the method of manufacturing a semiconductor device of the twelfth aspect of the present invention, when the structure of the conductive film immediately after formation includes a laminated structure of Pt and Si, the heat treatment applied until the completion of the semiconductor device is performed. Pt and Si react,
Pt _(1-x) film quality as also the conductive film to form a Si _x without degradation, to suppress the decrease in film thickness of the capacitor electrode by over-etching in the contact hole for the Al wiring formation In addition, the reaction between Al and Pt can be suppressed even during the heat treatment after Al is buried in the contact hole, and a capacitor having good electric characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 shows a semiconductor device according to a first embodiment of the present invention.

FIG. 2 shows a manufacturing flow according to the first embodiment of the present invention.

FIG. 3 shows a semiconductor device according to the first embodiment of the present invention.

FIG. 4 shows a semiconductor device according to the first embodiment of the present invention.

FIG. 5 shows a semiconductor device according to the first embodiment of the present invention.

FIG. 6 shows a semiconductor device according to a second embodiment of the present invention.

FIG. 7 shows a semiconductor device according to a third embodiment of the present invention.

FIG. 8 shows a semiconductor device according to a fourth embodiment of the present invention.

FIG. 9 shows a semiconductor device according to a fifth embodiment of the present invention.

FIG. 10 shows a semiconductor device according to a sixth embodiment of the present invention.

FIG. 11 shows a semiconductor device according to a seventh embodiment of the present invention.

FIG. 12 is a diagram showing a conventional technique.

[Explanation of symbols]

1. Semiconductor substrate 2, 11. 2. interlayer insulating film Impurity region 4, 12b. Contact 5. Diffusion prevention film 6. Lower electrode 7. Side wall 8. 8. Dielectric film Upper electrode 10. Conductive film 10a. Barrier layer 10b, 10d, 19. Stopper layer 10c. Adhesion layer 12. Al contacts 12a, 12c. Contact hole 12d. Contact formation region 13, 13a. Barrier metal layer 14, 14a. Al wiring 15a. MOS transistor 15b. Capacitor 16. LOCOS separation membrane 17. Gate insulating film 18. Gate electrode 19a. Pt layer 19b. Si layer 20. Pt _(1-x) Si x layer

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code FI H01L 27/04 H01L 27/10 621B 21/822 (72) Inventor Yasushi Fujita 4-1-1, Mizuhara, Itami-shi, Hyogo Ryoden Semiconductor Corp. System Engineering Co., Ltd. (72) Inventor Hiroaki Taki 4-1-1 Mizuhara, Itami-shi, Hyogo Ryoden Semiconductor System System Co., Ltd. (72) Inventor Keiichiro Kashiwara 2-3-2 Marunouchi, Chiyoda-ku, Tokyo Mitsuishi Electric Co., Ltd.

Claims (12)

[Claims] 1. A capacitor formed on a semiconductor substrate and having a high-dielectric film or a ferroelectric film disposed between opposing electrodes composed of a substance containing Pt as a main component, wherein at least one of the opposing electrodes is provided. A semiconductor device in which a conductive layer formed by sequentially laminating a barrier layer, a stopper layer, and an adhesion layer is formed between the first electrode and an Al wiring electrically connected to the one electrode; Is Ti-based, T
i Si _x system, Ta system, TaSi _x type, W type, WSi _x system alone and nitrides, oxides, oxynitrides or RuO _x
(0 ≦ x ≦ 2) is composed of any of the above stopper layer _{is, Pt, Si, Pt (1} -x) Si x (0 <x <
1) a single layer of one substance selected from RuO _x (0 ≦ x ≦ 2) or a laminate of at least two of the above substances selected from the above substances; , TiSi _x system, Ta system, TaSi
_x system, W-based, WSi _x system alone and nitrides, semiconductor device, characterized in that it consists either of Si alone. 2. A capacitor formed on a semiconductor substrate and having a high-dielectric film or a ferroelectric film disposed between opposing electrodes composed of a substance containing Pt as a main component, wherein at least one of the opposing electrodes is provided. In a semiconductor device in which a conductive film formed by sequentially laminating a barrier layer and a stopper layer is formed between the first electrode and an Al wiring electrically connected to the one electrode, the barrier layer is formed of Ti System, TiSi _x
System, Ta system, TaSi _x type, W type, WSi _x system alone and nitrides, oxides, oxynitrides, or RuO _x (0 ≦ _x
≦ 2) is constructed from any of the above stopper layer is, Si, Pt (1-x ) Si x (0 either a single layer material of the <x <1), or of the substance A semiconductor device comprising a stack of at least two of the above substances selected from the group consisting of: 3. A capacitor formed on a semiconductor substrate and having a high-dielectric film or a ferroelectric film disposed between opposing electrodes composed of a substance containing Pt as a main component. during respect one electrode and the one electrode with parallel area wider than the other electrode of the electrically connected to the Al wiring, Ti-based, TiSi _x system, Ta
System, TaSi _x type, W type, WSi _x system alone and nitrides,
A semiconductor device comprising a barrier layer made of any one of oxide, oxynitride, and RuO _x (0 ≦ x ≦ 2). 4. A capacitor formed on a semiconductor substrate and having a high-dielectric film or a ferroelectric film disposed between opposing electrodes composed of a substance containing Pt as a main component, wherein at least one of the opposing electrodes is provided. A semiconductor device, wherein an adhesion layer made of Si alone is arranged between the first electrode and the Al wiring electrically connected to the one electrode. 5. A capacitor formed on a semiconductor substrate and having a high dielectric film or a ferroelectric film disposed between opposing electrodes composed of a substance containing Pt as a main component, wherein at least one of the opposing electrodes is provided. In a semiconductor device in which a conductive film formed by sequentially stacking a stopper layer and an adhesion layer is formed between an electrode of the first electrode and an Al wiring electrically connected to the one electrode, the stopper layer is made of RuO. _x (0 ≦ x ≦
2), wherein the adhesion layer is made of Ti, TiSi _x
System, Ta system, TaSi _x type, W type, WSi _x system alone and nitrides, semiconductor device, characterized in that it consists either of Si alone. 6. The conductive film is a DRAM (Dynamic Random A).
ccess Memory) one electrode of a capacitor forming a memory cell and GND electrically connected to the one electrode.
The semiconductor device according to claim 1, wherein the semiconductor device is interposed at a connection portion with an Al wiring to which a potential is supplied. 7. The conductive film is formed of an Al electrode to which a potential of one electrode of a capacitor constituting a DRAM memory cell and one source / drain electrode of a MOS (Metal Oxide Semiconductor) transistor constituting the memory cell is supplied.
6. The semiconductor device according to claim 1, wherein the semiconductor device is interposed at a connection portion with a wiring. 8. When the stopper layer and the adhesion layer constituting the conductive film are respectively composed of Pt and Si, or when the stopper layer is composed of a plurality of layers in which Si is laminated on Pt, after forming the Si to, by heat treatment applied, the Pt and some or all reacted Pt _(1-x) of the Si Si x (0 <x < 1) , and the above-mentioned conductive film above Pt _{( 1-x) Si x (0} <x < a semiconductor device according to any one of claims 1, 2, characterized in that a film containing 1). 9. A step of laminating a conductive film in which a barrier layer, a stopper layer, and an adhesion layer are sequentially laminated on one electrode of a capacitor formed on a semiconductor substrate and made of a substance containing Pt as a main component; A step of selectively performing anisotropic etching on the interlayer insulating film laminated on the conductive film to form a contact hole in a state where at least a part of the conductive film is exposed; Forming a contact by filling Al through the layer, patterning the Al laminated on the interlayer insulating film at the time of forming the contact, and forming an Al wiring electrically connected to the one electrode. The barrier layer constituting the conductive film is made of Ti-based,
i Si _x system, Ta system, TaSi _x type, W type, WSi _x system alone and nitrides, oxides, oxynitrides or RuO _x
(0 ≦ x ≦ 2) constructed from any of the above stopper layer is _{Pt, Si, Pt (1-} x) Si x (0 <x <1),
Is composed of a stack of at least two of said substance selected from among a single-layer or said substance consists of one member selected from among _{RuO x (0 ≦ x ≦ 2} ), the adhesion layer of Ti-based, TiSi _x system , Ta system, TaSi _x system, W system, W
Si _x system alone and nitrides, a method of manufacturing a semiconductor device, characterized in that it consists either of Si alone. 10. A step of stacking a conductive film in which a stopper layer and an adhesion layer are sequentially stacked on one electrode of a capacitor formed on a semiconductor substrate and made of a substance containing Pt as a main component, Selectively performing anisotropic etching on the inter-layer insulating film laminated in order to form a contact hole in which at least a part of the conductive film is exposed, at least through a barrier metal layer on the inner wall of the contact hole. Forming a contact by filling the contact with Al, patterning the Al laminated on the interlayer insulating film at the time of forming the contact, and forming an Al wiring electrically connected to the one electrode. Forming a stopper, wherein the stopper layer of the conductive film is made of RuO
_x (0 ≦ x ≦ 2), and the adhesion layer is made of Ti,
i Si _x system, Ta system, TaSi _x type, W type, WSi _x system alone and nitrides, a method of manufacturing a semiconductor device, characterized in that it consists either of Si alone. 11. A step of laminating a conductive film in which a barrier layer and a stopper layer are sequentially laminated on one electrode of a capacitor formed on a semiconductor substrate and made of a substance containing Pt as a main component, For the interlayer insulating film laminated on
A step of selectively performing anisotropic etching to form a contact hole in which at least a part of the conductive film is exposed, and forming a contact by filling at least an inner wall of the contact hole with Al via a barrier metal layer Patterning the Al laminated on the interlayer insulating film at the time of forming the contact, and forming an Al wiring electrically connected to the one electrode; The barrier layer is made of Ti-based, Ti
Si _x system, Ta system, TaSi _x type, W type, WSi _x system alone and nitrides, oxides, oxynitrides or RuO
constructed from any of _{x (0 ≦ x ≦ 2)} , the stopper layer is Si, single layer made of one material selected from among _{Pt (1-x) Si x} (0 <x <1) Or a stacked structure of at least two of the above substances selected from the above substances. 12. The method according to claim 1, wherein the stopper layer and the adhesion layer constituting the conductive film are each composed of Pt and Si, or the stopper layer is composed of a plurality of layers in which Si is laminated on Pt. After the above Si is formed,
By thermal treatment applied, a part or all of the Pt and the Si reacts _{Pt (1-x) Si x} (0 <x <1) , and the above-mentioned conductive film above _{Pt (1-x) Si x} (0 <X <1)
The method for manufacturing a semiconductor device according to claim 9, wherein the film is a film containing: